From 1c11b95c49ea6f2478ad6a0c0cdb7cda6d9c3609 Mon Sep 17 00:00:00 2001 From: "Luis R. Rodriguez" Date: Mon, 21 Jun 2010 18:38:49 -0400 Subject: [PATCH] --- yaml --- r: 203274 b: refs/heads/master c: 6a0ec30ad4acae63a81526ca8c157f718904993b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/ath/ath9k/ar9003_hw.c | 2 +- trunk/drivers/net/wireless/ath/ath9k/hw.c | 1 + trunk/drivers/net/wireless/ath/ath9k/hw.h | 1 + 4 files changed, 4 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 1de557f8ff46..90a7d7c1bbee 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 653fe371226fcbcc41b4662d35d2207648a6075d +refs/heads/master: 6a0ec30ad4acae63a81526ca8c157f718904993b diff --git a/trunk/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/trunk/drivers/net/wireless/ath/ath9k/ar9003_hw.c index efabab8d50c9..99bde5f96a83 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/trunk/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -303,7 +303,7 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah, * Configire PCIE after Ini init. SERDES values now come from ini file * This enables PCIe low power mode. */ - if (AR_SREV_9300_20_OR_LATER(ah)) { + if (ah->config.pcieSerDesWrite) { unsigned int i; for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) { diff --git a/trunk/drivers/net/wireless/ath/ath9k/hw.c b/trunk/drivers/net/wireless/ath/ath9k/hw.c index 3ee7d4e0499f..e9764dc43121 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/hw.c +++ b/trunk/drivers/net/wireless/ath/ath9k/hw.c @@ -388,6 +388,7 @@ static void ath9k_hw_init_config(struct ath_hw *ah) ah->config.ht_enable = 0; ah->config.rx_intr_mitigation = true; + ah->config.pcieSerDesWrite = true; /* * We need this for PCI devices only (Cardbus, PCI, miniPCI) diff --git a/trunk/drivers/net/wireless/ath/ath9k/hw.h b/trunk/drivers/net/wireless/ath/ath9k/hw.h index 6c6d47b0ed1b..e9578a4c912f 100644 --- a/trunk/drivers/net/wireless/ath/ath9k/hw.h +++ b/trunk/drivers/net/wireless/ath/ath9k/hw.h @@ -235,6 +235,7 @@ struct ath9k_ops_config { int ack_6mb; u32 cwm_ignore_extcca; u8 pcie_powersave_enable; + bool pcieSerDesWrite; u8 pcie_clock_req; u32 pcie_waen; u8 analog_shiftreg;