From 1ca0ac175ddfacccf4eaafa17cc3f2649a5e7daf Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 12 Jan 2006 16:53:51 +0000 Subject: [PATCH] --- yaml --- r: 18225 b: refs/heads/master c: 90303b102353302e84758f245906368907e6a23b h: refs/heads/master i: 18223: 20396a426789e6b6312cf6cb14ea31ca83ca1179 v: v3 --- [refs] | 2 +- trunk/arch/arm/kernel/fiq.c | 4 ++-- trunk/arch/arm/lib/csumpartialcopy.S | 6 ++++-- trunk/arch/arm/lib/csumpartialcopygeneric.S | 6 ++---- trunk/arch/arm/lib/csumpartialcopyuser.S | 8 +++++--- 5 files changed, 14 insertions(+), 12 deletions(-) diff --git a/[refs] b/[refs] index 60aee2add250..2f2bdfec00eb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ece5f7b3c4fde70a1ae4add7372ebca5c90bc34d +refs/heads/master: 90303b102353302e84758f245906368907e6a23b diff --git a/trunk/arch/arm/kernel/fiq.c b/trunk/arch/arm/kernel/fiq.c index 9299dfc25698..1ec3f7faa259 100644 --- a/trunk/arch/arm/kernel/fiq.c +++ b/trunk/arch/arm/kernel/fiq.c @@ -101,7 +101,7 @@ void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs) ldmia %1, {r8 - r14}\n\ msr cpsr_c, %0 @ return to SVC mode\n\ mov r0, r0\n\ - ldmea fp, {fp, sp, pc}" + ldmfd sp, {fp, sp, pc}" : "=&r" (tmp) : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); } @@ -119,7 +119,7 @@ void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs) stmia %1, {r8 - r14}\n\ msr cpsr_c, %0 @ return to SVC mode\n\ mov r0, r0\n\ - ldmea fp, {fp, sp, pc}" + ldmfd sp, {fp, sp, pc}" : "=&r" (tmp) : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); } diff --git a/trunk/arch/arm/lib/csumpartialcopy.S b/trunk/arch/arm/lib/csumpartialcopy.S index 990ee63b2465..21effe0dbf97 100644 --- a/trunk/arch/arm/lib/csumpartialcopy.S +++ b/trunk/arch/arm/lib/csumpartialcopy.S @@ -18,11 +18,13 @@ */ .macro save_regs + mov ip, sp stmfd sp!, {r1, r4 - r8, fp, ip, lr, pc} + sub fp, ip, #4 .endm - .macro load_regs,flags - LOADREGS(\flags,fp,{r1, r4 - r8, fp, sp, pc}) + .macro load_regs + ldmfd sp, {r1, r4 - r8, fp, sp, pc} .endm .macro load1b, reg1 diff --git a/trunk/arch/arm/lib/csumpartialcopygeneric.S b/trunk/arch/arm/lib/csumpartialcopygeneric.S index 4a4609c19095..c50e8f5285d1 100644 --- a/trunk/arch/arm/lib/csumpartialcopygeneric.S +++ b/trunk/arch/arm/lib/csumpartialcopygeneric.S @@ -23,7 +23,7 @@ len .req r2 sum .req r3 .Lzero: mov r0, sum - load_regs ea + load_regs /* * Align an unaligned destination pointer. We know that @@ -87,9 +87,7 @@ sum .req r3 b .Ldone FN_ENTRY - mov ip, sp save_regs - sub fp, ip, #4 cmp len, #8 @ Ensure that we have at least blo .Lless8 @ 8 bytes to copy. @@ -163,7 +161,7 @@ FN_ENTRY ldr sum, [sp, #0] @ dst tst sum, #1 movne r0, r0, ror #8 - load_regs ea + load_regs .Lsrc_not_aligned: adc sum, sum, #0 @ include C from dst alignment diff --git a/trunk/arch/arm/lib/csumpartialcopyuser.S b/trunk/arch/arm/lib/csumpartialcopyuser.S index 333bca292de9..c3b93e22ea25 100644 --- a/trunk/arch/arm/lib/csumpartialcopyuser.S +++ b/trunk/arch/arm/lib/csumpartialcopyuser.S @@ -18,11 +18,13 @@ .text .macro save_regs + mov ip, sp stmfd sp!, {r1 - r2, r4 - r8, fp, ip, lr, pc} + sub fp, ip, #4 .endm - .macro load_regs,flags - ldm\flags fp, {r1, r2, r4-r8, fp, sp, pc} + .macro load_regs + ldmfd sp, {r1, r2, r4-r8, fp, sp, pc} .endm .macro load1b, reg1 @@ -100,5 +102,5 @@ 6002: teq r2, r1 strneb r0, [r1], #1 bne 6002b - load_regs ea + load_regs .previous