From 1ccd82bf2f670990354000815f065393c3ff3c61 Mon Sep 17 00:00:00 2001 From: "Hans J. Koch" Date: Fri, 17 Sep 2010 18:13:56 +0200 Subject: [PATCH] --- yaml --- r: 212468 b: refs/heads/master c: 83ef3338a2ae5d5bd9f5f6803b900b8067660054 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/MAINTAINERS | 30 +- trunk/Makefile | 9 +- trunk/arch/Kconfig | 4 +- trunk/arch/alpha/include/asm/cacheflush.h | 2 - trunk/arch/alpha/include/asm/unistd.h | 6 +- trunk/arch/alpha/kernel/entry.S | 81 +- trunk/arch/alpha/kernel/err_ev6.c | 12 +- trunk/arch/alpha/kernel/err_marvel.c | 33 +- trunk/arch/alpha/kernel/err_titan.c | 35 +- trunk/arch/alpha/kernel/osf_sys.c | 9 +- trunk/arch/alpha/kernel/pci-sysfs.c | 2 +- trunk/arch/alpha/kernel/process.c | 2 +- trunk/arch/alpha/kernel/signal.c | 97 +- trunk/arch/alpha/kernel/srm_env.c | 2 +- trunk/arch/alpha/kernel/systbls.S | 5 +- trunk/arch/alpha/kernel/time.c | 10 +- trunk/arch/alpha/kernel/traps.c | 3 + trunk/arch/arm/Kconfig | 76 +- trunk/arch/arm/Kconfig.debug | 5 - trunk/arch/arm/Makefile | 2 + trunk/arch/arm/boot/compressed/Makefile | 2 +- trunk/arch/arm/common/it8152.c | 8 - trunk/arch/arm/common/pl330.c | 7 +- trunk/arch/arm/common/sa1111.c | 2 +- trunk/arch/arm/configs/realview-smp_defconfig | 15 +- trunk/arch/arm/configs/realview_defconfig | 15 +- trunk/arch/arm/configs/u300_defconfig | 37 +- trunk/arch/arm/include/asm/assembler.h | 27 +- trunk/arch/arm/include/asm/cacheflush.h | 65 +- trunk/arch/arm/include/asm/cachetype.h | 8 +- trunk/arch/arm/include/asm/ftrace.h | 20 +- .../arch/arm/include/asm/hardware/coresight.h | 34 +- trunk/arch/arm/include/asm/hw_breakpoint.h | 133 --- trunk/arch/arm/include/asm/module.h | 31 +- trunk/arch/arm/include/asm/pgtable.h | 30 +- trunk/arch/arm/include/asm/processor.h | 4 - trunk/arch/arm/include/asm/ptrace.h | 2 - trunk/arch/arm/include/asm/smp_mpidr.h | 17 - trunk/arch/arm/include/asm/smp_plat.h | 25 - trunk/arch/arm/include/asm/system.h | 6 - trunk/arch/arm/include/asm/tlbflush.h | 36 +- trunk/arch/arm/kernel/Makefile | 1 - trunk/arch/arm/kernel/armksyms.c | 2 - trunk/arch/arm/kernel/entry-armv.S | 11 +- trunk/arch/arm/kernel/entry-common.S | 65 +- trunk/arch/arm/kernel/etm.c | 15 - trunk/arch/arm/kernel/ftrace.c | 188 +--- trunk/arch/arm/kernel/head-common.S | 305 +++---- trunk/arch/arm/kernel/head-nommu.S | 5 +- trunk/arch/arm/kernel/head.S | 300 +++---- trunk/arch/arm/kernel/hw_breakpoint.c | 849 ------------------ trunk/arch/arm/kernel/module.c | 68 +- trunk/arch/arm/kernel/process.c | 24 - trunk/arch/arm/kernel/ptrace.c | 239 ----- trunk/arch/arm/kernel/setup.c | 46 +- trunk/arch/arm/kernel/smp.c | 66 +- trunk/arch/arm/kernel/unwind.c | 2 - trunk/arch/arm/kernel/vmlinux.lds.S | 39 +- trunk/arch/arm/mach-at91/Kconfig | 6 - trunk/arch/arm/mach-at91/Makefile | 1 - .../arch/arm/mach-at91/at91sam9g45_devices.c | 4 +- trunk/arch/arm/mach-at91/board-flexibity.c | 164 ---- trunk/arch/arm/mach-davinci/dm355.c | 3 +- trunk/arch/arm/mach-davinci/dm365.c | 3 +- trunk/arch/arm/mach-davinci/dm644x.c | 3 +- trunk/arch/arm/mach-davinci/dm646x.c | 3 +- trunk/arch/arm/mach-dove/include/mach/io.h | 6 +- trunk/arch/arm/mach-ixp4xx/common-pci.c | 8 - .../arm/mach-ixp4xx/include/mach/hardware.h | 2 - .../arm/mach-kirkwood/include/mach/kirkwood.h | 2 +- trunk/arch/arm/mach-kirkwood/pcie.c | 4 +- trunk/arch/arm/mach-mmp/include/mach/system.h | 7 +- trunk/arch/arm/mach-pxa/cpufreq-pxa2xx.c | 3 +- .../arch/arm/mach-pxa/include/mach/hardware.h | 14 +- trunk/arch/arm/mach-pxa/include/mach/io.h | 2 - trunk/arch/arm/mach-pxa/palm27x.c | 6 +- trunk/arch/arm/mach-pxa/vpac270.c | 1 - trunk/arch/arm/mach-realview/core.c | 2 - .../arch/arm/mach-realview/include/mach/smp.h | 10 +- trunk/arch/arm/mach-s3c64xx/dev-spi.c | 3 +- trunk/arch/arm/mach-s3c64xx/mach-real6410.c | 104 +-- trunk/arch/arm/mach-s3c64xx/mach-smartq.c | 2 +- trunk/arch/arm/mach-s3c64xx/mach-smartq5.c | 2 +- trunk/arch/arm/mach-s3c64xx/mach-smartq7.c | 2 +- trunk/arch/arm/mach-s5pv210/clock.c | 20 +- trunk/arch/arm/mach-s5pv210/cpu.c | 2 +- .../arch/arm/mach-s5pv310/include/mach/smp.h | 9 +- trunk/arch/arm/mach-tcc8k/Kconfig | 5 + trunk/arch/arm/mach-tegra/include/mach/smp.h | 10 +- trunk/arch/arm/mach-u300/include/mach/gpio.h | 3 - trunk/arch/arm/mach-ux500/Kconfig | 18 +- trunk/arch/arm/mach-ux500/Makefile | 8 +- .../arm/mach-ux500/board-mop500-regulators.c | 101 --- trunk/arch/arm/mach-ux500/board-mop500-sdi.c | 91 -- trunk/arch/arm/mach-ux500/board-mop500.c | 34 +- trunk/arch/arm/mach-ux500/board-mop500.h | 12 - trunk/arch/arm/mach-ux500/cpu-db5500.c | 88 -- trunk/arch/arm/mach-ux500/cpu-db8500.c | 82 -- trunk/arch/arm/mach-ux500/devices-db8500.c | 94 +- trunk/arch/arm/mach-ux500/hotplug.c | 75 -- .../arm/mach-ux500/include/mach/db5500-regs.h | 14 - .../arm/mach-ux500/include/mach/db8500-regs.h | 2 + .../arm/mach-ux500/include/mach/devices.h | 7 - .../arm/mach-ux500/include/mach/hardware.h | 23 +- .../arm/mach-ux500/include/mach/irqs-db5500.h | 1 - trunk/arch/arm/mach-ux500/include/mach/irqs.h | 18 +- trunk/arch/arm/mach-ux500/include/mach/mbox.h | 88 -- .../arm/mach-ux500/include/mach/prcmu-regs.h | 91 -- .../arch/arm/mach-ux500/include/mach/prcmu.h | 15 - .../arch/arm/mach-ux500/include/mach/setup.h | 7 - trunk/arch/arm/mach-ux500/include/mach/smp.h | 9 +- trunk/arch/arm/mach-ux500/mbox.c | 567 ------------ trunk/arch/arm/mach-ux500/modem_irq.c | 139 --- trunk/arch/arm/mach-ux500/pins-db5500.h | 620 ------------- trunk/arch/arm/mach-ux500/pins-db8500.h | 66 +- trunk/arch/arm/mach-ux500/platsmp.c | 2 - trunk/arch/arm/mach-ux500/prcmu.c | 231 ----- trunk/arch/arm/mach-ux500/ste-dma40-db5500.h | 135 --- trunk/arch/arm/mach-ux500/ste-dma40-db8500.h | 258 +++--- trunk/arch/arm/mach-vexpress/ct-ca9x4.c | 8 +- .../arch/arm/mach-vexpress/include/mach/smp.h | 9 +- trunk/arch/arm/mm/alignment.c | 19 +- trunk/arch/arm/mm/cache-v6.S | 30 +- trunk/arch/arm/mm/cache-v7.S | 30 +- trunk/arch/arm/mm/copypage-v4mc.c | 2 +- trunk/arch/arm/mm/copypage-v6.c | 2 +- trunk/arch/arm/mm/copypage-xscale.c | 2 +- trunk/arch/arm/mm/dma-mapping.c | 6 - trunk/arch/arm/mm/fault-armv.c | 8 +- trunk/arch/arm/mm/fault.c | 13 - trunk/arch/arm/mm/flush.c | 69 +- trunk/arch/arm/mm/init.c | 4 +- trunk/arch/arm/mm/mmu.c | 73 +- trunk/arch/arm/mm/proc-arm1020.S | 2 +- trunk/arch/arm/mm/proc-arm1020e.S | 2 +- trunk/arch/arm/mm/proc-arm1022.S | 2 +- trunk/arch/arm/mm/proc-arm1026.S | 2 +- trunk/arch/arm/mm/proc-arm6_7.S | 2 +- trunk/arch/arm/mm/proc-arm720.S | 2 +- trunk/arch/arm/mm/proc-arm740.S | 2 +- trunk/arch/arm/mm/proc-arm7tdmi.S | 2 +- trunk/arch/arm/mm/proc-arm920.S | 2 +- trunk/arch/arm/mm/proc-arm922.S | 2 +- trunk/arch/arm/mm/proc-arm925.S | 2 +- trunk/arch/arm/mm/proc-arm926.S | 2 +- trunk/arch/arm/mm/proc-arm940.S | 2 +- trunk/arch/arm/mm/proc-arm946.S | 2 +- trunk/arch/arm/mm/proc-arm9tdmi.S | 2 +- trunk/arch/arm/mm/proc-fa526.S | 2 +- trunk/arch/arm/mm/proc-feroceon.S | 2 +- trunk/arch/arm/mm/proc-mohawk.S | 2 +- trunk/arch/arm/mm/proc-sa110.S | 2 +- trunk/arch/arm/mm/proc-sa1100.S | 2 +- trunk/arch/arm/mm/proc-v6.S | 49 +- trunk/arch/arm/mm/proc-v7.S | 105 +-- trunk/arch/arm/mm/proc-xsc3.S | 2 +- trunk/arch/arm/mm/proc-xscale.S | 2 +- trunk/arch/arm/mm/tlb-v7.S | 33 +- trunk/arch/arm/plat-nomadik/gpio.c | 74 +- .../arch/arm/plat-nomadik/include/plat/gpio.h | 2 - .../arm/plat-nomadik/include/plat/pincfg.h | 36 +- trunk/arch/arm/plat-nomadik/timer.c | 33 +- trunk/arch/arm/plat-omap/include/plat/smp.h | 12 +- trunk/arch/arm/plat-omap/sram.c | 25 +- trunk/arch/arm/plat-s5p/dev-fimc0.c | 9 +- trunk/arch/arm/plat-s5p/dev-fimc1.c | 9 +- trunk/arch/arm/plat-s5p/dev-fimc2.c | 9 +- trunk/arch/arm/plat-samsung/gpio-config.c | 7 +- .../arm/plat-samsung/include/plat/gpio-cfg.h | 10 +- trunk/arch/arm/plat-tcc/Kconfig | 20 + trunk/arch/arm/plat-tcc/Makefile | 3 + .../arm/plat-tcc/include/mach/debug-macro.S | 33 + .../arm/plat-tcc/include/mach/entry-macro.S | 68 ++ .../arch/arm/plat-tcc/include/mach/hardware.h | 43 + trunk/arch/arm/plat-tcc/include/mach/memory.h | 18 + trunk/arch/arm/plat-tcc/include/mach/system.h | 31 + .../arm/plat-tcc/include/mach/tcc8k-regs.h | 796 ++++++++++++++++ .../arm/plat-tcc/include/mach/uncompress.h | 34 + .../arch/arm/plat-tcc/include/mach/vmalloc.h | 10 + trunk/arch/arm/plat-tcc/system.c | 25 + trunk/arch/frv/kernel/signal.c | 51 +- trunk/arch/m32r/include/asm/signal.h | 1 + trunk/arch/m32r/include/asm/unistd.h | 1 - trunk/arch/m32r/kernel/entry.S | 5 +- trunk/arch/m32r/kernel/ptrace.c | 7 +- trunk/arch/m32r/kernel/signal.c | 105 ++- trunk/arch/mn10300/Kconfig | 1 + trunk/arch/mn10300/Kconfig.debug | 2 +- trunk/arch/mn10300/include/asm/bitops.h | 4 +- trunk/arch/mn10300/include/asm/signal.h | 2 +- trunk/arch/mn10300/kernel/signal.c | 35 +- trunk/arch/mn10300/mm/Makefile | 14 +- trunk/arch/mn10300/mm/cache-disabled.c | 21 - trunk/arch/powerpc/kernel/signal.c | 2 - trunk/arch/powerpc/kernel/signal_32.c | 3 +- trunk/arch/powerpc/kernel/signal_64.c | 2 +- trunk/arch/sparc/kernel/perf_event.c | 14 +- trunk/arch/sparc/kernel/signal32.c | 161 ++-- trunk/arch/sparc/kernel/signal_32.c | 55 +- trunk/arch/sparc/kernel/signal_64.c | 45 +- trunk/arch/tile/kernel/intvec_32.S | 7 + trunk/arch/um/kernel/exec.c | 6 +- trunk/arch/um/kernel/internal.h | 2 +- trunk/arch/um/kernel/syscall.c | 4 +- trunk/arch/x86/boot/early_serial_console.c | 14 +- trunk/arch/x86/include/asm/amd_iommu_proto.h | 6 - trunk/arch/x86/include/asm/amd_iommu_types.h | 12 - trunk/arch/x86/include/asm/bitops.h | 2 +- trunk/arch/x86/include/asm/cpufeature.h | 1 - trunk/arch/x86/include/asm/hw_breakpoint.h | 2 +- trunk/arch/x86/kernel/Makefile | 2 - trunk/arch/x86/kernel/amd_iommu.c | 4 +- trunk/arch/x86/kernel/amd_iommu_init.c | 67 +- trunk/arch/x86/kernel/cpu/perf_event.c | 12 +- trunk/arch/x86/kernel/cpu/scattered.c | 1 - trunk/arch/x86/kernel/hw_breakpoint.c | 40 +- trunk/arch/x86/lguest/boot.c | 13 +- trunk/arch/x86/oprofile/nmi_int.c | 4 +- trunk/block/blk-map.c | 2 +- trunk/block/blk-merge.c | 12 - trunk/block/cfq-iosched.c | 16 +- trunk/drivers/amba/bus.c | 2 +- trunk/drivers/ata/ahci.c | 4 - trunk/drivers/ata/ahci.h | 12 +- trunk/drivers/ata/ahci_platform.c | 6 +- trunk/drivers/ata/libahci.c | 16 +- trunk/drivers/block/cciss.c | 2 +- trunk/drivers/block/pktcdvd.c | 2 +- trunk/drivers/char/agp/intel-agp.c | 2 - trunk/drivers/char/agp/intel-agp.h | 2 - trunk/drivers/char/ipmi/ipmi_si_intf.c | 17 +- trunk/drivers/char/mem.c | 3 +- trunk/drivers/char/virtio_console.c | 6 +- trunk/drivers/dca/dca-core.c | 85 +- trunk/drivers/dma/mv_xor.c | 2 +- trunk/drivers/edac/edac_mc.c | 3 - trunk/drivers/gpio/tc35892-gpio.c | 8 - trunk/drivers/gpu/drm/drm_buffer.c | 6 +- trunk/drivers/gpu/drm/i915/i915_drv.c | 1 - trunk/drivers/gpu/drm/i915/i915_gem.c | 37 +- trunk/drivers/gpu/drm/i915/i915_gem_evict.c | 9 +- trunk/drivers/gpu/drm/i915/i915_suspend.c | 36 +- trunk/drivers/gpu/drm/i915/intel_crt.c | 4 +- trunk/drivers/gpu/drm/i915/intel_display.c | 8 - trunk/drivers/gpu/drm/i915/intel_sdvo.c | 15 +- .../gpu/drm/nouveau/nouveau_connector.c | 6 +- trunk/drivers/gpu/drm/radeon/atombios.h | 2 +- trunk/drivers/gpu/drm/radeon/r600.c | 2 +- trunk/drivers/gpu/drm/radeon/radeon_kms.c | 4 - trunk/drivers/gpu/drm/ttm/ttm_bo_util.c | 1 - trunk/drivers/gpu/drm/ttm/ttm_page_alloc.c | 8 +- trunk/drivers/gpu/vga/vgaarb.c | 2 +- trunk/drivers/hwmon/Kconfig | 2 +- trunk/drivers/hwmon/coretemp.c | 57 +- trunk/drivers/hwmon/lis3lv02d.c | 4 +- trunk/drivers/hwmon/pkgtemp.c | 23 +- trunk/drivers/i2c/busses/i2c-omap.c | 2 - trunk/drivers/ide/ide-probe.c | 12 +- trunk/drivers/infiniband/hw/cxgb3/iwch_cm.c | 6 +- trunk/drivers/leds/leds-ns2.c | 9 +- trunk/drivers/misc/Kconfig | 2 +- trunk/drivers/misc/Makefile | 2 +- .../misc/{vmw_balloon.c => vmware_balloon.c} | 0 trunk/drivers/mmc/host/mmci.c | 62 +- trunk/drivers/mmc/host/mmci.h | 22 +- trunk/drivers/mmc/host/sdhci-s3c.c | 12 +- trunk/drivers/net/3c59x.c | 17 +- trunk/drivers/net/atlx/atl1.c | 11 +- trunk/drivers/net/bonding/bond_3ad.c | 3 - trunk/drivers/net/bonding/bond_alb.c | 3 - trunk/drivers/net/cxgb3/cxgb3_main.c | 2 - trunk/drivers/net/e1000e/hw.h | 1 - trunk/drivers/net/e1000e/ich8lan.c | 197 +--- trunk/drivers/net/e1000e/netdev.c | 29 +- trunk/drivers/net/eql.c | 2 - trunk/drivers/net/ibm_newemac/core.c | 4 +- trunk/drivers/net/netxen/netxen_nic_init.c | 3 + trunk/drivers/net/phy/mdio_bus.c | 4 +- trunk/drivers/net/ppp_generic.c | 9 +- trunk/drivers/net/qlcnic/qlcnic_init.c | 7 +- trunk/drivers/net/r8169.c | 5 +- trunk/drivers/net/rionet.c | 2 +- trunk/drivers/net/sgiseeq.c | 2 +- trunk/drivers/net/smsc911x.c | 1 - trunk/drivers/net/tulip/de2104x.c | 43 +- trunk/drivers/net/usb/hso.c | 2 - trunk/drivers/net/wireless/iwlwifi/iwl-core.c | 5 - trunk/drivers/pci/intel-iommu.c | 117 +-- trunk/drivers/pci/iov.c | 2 +- trunk/drivers/pci/pci.h | 5 +- trunk/drivers/pcmcia/pcmcia_resource.c | 6 - trunk/drivers/pcmcia/pd6729.c | 2 +- trunk/drivers/platform/x86/thinkpad_acpi.c | 5 +- trunk/drivers/rtc/rtc-ab3100.c | 2 - trunk/drivers/rtc/rtc-s3c.c | 13 +- trunk/drivers/s390/net/ctcm_main.c | 4 +- trunk/drivers/serial/amba-pl010.c | 9 +- trunk/drivers/serial/mfd.c | 17 +- .../staging/batman-adv/hard-interface.c | 13 + trunk/drivers/staging/batman-adv/send.c | 8 +- trunk/drivers/staging/ti-st/st.h | 1 + trunk/drivers/staging/ti-st/st_core.c | 9 +- trunk/drivers/staging/ti-st/st_core.h | 2 +- trunk/drivers/staging/ti-st/st_kim.c | 22 +- trunk/drivers/staging/vt6655/wpactl.c | 11 +- trunk/drivers/usb/core/Kconfig | 6 +- trunk/drivers/usb/core/file.c | 35 +- trunk/drivers/usb/core/message.c | 1 - trunk/drivers/usb/host/ehci-pci.c | 5 - trunk/drivers/usb/musb/cppi_dma.c | 1 - trunk/drivers/usb/musb/musb_debugfs.c | 5 +- trunk/drivers/usb/musb/musb_gadget.c | 75 +- trunk/drivers/usb/musb/musb_gadget.h | 2 - trunk/drivers/usb/musb/musb_gadget_ep0.c | 9 - trunk/drivers/usb/musb/musb_host.c | 6 - trunk/drivers/usb/otg/twl4030-usb.c | 78 +- trunk/drivers/usb/serial/mos7720.c | 3 - trunk/drivers/usb/serial/mos7840.c | 3 - trunk/drivers/vhost/net.c | 2 +- trunk/drivers/vhost/vhost.c | 7 +- trunk/drivers/video/console/fbcon.c | 5 +- trunk/drivers/video/efifb.c | 103 +-- trunk/drivers/video/pxa168fb.c | 4 +- trunk/drivers/video/sis/sis_main.c | 3 - trunk/fs/aio.c | 10 +- trunk/fs/binfmt_elf.c | 2 +- trunk/fs/ceph/Kconfig | 1 - trunk/fs/ceph/addr.c | 7 +- trunk/fs/ceph/caps.c | 27 +- trunk/fs/ceph/dir.c | 10 +- trunk/fs/ceph/inode.c | 11 +- trunk/fs/ceph/mds_client.c | 2 - trunk/fs/ceph/pagelist.c | 12 +- trunk/fs/ceph/snap.c | 92 +- trunk/fs/ceph/super.h | 5 +- trunk/fs/char_dev.c | 4 +- trunk/fs/coda/psdev.c | 4 +- trunk/fs/compat.c | 2 +- trunk/fs/fs-writeback.c | 23 +- trunk/fs/ocfs2/acl.c | 3 - trunk/fs/ocfs2/cluster/tcp.c | 2 +- trunk/fs/ocfs2/dir.c | 24 +- trunk/fs/ocfs2/dlm/dlmcommon.h | 1 - trunk/fs/ocfs2/dlm/dlmdebug.c | 9 +- trunk/fs/ocfs2/dlm/dlmdomain.c | 1 - trunk/fs/ocfs2/dlm/dlmmaster.c | 40 - trunk/fs/ocfs2/dlmglue.h | 1 - trunk/fs/ocfs2/ocfs2_fs.h | 37 +- trunk/fs/ocfs2/ocfs2_ioctl.h | 8 +- trunk/fs/ocfs2/refcounttree.c | 5 +- trunk/fs/ocfs2/reservations.c | 22 +- trunk/fs/ocfs2/suballoc.c | 4 +- trunk/fs/ocfs2/xattr.c | 4 +- trunk/fs/proc/task_mmu.c | 4 +- trunk/fs/proc/vmcore.c | 2 +- trunk/include/linux/amba/bus.h | 15 +- trunk/include/linux/amba/mmci.h | 2 - trunk/include/linux/amba/serial.h | 11 - trunk/include/linux/dma-mapping.h | 4 - trunk/include/linux/fs.h | 4 - trunk/include/linux/mfd/tc35892.h | 4 - trunk/include/linux/netlink.h | 4 +- trunk/include/linux/netpoll.h | 8 +- trunk/include/linux/pci_ids.h | 3 - trunk/include/linux/socket.h | 2 +- trunk/include/net/addrconf.h | 1 - trunk/include/net/dst.h | 1 - trunk/include/net/route.h | 2 - trunk/include/net/tcp.h | 18 +- trunk/include/net/xfrm.h | 4 +- trunk/kernel/fork.c | 2 +- trunk/kernel/hw_breakpoint.c | 3 +- trunk/kernel/sched.c | 8 +- trunk/kernel/sched_fair.c | 2 +- trunk/kernel/trace/Kconfig | 2 +- trunk/mm/backing-dev.c | 2 - trunk/mm/fremap.c | 7 +- trunk/mm/hugetlb.c | 24 +- trunk/mm/memory.c | 8 +- trunk/mm/mmap.c | 1 - trunk/mm/oom_kill.c | 49 +- trunk/mm/percpu.c | 2 +- trunk/mm/rmap.c | 15 +- trunk/mm/vmscan.c | 43 +- trunk/net/9p/trans_rdma.c | 29 +- trunk/net/9p/trans_virtio.c | 3 +- trunk/net/Kconfig | 2 +- trunk/net/atm/br2684.c | 12 +- trunk/net/core/dev.c | 2 +- trunk/net/core/iovec.c | 5 +- trunk/net/core/sock.c | 8 +- trunk/net/ipv4/igmp.c | 2 +- trunk/net/ipv4/ip_gre.c | 8 +- trunk/net/ipv4/ip_output.c | 19 +- trunk/net/ipv4/ip_sockglue.c | 3 - trunk/net/ipv4/netfilter/ipt_REJECT.c | 1 - trunk/net/ipv4/netfilter/nf_defrag_ipv4.c | 4 +- trunk/net/ipv4/netfilter/nf_nat_snmp_basic.c | 6 +- trunk/net/ipv4/route.c | 2 +- trunk/net/ipv4/tcp.c | 9 +- trunk/net/ipv4/tcp_input.c | 5 +- trunk/net/ipv4/xfrm4_policy.c | 2 +- trunk/net/ipv4/xfrm4_state.c | 33 +- trunk/net/ipv6/addrconf.c | 11 +- trunk/net/ipv6/addrlabel.c | 5 - trunk/net/ipv6/ip6_output.c | 18 +- trunk/net/ipv6/route.c | 2 +- trunk/net/ipv6/xfrm6_state.c | 33 +- trunk/net/llc/af_llc.c | 3 +- trunk/net/llc/llc_station.c | 2 +- trunk/net/netfilter/nf_conntrack_extend.c | 4 +- trunk/net/netfilter/nf_conntrack_sip.c | 2 +- trunk/net/netfilter/nf_tproxy_core.c | 6 +- trunk/net/rds/tcp_connect.c | 4 +- trunk/net/rds/tcp_listen.c | 4 +- trunk/net/rds/tcp_recv.c | 4 +- trunk/net/rds/tcp_send.c | 4 +- trunk/net/rose/af_rose.c | 4 +- trunk/net/sched/sch_atm.c | 4 + trunk/net/sctp/output.c | 1 + trunk/net/sunrpc/xprtsock.c | 28 +- trunk/net/wireless/wext-priv.c | 2 +- trunk/net/xfrm/xfrm_output.c | 2 +- trunk/net/xfrm/xfrm_policy.c | 5 +- trunk/net/xfrm/xfrm_state.c | 45 +- trunk/scripts/Makefile.build | 3 +- trunk/scripts/recordmcount.pl | 2 - trunk/security/tomoyo/common.c | 6 +- trunk/security/tomoyo/common.h | 3 + trunk/sound/core/pcm.c | 33 +- trunk/sound/core/pcm_native.c | 2 - trunk/sound/pci/hda/hda_intel.c | 3 - trunk/sound/pci/hda/patch_analog.c | 1 - trunk/sound/pci/hda/patch_conexant.c | 1 - trunk/sound/pci/hda/patch_nvhdmi.c | 2 +- trunk/sound/pci/hda/patch_realtek.c | 32 +- trunk/sound/pci/oxygen/oxygen.c | 4 - trunk/sound/pci/rme9652/hdsp.c | 1 - trunk/sound/pci/rme9652/hdspm.c | 1 - trunk/sound/ppc/snd_ps3.c | 2 +- trunk/sound/soc/s3c24xx/s3c-dma.c | 3 +- trunk/sound/soc/sh/migor.c | 15 +- trunk/sound/soc/soc-cache.c | 5 +- trunk/virt/kvm/eventfd.c | 3 +- trunk/virt/kvm/kvm_main.c | 4 +- 446 files changed, 3488 insertions(+), 8158 deletions(-) delete mode 100644 trunk/arch/arm/include/asm/hw_breakpoint.h delete mode 100644 trunk/arch/arm/include/asm/smp_mpidr.h delete mode 100644 trunk/arch/arm/kernel/hw_breakpoint.c delete mode 100644 trunk/arch/arm/mach-at91/board-flexibity.c create mode 100644 trunk/arch/arm/mach-tcc8k/Kconfig delete mode 100644 trunk/arch/arm/mach-ux500/board-mop500-regulators.c delete mode 100644 trunk/arch/arm/mach-ux500/board-mop500-sdi.c delete mode 100644 trunk/arch/arm/mach-ux500/board-mop500.h delete mode 100644 trunk/arch/arm/mach-ux500/hotplug.c delete mode 100644 trunk/arch/arm/mach-ux500/include/mach/mbox.h delete mode 100644 trunk/arch/arm/mach-ux500/include/mach/prcmu-regs.h delete mode 100644 trunk/arch/arm/mach-ux500/include/mach/prcmu.h delete mode 100644 trunk/arch/arm/mach-ux500/mbox.c delete mode 100644 trunk/arch/arm/mach-ux500/modem_irq.c delete mode 100644 trunk/arch/arm/mach-ux500/pins-db5500.h delete mode 100644 trunk/arch/arm/mach-ux500/prcmu.c delete mode 100644 trunk/arch/arm/mach-ux500/ste-dma40-db5500.h create mode 100644 trunk/arch/arm/plat-tcc/Kconfig create mode 100644 trunk/arch/arm/plat-tcc/Makefile create mode 100644 trunk/arch/arm/plat-tcc/include/mach/debug-macro.S create mode 100644 trunk/arch/arm/plat-tcc/include/mach/entry-macro.S create mode 100644 trunk/arch/arm/plat-tcc/include/mach/hardware.h create mode 100644 trunk/arch/arm/plat-tcc/include/mach/memory.h create mode 100644 trunk/arch/arm/plat-tcc/include/mach/system.h create mode 100644 trunk/arch/arm/plat-tcc/include/mach/tcc8k-regs.h create mode 100644 trunk/arch/arm/plat-tcc/include/mach/uncompress.h create mode 100644 trunk/arch/arm/plat-tcc/include/mach/vmalloc.h create mode 100644 trunk/arch/arm/plat-tcc/system.c delete mode 100644 trunk/arch/mn10300/mm/cache-disabled.c rename trunk/drivers/misc/{vmw_balloon.c => vmware_balloon.c} (100%) diff --git a/[refs] b/[refs] index f7e19a31a6ae..7009c59b9bfa 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a0a55682b83fd5f012afadcf415b030d7424ae68 +refs/heads/master: 83ef3338a2ae5d5bd9f5f6803b900b8067660054 diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 668682d1f5fa..8540dea232af 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1135,7 +1135,7 @@ ATLX ETHERNET DRIVERS M: Jay Cliburn M: Chris Snook M: Jie Yang -L: netdev@vger.kernel.org +L: atl1-devel@lists.sourceforge.net W: http://sourceforge.net/projects/atl1 W: http://atl1.sourceforge.net S: Maintained @@ -1220,7 +1220,7 @@ F: drivers/auxdisplay/ F: include/linux/cfag12864b.h AVR32 ARCHITECTURE -M: Hans-Christian Egtvedt +M: Haavard Skinnemoen W: http://www.atmel.com/products/AVR32/ W: http://avr32linux.org/ W: http://avrfreaks.net/ @@ -1228,7 +1228,7 @@ S: Supported F: arch/avr32/ AVR32/AT32AP MACHINE SUPPORT -M: Hans-Christian Egtvedt +M: Haavard Skinnemoen S: Supported F: arch/avr32/mach-at32ap/ @@ -2199,12 +2199,6 @@ W: http://acpi4asus.sf.net S: Maintained F: drivers/platform/x86/eeepc-laptop.c -EFIFB FRAMEBUFFER DRIVER -L: linux-fbdev@vger.kernel.org -M: Peter Jones -S: Maintained -F: drivers/video/efifb.c - EFS FILESYSTEM W: http://aeschi.ch.eu.org/efs/ S: Orphan @@ -2668,8 +2662,6 @@ M: Guenter Roeck L: lm-sensors@lm-sensors.org W: http://www.lm-sensors.org/ T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/ -T: quilt kernel.org/pub/linux/kernel/people/groeck/linux-staging/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git S: Maintained F: Documentation/hwmon/ F: drivers/hwmon/ @@ -3907,8 +3899,10 @@ F: Documentation/serial/moxa-smartio F: drivers/char/mxser.* MSI LAPTOP SUPPORT -M: Lee, Chun-Yi +M: Lennart Poettering L: platform-driver-x86@vger.kernel.org +W: https://tango.0pointer.de/mailman/listinfo/s270-linux +W: http://0pointer.de/lennart/tchibo.html S: Maintained F: drivers/platform/x86/msi-laptop.c @@ -3925,10 +3919,8 @@ S: Supported F: drivers/mfd/ MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND SDIO SUBSYSTEM -M: Chris Ball +S: Orphan L: linux-mmc@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git -S: Maintained F: drivers/mmc/ F: include/linux/mmc/ @@ -3950,7 +3942,7 @@ F: drivers/char/isicom.c F: include/linux/isicom.h MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER -M: Felipe Balbi +M: Felipe Balbi L: linux-usb@vger.kernel.org T: git git://gitorious.org/usb/usb.git S: Maintained @@ -4248,7 +4240,7 @@ S: Maintained F: drivers/char/hw_random/omap-rng.c OMAP USB SUPPORT -M: Felipe Balbi +M: Felipe Balbi M: David Brownell L: linux-usb@vger.kernel.org L: linux-omap@vger.kernel.org @@ -5099,10 +5091,8 @@ S: Maintained F: drivers/mmc/host/sdricoh_cs.c SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) DRIVER -M: Chris Ball +S: Orphan L: linux-mmc@vger.kernel.org -T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git -S: Maintained F: drivers/mmc/host/sdhci.* SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF) diff --git a/trunk/Makefile b/trunk/Makefile index cf7fcb3bf245..92ab33f16cf0 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 36 -EXTRAVERSION = -rc6 +EXTRAVERSION = -rc4 NAME = Sheep on Meth # *DOCUMENTATION* @@ -554,15 +554,8 @@ endif ifdef CONFIG_FRAME_POINTER KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls else -# Some targets (ARM with Thumb2, for example), can't be built with frame -# pointers. For those, we don't have FUNCTION_TRACER automatically -# select FRAME_POINTER. However, FUNCTION_TRACER adds -pg, and this is -# incompatible with -fomit-frame-pointer with current GCC, so we don't use -# -fomit-frame-pointer with FUNCTION_TRACER. -ifndef CONFIG_FUNCTION_TRACER KBUILD_CFLAGS += -fomit-frame-pointer endif -endif ifdef CONFIG_DEBUG_INFO KBUILD_CFLAGS += -g diff --git a/trunk/arch/Kconfig b/trunk/arch/Kconfig index fe48fc7a3eba..4877a8c8ee16 100644 --- a/trunk/arch/Kconfig +++ b/trunk/arch/Kconfig @@ -32,9 +32,8 @@ config HAVE_OPROFILE config KPROBES bool "Kprobes" - depends on MODULES + depends on KALLSYMS && MODULES depends on HAVE_KPROBES - select KALLSYMS help Kprobes allows you to trap at almost any kernel address and execute a callback function. register_kprobe() establishes @@ -46,6 +45,7 @@ config OPTPROBES def_bool y depends on KPROBES && HAVE_OPTPROBES depends on !PREEMPT + select KALLSYMS_ALL config HAVE_EFFICIENT_UNALIGNED_ACCESS bool diff --git a/trunk/arch/alpha/include/asm/cacheflush.h b/trunk/arch/alpha/include/asm/cacheflush.h index 012f1243b1c1..01d71e1c8a9e 100644 --- a/trunk/arch/alpha/include/asm/cacheflush.h +++ b/trunk/arch/alpha/include/asm/cacheflush.h @@ -43,8 +43,6 @@ extern void smp_imb(void); /* ??? Ought to use this in arch/alpha/kernel/signal.c too. */ #ifndef CONFIG_SMP -#include - extern void __load_new_mm_context(struct mm_struct *); static inline void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, diff --git a/trunk/arch/alpha/include/asm/unistd.h b/trunk/arch/alpha/include/asm/unistd.h index 058937bf5a77..804e5311c841 100644 --- a/trunk/arch/alpha/include/asm/unistd.h +++ b/trunk/arch/alpha/include/asm/unistd.h @@ -449,13 +449,10 @@ #define __NR_pwritev 491 #define __NR_rt_tgsigqueueinfo 492 #define __NR_perf_event_open 493 -#define __NR_fanotify_init 494 -#define __NR_fanotify_mark 495 -#define __NR_prlimit64 496 #ifdef __KERNEL__ -#define NR_SYSCALLS 497 +#define NR_SYSCALLS 494 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR @@ -466,7 +463,6 @@ #define __ARCH_WANT_SYS_OLD_GETRLIMIT #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_RT_SIGSUSPEND /* "Conditional" syscalls. What we want is diff --git a/trunk/arch/alpha/kernel/entry.S b/trunk/arch/alpha/kernel/entry.S index 6d159cee5f2f..b45d913a51c3 100644 --- a/trunk/arch/alpha/kernel/entry.S +++ b/trunk/arch/alpha/kernel/entry.S @@ -73,6 +73,8 @@ ldq $20, HAE_REG($19); \ stq $21, HAE_CACHE($19); \ stq $21, 0($20); \ + ldq $0, 0($sp); \ + ldq $1, 8($sp); \ 99:; \ ldq $19, 72($sp); \ ldq $20, 80($sp); \ @@ -314,24 +316,19 @@ ret_from_sys_call: cmovne $26, 0, $19 /* $19 = 0 => non-restartable */ ldq $0, SP_OFF($sp) and $0, 8, $0 - beq $0, ret_to_kernel -ret_to_user: + beq $0, restore_all +ret_from_reschedule: /* Make sure need_resched and sigpending don't change between sampling and the rti. */ lda $16, 7 call_pal PAL_swpipl ldl $5, TI_FLAGS($8) and $5, _TIF_WORK_MASK, $2 - bne $2, work_pending + bne $5, work_pending restore_all: RESTORE_ALL call_pal PAL_rti -ret_to_kernel: - lda $16, 7 - call_pal PAL_swpipl - br restore_all - .align 3 $syscall_error: /* @@ -366,7 +363,7 @@ $ret_success: * $8: current. * $19: The old syscall number, or zero if this is not a return * from a syscall that errored and is possibly restartable. - * $20: The old a3 value + * $20: Error indication. */ .align 4 @@ -395,18 +392,12 @@ $work_resched: $work_notifysig: mov $sp, $16 - bsr $1, do_switch_stack + br $1, do_switch_stack mov $sp, $17 mov $5, $18 - mov $19, $9 /* save old syscall number */ - mov $20, $10 /* save old a3 */ - and $5, _TIF_SIGPENDING, $2 - cmovne $2, 0, $9 /* we don't want double syscall restarts */ jsr $26, do_notify_resume - mov $9, $19 - mov $10, $20 bsr $1, undo_switch_stack - br ret_to_user + br restore_all .end work_pending /* @@ -439,7 +430,6 @@ strace: beq $1, 1f ldq $27, 0($2) 1: jsr $26, ($27), sys_gettimeofday -ret_from_straced: ldgp $gp, 0($26) /* check return.. */ @@ -660,7 +650,7 @@ kernel_thread: /* We don't actually care for a3 success widgetry in the kernel. Not for positive errno values. */ stq $0, 0($sp) /* $0 */ - br ret_to_kernel + br restore_all .end kernel_thread /* @@ -767,15 +757,11 @@ sys_vfork: .ent sys_sigreturn sys_sigreturn: .prologue 0 - lda $9, ret_from_straced - cmpult $26, $9, $9 mov $sp, $17 lda $18, -SWITCH_STACK_SIZE($sp) lda $sp, -SWITCH_STACK_SIZE($sp) jsr $26, do_sigreturn - bne $9, 1f - jsr $26, syscall_trace -1: br $1, undo_switch_stack + br $1, undo_switch_stack br ret_from_sys_call .end sys_sigreturn @@ -784,18 +770,46 @@ sys_sigreturn: .ent sys_rt_sigreturn sys_rt_sigreturn: .prologue 0 - lda $9, ret_from_straced - cmpult $26, $9, $9 mov $sp, $17 lda $18, -SWITCH_STACK_SIZE($sp) lda $sp, -SWITCH_STACK_SIZE($sp) jsr $26, do_rt_sigreturn - bne $9, 1f - jsr $26, syscall_trace -1: br $1, undo_switch_stack + br $1, undo_switch_stack br ret_from_sys_call .end sys_rt_sigreturn + .align 4 + .globl sys_sigsuspend + .ent sys_sigsuspend +sys_sigsuspend: + .prologue 0 + mov $sp, $17 + br $1, do_switch_stack + mov $sp, $18 + subq $sp, 16, $sp + stq $26, 0($sp) + jsr $26, do_sigsuspend + ldq $26, 0($sp) + lda $sp, SWITCH_STACK_SIZE+16($sp) + ret +.end sys_sigsuspend + + .align 4 + .globl sys_rt_sigsuspend + .ent sys_rt_sigsuspend +sys_rt_sigsuspend: + .prologue 0 + mov $sp, $18 + br $1, do_switch_stack + mov $sp, $19 + subq $sp, 16, $sp + stq $26, 0($sp) + jsr $26, do_rt_sigsuspend + ldq $26, 0($sp) + lda $sp, SWITCH_STACK_SIZE+16($sp) + ret +.end sys_rt_sigsuspend + .align 4 .globl sys_sethae .ent sys_sethae @@ -914,6 +928,15 @@ sys_execve: jmp $31, do_sys_execve .end sys_execve + .align 4 + .globl osf_sigprocmask + .ent osf_sigprocmask +osf_sigprocmask: + .prologue 0 + mov $sp, $18 + jmp $31, sys_osf_sigprocmask +.end osf_sigprocmask + .align 4 .globl alpha_ni_syscall .ent alpha_ni_syscall diff --git a/trunk/arch/alpha/kernel/err_ev6.c b/trunk/arch/alpha/kernel/err_ev6.c index 253cf1a87481..8ca6345bf131 100644 --- a/trunk/arch/alpha/kernel/err_ev6.c +++ b/trunk/arch/alpha/kernel/err_ev6.c @@ -90,13 +90,11 @@ static int ev6_parse_cbox(u64 c_addr, u64 c1_syn, u64 c2_syn, u64 c_stat, u64 c_sts, int print) { - static const char * const sourcename[] = { - "UNKNOWN", "UNKNOWN", "UNKNOWN", - "MEMORY", "BCACHE", "DCACHE", - "BCACHE PROBE", "BCACHE PROBE" - }; - static const char * const streamname[] = { "D", "I" }; - static const char * const bitsname[] = { "SINGLE", "DOUBLE" }; + char *sourcename[] = { "UNKNOWN", "UNKNOWN", "UNKNOWN", + "MEMORY", "BCACHE", "DCACHE", + "BCACHE PROBE", "BCACHE PROBE" }; + char *streamname[] = { "D", "I" }; + char *bitsname[] = { "SINGLE", "DOUBLE" }; int status = MCHK_DISPOSITION_REPORT; int source = -1, stream = -1, bits = -1; diff --git a/trunk/arch/alpha/kernel/err_marvel.c b/trunk/arch/alpha/kernel/err_marvel.c index 648ae88aeb8a..5c905aaaeccd 100644 --- a/trunk/arch/alpha/kernel/err_marvel.c +++ b/trunk/arch/alpha/kernel/err_marvel.c @@ -589,23 +589,22 @@ marvel_print_pox_spl_cmplt(u64 spl_cmplt) static void marvel_print_pox_trans_sum(u64 trans_sum) { - static const char * const pcix_cmd[] = { - "Interrupt Acknowledge", - "Special Cycle", - "I/O Read", - "I/O Write", - "Reserved", - "Reserved / Device ID Message", - "Memory Read", - "Memory Write", - "Reserved / Alias to Memory Read Block", - "Reserved / Alias to Memory Write Block", - "Configuration Read", - "Configuration Write", - "Memory Read Multiple / Split Completion", - "Dual Address Cycle", - "Memory Read Line / Memory Read Block", - "Memory Write and Invalidate / Memory Write Block" + char *pcix_cmd[] = { "Interrupt Acknowledge", + "Special Cycle", + "I/O Read", + "I/O Write", + "Reserved", + "Reserved / Device ID Message", + "Memory Read", + "Memory Write", + "Reserved / Alias to Memory Read Block", + "Reserved / Alias to Memory Write Block", + "Configuration Read", + "Configuration Write", + "Memory Read Multiple / Split Completion", + "Dual Address Cycle", + "Memory Read Line / Memory Read Block", + "Memory Write and Invalidate / Memory Write Block" }; #define IO7__POX_TRANSUM__PCI_ADDR__S (0) diff --git a/trunk/arch/alpha/kernel/err_titan.c b/trunk/arch/alpha/kernel/err_titan.c index c3b3781a03de..f7ed97ce0dfd 100644 --- a/trunk/arch/alpha/kernel/err_titan.c +++ b/trunk/arch/alpha/kernel/err_titan.c @@ -75,12 +75,8 @@ titan_parse_p_serror(int which, u64 serror, int print) int status = MCHK_DISPOSITION_REPORT; #ifdef CONFIG_VERBOSE_MCHECK - static const char * const serror_src[] = { - "GPCI", "APCI", "AGP HP", "AGP LP" - }; - static const char * const serror_cmd[] = { - "DMA Read", "DMA RMW", "SGTE Read", "Reserved" - }; + char *serror_src[] = {"GPCI", "APCI", "AGP HP", "AGP LP"}; + char *serror_cmd[] = {"DMA Read", "DMA RMW", "SGTE Read", "Reserved"}; #endif /* CONFIG_VERBOSE_MCHECK */ #define TITAN__PCHIP_SERROR__LOST_UECC (1UL << 0) @@ -144,15 +140,14 @@ titan_parse_p_perror(int which, int port, u64 perror, int print) int status = MCHK_DISPOSITION_REPORT; #ifdef CONFIG_VERBOSE_MCHECK - static const char * const perror_cmd[] = { - "Interrupt Acknowledge", "Special Cycle", - "I/O Read", "I/O Write", - "Reserved", "Reserved", - "Memory Read", "Memory Write", - "Reserved", "Reserved", - "Configuration Read", "Configuration Write", - "Memory Read Multiple", "Dual Address Cycle", - "Memory Read Line", "Memory Write and Invalidate" + char *perror_cmd[] = { "Interrupt Acknowledge", "Special Cycle", + "I/O Read", "I/O Write", + "Reserved", "Reserved", + "Memory Read", "Memory Write", + "Reserved", "Reserved", + "Configuration Read", "Configuration Write", + "Memory Read Multiple", "Dual Address Cycle", + "Memory Read Line","Memory Write and Invalidate" }; #endif /* CONFIG_VERBOSE_MCHECK */ @@ -278,11 +273,11 @@ titan_parse_p_agperror(int which, u64 agperror, int print) int cmd, len; unsigned long addr; - static const char * const agperror_cmd[] = { - "Read (low-priority)", "Read (high-priority)", - "Write (low-priority)", "Write (high-priority)", - "Reserved", "Reserved", - "Flush", "Fence" + char *agperror_cmd[] = { "Read (low-priority)", "Read (high-priority)", + "Write (low-priority)", + "Write (high-priority)", + "Reserved", "Reserved", + "Flush", "Fence" }; #endif /* CONFIG_VERBOSE_MCHECK */ diff --git a/trunk/arch/alpha/kernel/osf_sys.c b/trunk/arch/alpha/kernel/osf_sys.c index 547e8b84b2f7..5d1e6d6ce684 100644 --- a/trunk/arch/alpha/kernel/osf_sys.c +++ b/trunk/arch/alpha/kernel/osf_sys.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -68,6 +69,7 @@ SYSCALL_DEFINE4(osf_set_program_attributes, unsigned long, text_start, { struct mm_struct *mm; + lock_kernel(); mm = current->mm; mm->end_code = bss_start + bss_len; mm->start_brk = bss_start + bss_len; @@ -76,6 +78,7 @@ SYSCALL_DEFINE4(osf_set_program_attributes, unsigned long, text_start, printk("set_program_attributes(%lx %lx %lx %lx)\n", text_start, text_len, bss_start, bss_len); #endif + unlock_kernel(); return 0; } @@ -514,6 +517,7 @@ SYSCALL_DEFINE2(osf_proplist_syscall, enum pl_code, code, long error; int __user *min_buf_size_ptr; + lock_kernel(); switch (code) { case PL_SET: if (get_user(error, &args->set.nbytes)) @@ -543,6 +547,7 @@ SYSCALL_DEFINE2(osf_proplist_syscall, enum pl_code, code, error = -EOPNOTSUPP; break; }; + unlock_kernel(); return error; } @@ -589,7 +594,7 @@ SYSCALL_DEFINE2(osf_sigstack, struct sigstack __user *, uss, SYSCALL_DEFINE3(osf_sysinfo, int, command, char __user *, buf, long, count) { - const char *sysinfo_table[] = { + char *sysinfo_table[] = { utsname()->sysname, utsname()->nodename, utsname()->release, @@ -601,7 +606,7 @@ SYSCALL_DEFINE3(osf_sysinfo, int, command, char __user *, buf, long, count) "dummy", /* secure RPC domain */ }; unsigned long offset; - const char *res; + char *res; long len, err = -EINVAL; offset = command-1; diff --git a/trunk/arch/alpha/kernel/pci-sysfs.c b/trunk/arch/alpha/kernel/pci-sysfs.c index b899e95f79fd..738fc824e2ea 100644 --- a/trunk/arch/alpha/kernel/pci-sysfs.c +++ b/trunk/arch/alpha/kernel/pci-sysfs.c @@ -66,7 +66,7 @@ static int pci_mmap_resource(struct kobject *kobj, { struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); - struct resource *res = attr->private; + struct resource *res = (struct resource *)attr->private; enum pci_mmap_state mmap_type; struct pci_bus_region bar; int i; diff --git a/trunk/arch/alpha/kernel/process.c b/trunk/arch/alpha/kernel/process.c index 3ec35066f1dc..842dba308eab 100644 --- a/trunk/arch/alpha/kernel/process.c +++ b/trunk/arch/alpha/kernel/process.c @@ -356,7 +356,7 @@ dump_elf_thread(elf_greg_t *dest, struct pt_regs *pt, struct thread_info *ti) dest[27] = pt->r27; dest[28] = pt->r28; dest[29] = pt->gp; - dest[30] = ti == current_thread_info() ? rdusp() : ti->pcb.usp; + dest[30] = rdusp(); dest[31] = pt->pc; /* Once upon a time this was the PS value. Which is stupid diff --git a/trunk/arch/alpha/kernel/signal.c b/trunk/arch/alpha/kernel/signal.c index d290845aef59..0932dbb1ef8e 100644 --- a/trunk/arch/alpha/kernel/signal.c +++ b/trunk/arch/alpha/kernel/signal.c @@ -41,20 +41,46 @@ static void do_signal(struct pt_regs *, struct switch_stack *, /* * The OSF/1 sigprocmask calling sequence is different from the * C sigprocmask() sequence.. + * + * how: + * 1 - SIG_BLOCK + * 2 - SIG_UNBLOCK + * 3 - SIG_SETMASK + * + * We change the range to -1 .. 1 in order to let gcc easily + * use the conditional move instructions. + * + * Note that we don't need to acquire the kernel lock for SMP + * operation, as all of this is local to this thread. */ -SYSCALL_DEFINE2(osf_sigprocmask, int, how, unsigned long, newmask) +SYSCALL_DEFINE3(osf_sigprocmask, int, how, unsigned long, newmask, + struct pt_regs *, regs) { - sigset_t oldmask; - sigset_t mask; - unsigned long res; - - siginitset(&mask, newmask & ~_BLOCKABLE); - res = sigprocmask(how, &mask, &oldmask); - if (!res) { - force_successful_syscall_return(); - res = oldmask.sig[0]; + unsigned long oldmask = -EINVAL; + + if ((unsigned long)how-1 <= 2) { + long sign = how-2; /* -1 .. 1 */ + unsigned long block, unblock; + + newmask &= _BLOCKABLE; + spin_lock_irq(¤t->sighand->siglock); + oldmask = current->blocked.sig[0]; + + unblock = oldmask & ~newmask; + block = oldmask | newmask; + if (!sign) + block = unblock; + if (sign <= 0) + newmask = block; + if (_NSIG_WORDS > 1 && sign > 0) + sigemptyset(¤t->blocked); + current->blocked.sig[0] = newmask; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + + regs->r0 = 0; /* special no error return */ } - return res; + return oldmask; } SYSCALL_DEFINE3(osf_sigaction, int, sig, @@ -68,9 +94,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig, old_sigset_t mask; if (!access_ok(VERIFY_READ, act, sizeof(*act)) || __get_user(new_ka.sa.sa_handler, &act->sa_handler) || - __get_user(new_ka.sa.sa_flags, &act->sa_flags) || - __get_user(mask, &act->sa_mask)) + __get_user(new_ka.sa.sa_flags, &act->sa_flags)) return -EFAULT; + __get_user(mask, &act->sa_mask); siginitset(&new_ka.sa.sa_mask, mask); new_ka.ka_restorer = NULL; } @@ -80,9 +106,9 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig, if (!ret && oact) { if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || - __put_user(old_ka.sa.sa_flags, &oact->sa_flags) || - __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask)) + __put_user(old_ka.sa.sa_flags, &oact->sa_flags)) return -EFAULT; + __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); } return ret; @@ -118,7 +144,8 @@ SYSCALL_DEFINE5(rt_sigaction, int, sig, const struct sigaction __user *, act, /* * Atomically swap in the new signal mask, and wait for a signal. */ -SYSCALL_DEFINE1(sigsuspend, old_sigset_t, mask) +asmlinkage int +do_sigsuspend(old_sigset_t mask, struct pt_regs *regs, struct switch_stack *sw) { mask &= _BLOCKABLE; spin_lock_irq(¤t->sighand->siglock); @@ -127,6 +154,41 @@ SYSCALL_DEFINE1(sigsuspend, old_sigset_t, mask) recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); + /* Indicate EINTR on return from any possible signal handler, + which will not come back through here, but via sigreturn. */ + regs->r0 = EINTR; + regs->r19 = 1; + + current->state = TASK_INTERRUPTIBLE; + schedule(); + set_thread_flag(TIF_RESTORE_SIGMASK); + return -ERESTARTNOHAND; +} + +asmlinkage int +do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize, + struct pt_regs *regs, struct switch_stack *sw) +{ + sigset_t set; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + if (copy_from_user(&set, uset, sizeof(set))) + return -EFAULT; + + sigdelsetmask(&set, ~_BLOCKABLE); + spin_lock_irq(¤t->sighand->siglock); + current->saved_sigmask = current->blocked; + current->blocked = set; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + + /* Indicate EINTR on return from any possible signal handler, + which will not come back through here, but via sigreturn. */ + regs->r0 = EINTR; + regs->r19 = 1; + current->state = TASK_INTERRUPTIBLE; schedule(); set_thread_flag(TIF_RESTORE_SIGMASK); @@ -177,8 +239,6 @@ restore_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, unsigned long usp; long i, err = __get_user(regs->pc, &sc->sc_pc); - current_thread_info()->restart_block.fn = do_no_restart_syscall; - sw->r26 = (unsigned long) ret_from_sys_call; err |= __get_user(regs->r0, sc->sc_regs+0); @@ -531,6 +591,7 @@ syscall_restart(unsigned long r0, unsigned long r19, regs->pc -= 4; break; case ERESTART_RESTARTBLOCK: + current_thread_info()->restart_block.fn = do_no_restart_syscall; regs->r0 = EINTR; break; } diff --git a/trunk/arch/alpha/kernel/srm_env.c b/trunk/arch/alpha/kernel/srm_env.c index f0df3fbd8402..4afc1a1e2e5a 100644 --- a/trunk/arch/alpha/kernel/srm_env.c +++ b/trunk/arch/alpha/kernel/srm_env.c @@ -87,7 +87,7 @@ static int srm_env_proc_show(struct seq_file *m, void *v) srm_env_t *entry; char *page; - entry = m->private; + entry = (srm_env_t *)m->private; page = (char *)__get_free_page(GFP_USER); if (!page) return -ENOMEM; diff --git a/trunk/arch/alpha/kernel/systbls.S b/trunk/arch/alpha/kernel/systbls.S index a6a1de9db16f..09acb786e72b 100644 --- a/trunk/arch/alpha/kernel/systbls.S +++ b/trunk/arch/alpha/kernel/systbls.S @@ -58,7 +58,7 @@ sys_call_table: .quad sys_open /* 45 */ .quad alpha_ni_syscall .quad sys_getxgid - .quad sys_osf_sigprocmask + .quad osf_sigprocmask .quad alpha_ni_syscall .quad alpha_ni_syscall /* 50 */ .quad sys_acct @@ -512,9 +512,6 @@ sys_call_table: .quad sys_pwritev .quad sys_rt_tgsigqueueinfo .quad sys_perf_event_open - .quad sys_fanotify_init - .quad sys_fanotify_mark /* 495 */ - .quad sys_prlimit64 .size sys_call_table, . - sys_call_table .type sys_call_table, @object diff --git a/trunk/arch/alpha/kernel/time.c b/trunk/arch/alpha/kernel/time.c index 396af1799ea4..eacceb26d9c8 100644 --- a/trunk/arch/alpha/kernel/time.c +++ b/trunk/arch/alpha/kernel/time.c @@ -191,16 +191,16 @@ irqreturn_t timer_interrupt(int irq, void *dev) write_sequnlock(&xtime_lock); - if (test_perf_event_pending()) { - clear_perf_event_pending(); - perf_event_do_pending(); - } - #ifndef CONFIG_SMP while (nticks--) update_process_times(user_mode(get_irq_regs())); #endif + if (test_perf_event_pending()) { + clear_perf_event_pending(); + perf_event_do_pending(); + } + return IRQ_HANDLED; } diff --git a/trunk/arch/alpha/kernel/traps.c b/trunk/arch/alpha/kernel/traps.c index 0414e021a91c..b14f015008ad 100644 --- a/trunk/arch/alpha/kernel/traps.c +++ b/trunk/arch/alpha/kernel/traps.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -622,6 +623,7 @@ do_entUna(void * va, unsigned long opcode, unsigned long reg, return; } + lock_kernel(); printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n", pc, va, opcode, reg); do_exit(SIGSEGV); @@ -644,6 +646,7 @@ do_entUna(void * va, unsigned long opcode, unsigned long reg, * Yikes! No one to forward the exception to. * Since the registers are in a weird format, dump them ourselves. */ + lock_kernel(); printk("%s(%d): unhandled unaligned exception\n", current->comm, task_pid_nr(current)); diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index b404e5eec0c1..8d395352f1c9 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -19,8 +19,6 @@ config ARM select HAVE_KPROBES if (!XIP_KERNEL) select HAVE_KRETPROBES if (HAVE_KPROBES) select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) - select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) - select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) select HAVE_GENERIC_DMA_COHERENT select HAVE_KERNEL_GZIP select HAVE_KERNEL_LZO @@ -28,7 +26,6 @@ config ARM select HAVE_PERF_EVENTS select PERF_USE_VMALLOC select HAVE_REGS_AND_STACK_ACCESS_API - select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -148,9 +145,6 @@ config ARCH_HAS_CPUFREQ and that the relevant menu configurations are displayed for it. -config ARCH_HAS_CPU_IDLE_WAIT - def_bool y - config GENERIC_HWEIGHT bool default y @@ -277,6 +271,7 @@ config ARCH_AT91 bool "Atmel AT91" select ARCH_REQUIRE_GPIOLIB select HAVE_CLK + select ARCH_USES_GETTIMEOFFSET help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. @@ -753,6 +748,15 @@ config ARCH_SHARK Support for the StrongARM based Digital DNARD machine, also known as "Shark" (). +config ARCH_TCC_926 + bool "Telechips TCC ARM926-based systems" + select CPU_ARM926T + select HAVE_CLK + select COMMON_CLKDEV + select GENERIC_CLOCKEVENTS + help + Support for Telechips TCC ARM926-based systems. + config ARCH_LH7A40X bool "Sharp LH7A40X" select CPU_ARM922T @@ -921,6 +925,8 @@ source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-spear/Kconfig" +source "arch/arm/plat-tcc/Kconfig" + if ARCH_S3C2410 source "arch/arm/mach-s3c2400/Kconfig" source "arch/arm/mach-s3c2410/Kconfig" @@ -1008,7 +1014,7 @@ endif config ARM_ERRATA_411920 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" - depends on CPU_V6 + depends on CPU_V6 && !SMP help Invalidation of the Instruction Cache operation can fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. @@ -1056,32 +1062,6 @@ config ARM_ERRATA_460075 ACTLR register. Note that setting specific bits in the ACTLR register may not be available in non-secure mode. -config ARM_ERRATA_742230 - bool "ARM errata: DMB operation may be faulty" - depends on CPU_V7 && SMP - help - This option enables the workaround for the 742230 Cortex-A9 - (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction - between two write operations may not ensure the correct visibility - ordering of the two writes. This workaround sets a specific bit in - the diagnostic register of the Cortex-A9 which causes the DMB - instruction to behave as a DSB, ensuring the correct behaviour of - the two writes. - -config ARM_ERRATA_742231 - bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" - depends on CPU_V7 && SMP - help - This option enables the workaround for the 742231 Cortex-A9 - (r2p0..r2p2) erratum. Under certain conditions, specific to the - Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, - accessing some data located in the same cache line, may get corrupted - data due to bad handling of the address hazard when the line gets - replaced from one of the CPUs at the same time as another CPU is - accessing it. This workaround sets specific bits in the diagnostic - register of the Cortex-A9 which reduces the linefill issuing - capabilities of the processor. - config PL310_ERRATA_588369 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" depends on CACHE_L2X0 && ARCH_OMAP4 @@ -1173,13 +1153,13 @@ source "kernel/time/Kconfig" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" - depends on EXPERIMENTAL - depends on GENERIC_CLOCKEVENTS - depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ + depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\ - ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 + ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) + depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS - select HAVE_ARM_SCU + select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\ + ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -1197,19 +1177,6 @@ config SMP If you don't know what to do here, say N. -config SMP_ON_UP - bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" - depends on EXPERIMENTAL - depends on SMP && !XIP && !THUMB2_KERNEL - default y - help - SMP kernels contain instructions which fail on non-SMP processors. - Enabling this option allows the kernel to modify itself to make - these instructions safe. Disabling it allows about 1K of space - savings. - - If you don't know what to do here, say Y. - config HAVE_ARM_SCU bool depends on SMP @@ -1260,9 +1227,12 @@ config HOTPLUG_CPU config LOCAL_TIMERS bool "Use local timer interrupts" - depends on SMP + depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \ + REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ + ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4) default y - select HAVE_ARM_TWD + select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \ + ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS help Enable support for local timers on SMP platforms, rather then the legacy IPI broadcast method. Local timers allows the system diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 4dbce538fec4..91344af75f39 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -27,11 +27,6 @@ config ARM_UNWIND the performance is not affected. Currently, this feature only works with EABI compilers. If unsure say Y. -config OLD_MCOUNT - bool - depends on FUNCTION_TRACER && FRAME_POINTER - default y - config DEBUG_USER bool "Verbose user fault messages" help diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 59c1ce858fc8..4e0b6c8d7ed3 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -183,6 +183,7 @@ machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHMOBILE) := shmobile machine-$(CONFIG_ARCH_STMP378X) := stmp378x machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx +machine-$(CONFIG_ARCH_TCC8K) := tcc8k machine-$(CONFIG_ARCH_TEGRA) := tegra machine-$(CONFIG_ARCH_U300) := u300 machine-$(CONFIG_ARCH_U8500) := ux500 @@ -202,6 +203,7 @@ plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_OMAP) := omap plat-$(CONFIG_ARCH_S3C64XX) := samsung plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx +plat-$(CONFIG_ARCH_TCC_926) := tcc plat-$(CONFIG_PLAT_IOP) := iop plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion diff --git a/trunk/arch/arm/boot/compressed/Makefile b/trunk/arch/arm/boot/compressed/Makefile index 65a7c1c588a9..b23f6bc46cfa 100644 --- a/trunk/arch/arm/boot/compressed/Makefile +++ b/trunk/arch/arm/boot/compressed/Makefile @@ -116,5 +116,5 @@ CFLAGS_font.o := -Dstatic= $(obj)/font.c: $(FONTC) $(call cmd,shipped) -$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG) +$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile .config @sed "$(SEDFLAGS)" < $< > $@ diff --git a/trunk/arch/arm/common/it8152.c b/trunk/arch/arm/common/it8152.c index 1bec96e85196..7974baacafce 100644 --- a/trunk/arch/arm/common/it8152.c +++ b/trunk/arch/arm/common/it8152.c @@ -271,14 +271,6 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) ((dma_addr + size - PHYS_OFFSET) >= SZ_64M); } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= PHYS_OFFSET + SZ_64M - 1) - return 0; - - return -EIO; -} - int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) { it8152_io.start = IT8152_IO_BASE + 0x12000; diff --git a/trunk/arch/arm/common/pl330.c b/trunk/arch/arm/common/pl330.c index 8f0f86db3602..5ebbab6242a7 100644 --- a/trunk/arch/arm/common/pl330.c +++ b/trunk/arch/arm/common/pl330.c @@ -146,7 +146,8 @@ #define DESIGNER 0x41 #define REVISION 0x0 #define INTEG_CFG 0x0 -#define PERIPH_ID_VAL ((PART << 0) | (DESIGNER << 12)) +#define PERIPH_ID_VAL ((PART << 0) | (DESIGNER << 12) \ + | (REVISION << 20) | (INTEG_CFG << 24)) #define PCELL_ID_VAL 0xb105f00d @@ -1858,10 +1859,10 @@ int pl330_add(struct pl330_info *pi) regs = pi->base; /* Check if we can handle this DMAC */ - if ((get_id(pi, PERIPH_ID) & 0xfffff) != PERIPH_ID_VAL + if (get_id(pi, PERIPH_ID) != PERIPH_ID_VAL || get_id(pi, PCELL_ID) != PCELL_ID_VAL) { dev_err(pi->dev, "PERIPH_ID 0x%x, PCELL_ID 0x%x !\n", - get_id(pi, PERIPH_ID), get_id(pi, PCELL_ID)); + readl(regs + PERIPH_ID), readl(regs + PCELL_ID)); return -EINVAL; } diff --git a/trunk/arch/arm/common/sa1111.c b/trunk/arch/arm/common/sa1111.c index c0258a8c103b..517d50ddbeb3 100644 --- a/trunk/arch/arm/common/sa1111.c +++ b/trunk/arch/arm/common/sa1111.c @@ -678,7 +678,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, * %-EBUSY physical address already marked in-use. * %0 successful. */ -static int __devinit +static int __sa1111_probe(struct device *me, struct resource *mem, int irq) { struct sa1111 *sachip; diff --git a/trunk/arch/arm/configs/realview-smp_defconfig b/trunk/arch/arm/configs/realview-smp_defconfig index 5ca7a61f7c01..9312ef9f9bf4 100644 --- a/trunk/arch/arm/configs/realview-smp_defconfig +++ b/trunk/arch/arm/configs/realview-smp_defconfig @@ -39,7 +39,6 @@ CONFIG_MTD_CFI=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_ARM_INTEGRATOR=y -CONFIG_ARM_CHARLCD=y CONFIG_NETDEVICES=y CONFIG_SMSC_PHY=y CONFIG_NET_ETHERNET=y @@ -53,13 +52,10 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_VERSATILE=y -CONFIG_SPI=y -CONFIG_GPIOLIB=y # CONFIG_HWMON is not set CONFIG_FB=y CONFIG_FB_ARMCLCD=y +# CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set @@ -74,13 +70,7 @@ CONFIG_SND_ARMAACI=y # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_ARMMMCI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_PL031=y +CONFIG_INOTIFY=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_CRAMFS=y @@ -90,7 +80,6 @@ CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y # CONFIG_SCHED_DEBUG is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set diff --git a/trunk/arch/arm/configs/realview_defconfig b/trunk/arch/arm/configs/realview_defconfig index fcaa60328051..fb75192ee7e5 100644 --- a/trunk/arch/arm/configs/realview_defconfig +++ b/trunk/arch/arm/configs/realview_defconfig @@ -38,7 +38,6 @@ CONFIG_MTD_CFI=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_ARM_INTEGRATOR=y -CONFIG_ARM_CHARLCD=y CONFIG_NETDEVICES=y CONFIG_SMSC_PHY=y CONFIG_NET_ETHERNET=y @@ -52,13 +51,10 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_VERSATILE=y -CONFIG_SPI=y -CONFIG_GPIOLIB=y # CONFIG_HWMON is not set CONFIG_FB=y CONFIG_FB_ARMCLCD=y +# CONFIG_VGA_CONSOLE is not set CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set @@ -73,13 +69,7 @@ CONFIG_SND_ARMAACI=y # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_ARMMMCI=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_PL031=y +CONFIG_INOTIFY=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_CRAMFS=y @@ -89,7 +79,6 @@ CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y # CONFIG_SCHED_DEBUG is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set diff --git a/trunk/arch/arm/configs/u300_defconfig b/trunk/arch/arm/configs/u300_defconfig index c1c252cdca60..46e5e0747269 100644 --- a/trunk/arch/arm/configs/u300_defconfig +++ b/trunk/arch/arm/configs/u300_defconfig @@ -28,9 +28,26 @@ CONFIG_CPU_IDLE=y CONFIG_FPE_NWFPE=y CONFIG_PM=y # CONFIG_SUSPEND is not set +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_IPV6 is not set +# CONFIG_WIRELESS is not set CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_MISC_DEVICES is not set +CONFIG_MTD=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_ECC_SMC=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set @@ -41,6 +58,7 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_HW_RANDOM is not set CONFIG_I2C=y +CONFIG_POWER_SUPPLY=y # CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_REGULATOR=y @@ -48,10 +66,24 @@ CONFIG_FB=y CONFIG_BACKLIGHT_LCD_SUPPORT=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_VGA_CONSOLE is not set +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_SOC=y # CONFIG_HID_SUPPORT is not set # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y +CONFIG_MMC_DEBUG=y CONFIG_MMC_ARMMMCI=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_RTC_CLASS=y # CONFIG_RTC_HCTOSYS is not set CONFIG_RTC_DRV_COH901331=y @@ -61,11 +93,12 @@ CONFIG_COH901318=y CONFIG_FUSE_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y +# CONFIG_NETWORK_FILESYSTEMS is not set CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y -CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y +# CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHED_DEBUG is not set CONFIG_TIMER_STATS=y # CONFIG_DEBUG_PREEMPT is not set diff --git a/trunk/arch/arm/include/asm/assembler.h b/trunk/arch/arm/include/asm/assembler.h index 062b58c029ab..6e8f05c8a1c8 100644 --- a/trunk/arch/arm/include/asm/assembler.h +++ b/trunk/arch/arm/include/asm/assembler.h @@ -154,39 +154,16 @@ .long 9999b,9001f; \ .popsection -#ifdef CONFIG_SMP -#define ALT_SMP(instr...) \ -9998: instr -#define ALT_UP(instr...) \ - .pushsection ".alt.smp.init", "a" ;\ - .long 9998b ;\ - instr ;\ - .popsection -#define ALT_UP_B(label) \ - .equ up_b_offset, label - 9998b ;\ - .pushsection ".alt.smp.init", "a" ;\ - .long 9998b ;\ - b . + up_b_offset ;\ - .popsection -#else -#define ALT_SMP(instr...) -#define ALT_UP(instr...) instr -#define ALT_UP_B(label) b label -#endif - /* * SMP data memory barrier */ .macro smp_dmb #ifdef CONFIG_SMP #if __LINUX_ARM_ARCH__ >= 7 - ALT_SMP(dmb) + dmb #elif __LINUX_ARM_ARCH__ == 6 - ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb -#else -#error Incompatible SMP platform + mcr p15, 0, r0, c7, c10, 5 @ dmb #endif - ALT_UP(nop) #endif .endm diff --git a/trunk/arch/arm/include/asm/cacheflush.h b/trunk/arch/arm/include/asm/cacheflush.h index 3acd8fa25e34..4656a24058d2 100644 --- a/trunk/arch/arm/include/asm/cacheflush.h +++ b/trunk/arch/arm/include/asm/cacheflush.h @@ -137,10 +137,10 @@ #endif /* - * This flag is used to indicate that the page pointed to by a pte is clean - * and does not require cleaning before returning it to the user. + * This flag is used to indicate that the page pointed to by a pte + * is dirty and requires cleaning before returning it to the user. */ -#define PG_dcache_clean PG_arch_1 +#define PG_dcache_dirty PG_arch_1 /* * MM Cache Management @@ -156,12 +156,6 @@ * Please note that the implementation of these, and the required * effects are cache-type (VIVT/VIPT/PIPT) specific. * - * flush_icache_all() - * - * Unconditionally clean and invalidate the entire icache. - * Currently only needed for cache-v6.S and cache-v7.S, see - * __flush_icache_all for the generic implementation. - * * flush_kern_all() * * Unconditionally clean and invalidate the entire cache. @@ -212,7 +206,6 @@ */ struct cpu_cache_fns { - void (*flush_icache_all)(void); void (*flush_kern_all)(void); void (*flush_user_all)(void); void (*flush_user_range)(unsigned long, unsigned long, unsigned int); @@ -234,7 +227,6 @@ struct cpu_cache_fns { extern struct cpu_cache_fns cpu_cache; -#define __cpuc_flush_icache_all cpu_cache.flush_icache_all #define __cpuc_flush_kern_all cpu_cache.flush_kern_all #define __cpuc_flush_user_all cpu_cache.flush_user_all #define __cpuc_flush_user_range cpu_cache.flush_user_range @@ -254,7 +246,6 @@ extern struct cpu_cache_fns cpu_cache; #else -#define __cpuc_flush_icache_all __glue(_CACHE,_flush_icache_all) #define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) @@ -262,7 +253,6 @@ extern struct cpu_cache_fns cpu_cache; #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) -extern void __cpuc_flush_icache_all(void); extern void __cpuc_flush_kern_all(void); extern void __cpuc_flush_user_all(void); extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); @@ -301,37 +291,6 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, /* * Convert calls to our calling convention. */ - -/* Invalidate I-cache */ -#define __flush_icache_all_generic() \ - asm("mcr p15, 0, %0, c7, c5, 0" \ - : : "r" (0)); - -/* Invalidate I-cache inner shareable */ -#define __flush_icache_all_v7_smp() \ - asm("mcr p15, 0, %0, c7, c1, 0" \ - : : "r" (0)); - -/* - * Optimized __flush_icache_all for the common cases. Note that UP ARMv7 - * will fall through to use __flush_icache_all_generic. - */ -#if (defined(CONFIG_CPU_V7) && defined(CONFIG_CPU_V6)) || \ - defined(CONFIG_SMP_ON_UP) -#define __flush_icache_preferred __cpuc_flush_icache_all -#elif __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP) -#define __flush_icache_preferred __flush_icache_all_v7_smp -#elif __LINUX_ARM_ARCH__ == 6 && defined(CONFIG_ARM_ERRATA_411920) -#define __flush_icache_preferred __cpuc_flush_icache_all -#else -#define __flush_icache_preferred __flush_icache_all_generic -#endif - -static inline void __flush_icache_all(void) -{ - __flush_icache_preferred(); -} - #define flush_cache_all() __cpuc_flush_kern_all() static inline void vivt_flush_cache_mm(struct mm_struct *mm) @@ -407,6 +366,21 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 extern void flush_dcache_page(struct page *); +static inline void __flush_icache_all(void) +{ +#ifdef CONFIG_ARM_ERRATA_411920 + extern void v6_icache_inval_all(void); + v6_icache_inval_all(); +#elif defined(CONFIG_SMP) && __LINUX_ARM_ARCH__ >= 7 + asm("mcr p15, 0, %0, c7, c1, 0 @ invalidate I-cache inner shareable\n" + : + : "r" (0)); +#else + asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" + : + : "r" (0)); +#endif +} static inline void flush_kernel_vmap_range(void *addr, int size) { if ((cache_is_vivt() || cache_is_vipt_aliasing())) @@ -431,6 +405,9 @@ static inline void flush_anon_page(struct vm_area_struct *vma, #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE static inline void flush_kernel_dcache_page(struct page *page) { + /* highmem pages are always flushed upon kunmap already */ + if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page)) + __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE); } #define flush_dcache_mmap_lock(mapping) \ diff --git a/trunk/arch/arm/include/asm/cachetype.h b/trunk/arch/arm/include/asm/cachetype.h index c023db09fcc1..d3a4c2cb9f2f 100644 --- a/trunk/arch/arm/include/asm/cachetype.h +++ b/trunk/arch/arm/include/asm/cachetype.h @@ -6,7 +6,6 @@ #define CACHEID_VIPT_ALIASING (1 << 2) #define CACHEID_VIPT (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING) #define CACHEID_ASID_TAGGED (1 << 3) -#define CACHEID_VIPT_I_ALIASING (1 << 4) extern unsigned int cacheid; @@ -15,18 +14,15 @@ extern unsigned int cacheid; #define cache_is_vipt_nonaliasing() cacheid_is(CACHEID_VIPT_NONALIASING) #define cache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_ALIASING) #define icache_is_vivt_asid_tagged() cacheid_is(CACHEID_ASID_TAGGED) -#define icache_is_vipt_aliasing() cacheid_is(CACHEID_VIPT_I_ALIASING) /* * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture * Mask out support which will never be present on newer CPUs. * - v6+ is never VIVT - * - v7+ VIPT never aliases on D-side + * - v7+ VIPT never aliases */ #if __LINUX_ARM_ARCH__ >= 7 -#define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING |\ - CACHEID_ASID_TAGGED |\ - CACHEID_VIPT_I_ALIASING) +#define __CACHEID_ARCH_MIN (CACHEID_VIPT_NONALIASING | CACHEID_ASID_TAGGED) #elif __LINUX_ARM_ARCH__ >= 6 #define __CACHEID_ARCH_MIN (~CACHEID_VIVT) #else diff --git a/trunk/arch/arm/include/asm/ftrace.h b/trunk/arch/arm/include/asm/ftrace.h index f89515adac60..103f7ee97313 100644 --- a/trunk/arch/arm/include/asm/ftrace.h +++ b/trunk/arch/arm/include/asm/ftrace.h @@ -2,30 +2,12 @@ #define _ASM_ARM_FTRACE #ifdef CONFIG_FUNCTION_TRACER -#define MCOUNT_ADDR ((unsigned long)(__gnu_mcount_nc)) +#define MCOUNT_ADDR ((long)(mcount)) #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ #ifndef __ASSEMBLY__ extern void mcount(void); extern void __gnu_mcount_nc(void); - -#ifdef CONFIG_DYNAMIC_FTRACE -struct dyn_arch_ftrace { -#ifdef CONFIG_OLD_MCOUNT - bool old_mcount; -#endif -}; - -static inline unsigned long ftrace_call_adjust(unsigned long addr) -{ - /* With Thumb-2, the recorded addresses have the lsb set */ - return addr & ~1; -} - -extern void ftrace_caller_old(void); -extern void ftrace_call_old(void); -#endif - #endif #endif diff --git a/trunk/arch/arm/include/asm/hardware/coresight.h b/trunk/arch/arm/include/asm/hardware/coresight.h index 7ecd793b8f5a..212e47828c79 100644 --- a/trunk/arch/arm/include/asm/hardware/coresight.h +++ b/trunk/arch/arm/include/asm/hardware/coresight.h @@ -21,6 +21,18 @@ #define TRACER_RUNNING BIT(TRACER_RUNNING_BIT) #define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT) +struct tracectx { + unsigned int etb_bufsz; + void __iomem *etb_regs; + void __iomem *etm_regs; + unsigned long flags; + int ncmppairs; + int etm_portsz; + struct device *dev; + struct clk *emu_clk; + struct mutex mutex; +}; + #define TRACER_TIMEOUT 10000 #define etm_writel(t, v, x) \ @@ -100,10 +112,10 @@ /* ETM status register, "ETM Architecture", 3.3.2 */ #define ETMR_STATUS (0x10) -#define ETMST_OVERFLOW BIT(0) -#define ETMST_PROGBIT BIT(1) -#define ETMST_STARTSTOP BIT(2) -#define ETMST_TRIGGER BIT(3) +#define ETMST_OVERFLOW (1 << 0) +#define ETMST_PROGBIT (1 << 1) +#define ETMST_STARTSTOP (1 << 2) +#define ETMST_TRIGGER (1 << 3) #define etm_progbit(t) (etm_readl((t), ETMR_STATUS) & ETMST_PROGBIT) #define etm_started(t) (etm_readl((t), ETMR_STATUS) & ETMST_STARTSTOP) @@ -111,7 +123,7 @@ #define ETMR_TRACEENCTRL2 0x1c #define ETMR_TRACEENCTRL 0x24 -#define ETMTE_INCLEXCL BIT(24) +#define ETMTE_INCLEXCL (1 << 24) #define ETMR_TRACEENEVT 0x20 #define ETMCTRL_OPTS (ETMCTRL_DO_CPRT | \ ETMCTRL_DATA_DO_ADDR | \ @@ -134,12 +146,12 @@ #define ETBR_CTRL 0x20 #define ETBR_FORMATTERCTRL 0x304 #define ETBFF_ENFTC 1 -#define ETBFF_ENFCONT BIT(1) -#define ETBFF_FONFLIN BIT(4) -#define ETBFF_MANUAL_FLUSH BIT(6) -#define ETBFF_TRIGIN BIT(8) -#define ETBFF_TRIGEVT BIT(9) -#define ETBFF_TRIGFL BIT(10) +#define ETBFF_ENFCONT (1 << 1) +#define ETBFF_FONFLIN (1 << 4) +#define ETBFF_MANUAL_FLUSH (1 << 6) +#define ETBFF_TRIGIN (1 << 8) +#define ETBFF_TRIGEVT (1 << 9) +#define ETBFF_TRIGFL (1 << 10) #define etb_writel(t, v, x) \ (__raw_writel((v), (t)->etb_regs + (x))) diff --git a/trunk/arch/arm/include/asm/hw_breakpoint.h b/trunk/arch/arm/include/asm/hw_breakpoint.h deleted file mode 100644 index 4d8ae9d67abe..000000000000 --- a/trunk/arch/arm/include/asm/hw_breakpoint.h +++ /dev/null @@ -1,133 +0,0 @@ -#ifndef _ARM_HW_BREAKPOINT_H -#define _ARM_HW_BREAKPOINT_H - -#ifdef __KERNEL__ - -struct task_struct; - -#ifdef CONFIG_HAVE_HW_BREAKPOINT - -struct arch_hw_breakpoint_ctrl { - u32 __reserved : 9, - mismatch : 1, - : 9, - len : 8, - type : 2, - privilege : 2, - enabled : 1; -}; - -struct arch_hw_breakpoint { - u32 address; - u32 trigger; - struct perf_event *suspended_wp; - struct arch_hw_breakpoint_ctrl ctrl; -}; - -static inline u32 encode_ctrl_reg(struct arch_hw_breakpoint_ctrl ctrl) -{ - return (ctrl.mismatch << 22) | (ctrl.len << 5) | (ctrl.type << 3) | - (ctrl.privilege << 1) | ctrl.enabled; -} - -static inline void decode_ctrl_reg(u32 reg, - struct arch_hw_breakpoint_ctrl *ctrl) -{ - ctrl->enabled = reg & 0x1; - reg >>= 1; - ctrl->privilege = reg & 0x3; - reg >>= 2; - ctrl->type = reg & 0x3; - reg >>= 2; - ctrl->len = reg & 0xff; - reg >>= 17; - ctrl->mismatch = reg & 0x1; -} - -/* Debug architecture numbers. */ -#define ARM_DEBUG_ARCH_RESERVED 0 /* In case of ptrace ABI updates. */ -#define ARM_DEBUG_ARCH_V6 1 -#define ARM_DEBUG_ARCH_V6_1 2 -#define ARM_DEBUG_ARCH_V7_ECP14 3 -#define ARM_DEBUG_ARCH_V7_MM 4 - -/* Breakpoint */ -#define ARM_BREAKPOINT_EXECUTE 0 - -/* Watchpoints */ -#define ARM_BREAKPOINT_LOAD 1 -#define ARM_BREAKPOINT_STORE 2 - -/* Privilege Levels */ -#define ARM_BREAKPOINT_PRIV 1 -#define ARM_BREAKPOINT_USER 2 - -/* Lengths */ -#define ARM_BREAKPOINT_LEN_1 0x1 -#define ARM_BREAKPOINT_LEN_2 0x3 -#define ARM_BREAKPOINT_LEN_4 0xf -#define ARM_BREAKPOINT_LEN_8 0xff - -/* Limits */ -#define ARM_MAX_BRP 16 -#define ARM_MAX_WRP 16 -#define ARM_MAX_HBP_SLOTS (ARM_MAX_BRP + ARM_MAX_WRP) - -/* DSCR method of entry bits. */ -#define ARM_DSCR_MOE(x) ((x >> 2) & 0xf) -#define ARM_ENTRY_BREAKPOINT 0x1 -#define ARM_ENTRY_ASYNC_WATCHPOINT 0x2 -#define ARM_ENTRY_SYNC_WATCHPOINT 0xa - -/* DSCR monitor/halting bits. */ -#define ARM_DSCR_HDBGEN (1 << 14) -#define ARM_DSCR_MDBGEN (1 << 15) - -/* opcode2 numbers for the co-processor instructions. */ -#define ARM_OP2_BVR 4 -#define ARM_OP2_BCR 5 -#define ARM_OP2_WVR 6 -#define ARM_OP2_WCR 7 - -/* Base register numbers for the debug registers. */ -#define ARM_BASE_BVR 64 -#define ARM_BASE_BCR 80 -#define ARM_BASE_WVR 96 -#define ARM_BASE_WCR 112 - -/* Accessor macros for the debug registers. */ -#define ARM_DBG_READ(M, OP2, VAL) do {\ - asm volatile("mrc p14, 0, %0, c0," #M ", " #OP2 : "=r" (VAL));\ -} while (0) - -#define ARM_DBG_WRITE(M, OP2, VAL) do {\ - asm volatile("mcr p14, 0, %0, c0," #M ", " #OP2 : : "r" (VAL));\ -} while (0) - -struct notifier_block; -struct perf_event; -struct pmu; - -extern struct pmu perf_ops_bp; -extern int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, - int *gen_len, int *gen_type); -extern int arch_check_bp_in_kernelspace(struct perf_event *bp); -extern int arch_validate_hwbkpt_settings(struct perf_event *bp); -extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused, - unsigned long val, void *data); - -extern u8 arch_get_debug_arch(void); -extern u8 arch_get_max_wp_len(void); -extern void clear_ptrace_hw_breakpoint(struct task_struct *tsk); - -int arch_install_hw_breakpoint(struct perf_event *bp); -void arch_uninstall_hw_breakpoint(struct perf_event *bp); -void hw_breakpoint_pmu_read(struct perf_event *bp); -int hw_breakpoint_slots(int type); - -#else -static inline void clear_ptrace_hw_breakpoint(struct task_struct *tsk) {} - -#endif /* CONFIG_HAVE_HW_BREAKPOINT */ -#endif /* __KERNEL__ */ -#endif /* _ARM_HW_BREAKPOINT_H */ diff --git a/trunk/arch/arm/include/asm/module.h b/trunk/arch/arm/include/asm/module.h index cbb0bc295d2b..e4dfa69abb68 100644 --- a/trunk/arch/arm/include/asm/module.h +++ b/trunk/arch/arm/include/asm/module.h @@ -7,27 +7,20 @@ struct unwind_table; +struct mod_arch_specific +{ #ifdef CONFIG_ARM_UNWIND -struct arm_unwind_mapping { - Elf_Shdr *unw_sec; - Elf_Shdr *sec_text; - struct unwind_table *unwind; -}; -enum { - ARM_SEC_INIT, - ARM_SEC_DEVINIT, - ARM_SEC_CORE, - ARM_SEC_EXIT, - ARM_SEC_DEVEXIT, - ARM_SEC_MAX, -}; -struct mod_arch_specific { - struct arm_unwind_mapping map[ARM_SEC_MAX]; -}; -#else -struct mod_arch_specific { -}; + Elf_Shdr *unw_sec_init; + Elf_Shdr *unw_sec_devinit; + Elf_Shdr *unw_sec_core; + Elf_Shdr *sec_init_text; + Elf_Shdr *sec_devinit_text; + Elf_Shdr *sec_core_text; + struct unwind_table *unwind_init; + struct unwind_table *unwind_devinit; + struct unwind_table *unwind_core; #endif +}; /* * Include the ARM architecture version. diff --git a/trunk/arch/arm/include/asm/pgtable.h b/trunk/arch/arm/include/asm/pgtable.h index a9672e8406a3..ab68cf1ef80f 100644 --- a/trunk/arch/arm/include/asm/pgtable.h +++ b/trunk/arch/arm/include/asm/pgtable.h @@ -278,24 +278,9 @@ extern struct page *empty_zero_page; #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) -#if __LINUX_ARM_ARCH__ < 6 -static inline void __sync_icache_dcache(pte_t pteval) -{ -} -#else -extern void __sync_icache_dcache(pte_t pteval); -#endif - -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pteval) -{ - if (addr >= TASK_SIZE) - set_pte_ext(ptep, pteval, 0); - else { - __sync_icache_dcache(pteval); - set_pte_ext(ptep, pteval, PTE_EXT_NG); - } -} +#define set_pte_at(mm,addr,ptep,pteval) do { \ + set_pte_ext(ptep, pteval, (addr) >= TASK_SIZE ? 0 : PTE_EXT_NG); \ + } while (0) /* * The following only work if pte_present() is true. @@ -305,13 +290,8 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, #define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) #define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) -#define pte_exec(pte) (pte_val(pte) & L_PTE_EXEC) #define pte_special(pte) (0) -#define pte_present_user(pte) \ - ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \ - (L_PTE_PRESENT | L_PTE_USER)) - #define PTE_BIT_FUNC(fn,op) \ static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } @@ -337,10 +317,6 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; } #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_BUFFERABLE) -#define __HAVE_PHYS_MEM_ACCESS_PROT -struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot); #else #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, L_PTE_MT_MASK|L_PTE_EXEC, L_PTE_MT_UNCACHED) diff --git a/trunk/arch/arm/include/asm/processor.h b/trunk/arch/arm/include/asm/processor.h index 67357baaeeeb..7bed3daf83b8 100644 --- a/trunk/arch/arm/include/asm/processor.h +++ b/trunk/arch/arm/include/asm/processor.h @@ -19,7 +19,6 @@ #ifdef __KERNEL__ -#include #include #include @@ -42,9 +41,6 @@ struct debug_entry { struct debug_info { int nsaved; struct debug_entry bp[2]; -#ifdef CONFIG_HAVE_HW_BREAKPOINT - struct perf_event *hbp[ARM_MAX_HBP_SLOTS]; -#endif }; struct thread_struct { diff --git a/trunk/arch/arm/include/asm/ptrace.h b/trunk/arch/arm/include/asm/ptrace.h index 783d50f32618..7ce15eb15f72 100644 --- a/trunk/arch/arm/include/asm/ptrace.h +++ b/trunk/arch/arm/include/asm/ptrace.h @@ -29,8 +29,6 @@ #define PTRACE_SETCRUNCHREGS 26 #define PTRACE_GETVFPREGS 27 #define PTRACE_SETVFPREGS 28 -#define PTRACE_GETHBPREGS 29 -#define PTRACE_SETHBPREGS 30 /* * PSR bits diff --git a/trunk/arch/arm/include/asm/smp_mpidr.h b/trunk/arch/arm/include/asm/smp_mpidr.h deleted file mode 100644 index 6a9307d64900..000000000000 --- a/trunk/arch/arm/include/asm/smp_mpidr.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef ASMARM_SMP_MIDR_H -#define ASMARM_SMP_MIDR_H - -#define hard_smp_processor_id() \ - ({ \ - unsigned int cpunum; \ - __asm__("\n" \ - "1: mrc p15, 0, %0, c0, c0, 5\n" \ - " .pushsection \".alt.smp.init\", \"a\"\n"\ - " .long 1b\n" \ - " mov %0, #0\n" \ - " .popsection" \ - : "=r" (cpunum)); \ - cpunum &= 0x0F; \ - }) - -#endif diff --git a/trunk/arch/arm/include/asm/smp_plat.h b/trunk/arch/arm/include/asm/smp_plat.h index f24c1b9e211d..e6215305544a 100644 --- a/trunk/arch/arm/include/asm/smp_plat.h +++ b/trunk/arch/arm/include/asm/smp_plat.h @@ -7,40 +7,15 @@ #include -/* - * Return true if we are running on a SMP platform - */ -static inline bool is_smp(void) -{ -#ifndef CONFIG_SMP - return false; -#elif defined(CONFIG_SMP_ON_UP) - extern unsigned int smp_on_up; - return !!smp_on_up; -#else - return true; -#endif -} - /* all SMP configurations have the extended CPUID registers */ static inline int tlb_ops_need_broadcast(void) { - if (!is_smp()) - return 0; - return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; } -#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 -#define cache_ops_need_broadcast() 0 -#else static inline int cache_ops_need_broadcast(void) { - if (!is_smp()) - return 0; - return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; } -#endif #endif diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 1120f18a6b17..8ba1ccf82a02 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -85,10 +85,6 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name); -void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, - struct pt_regs *), - int sig, int code, const char *name); - #define xchg(ptr,x) \ ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) @@ -329,8 +325,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size extern void disable_hlt(void); extern void enable_hlt(void); -void cpu_idle_wait(void); - #include #if __LINUX_ARM_ARCH__ < 6 diff --git a/trunk/arch/arm/include/asm/tlbflush.h b/trunk/arch/arm/include/asm/tlbflush.h index ce7378ea15a2..33b546ae72d4 100644 --- a/trunk/arch/arm/include/asm/tlbflush.h +++ b/trunk/arch/arm/include/asm/tlbflush.h @@ -70,10 +70,6 @@ #undef _TLB #undef MULTI_TLB -#ifdef CONFIG_SMP_ON_UP -#define MULTI_TLB 1 -#endif - #define v3_tlb_flags (TLB_V3_FULL | TLB_V3_PAGE) #ifdef CONFIG_CPU_TLB_V3 @@ -189,23 +185,17 @@ # define v6wbi_always_flags (-1UL) #endif -#define v7wbi_tlb_flags_smp (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \ +#ifdef CONFIG_SMP +#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_V7_IS_BTB | \ TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID) -#define v7wbi_tlb_flags_up (TLB_WB | TLB_DCLEAN | TLB_BTB | \ +#else +#define v7wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BTB | \ TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID) +#endif #ifdef CONFIG_CPU_TLB_V7 - -# ifdef CONFIG_SMP_ON_UP -# define v7wbi_possible_flags (v7wbi_tlb_flags_smp | v7wbi_tlb_flags_up) -# define v7wbi_always_flags (v7wbi_tlb_flags_smp & v7wbi_tlb_flags_up) -# elif defined(CONFIG_SMP) -# define v7wbi_possible_flags v7wbi_tlb_flags_smp -# define v7wbi_always_flags v7wbi_tlb_flags_smp -# else -# define v7wbi_possible_flags v7wbi_tlb_flags_up -# define v7wbi_always_flags v7wbi_tlb_flags_up -# endif +# define v7wbi_possible_flags v7wbi_tlb_flags +# define v7wbi_always_flags v7wbi_tlb_flags # ifdef _TLB # define MULTI_TLB 1 # else @@ -570,20 +560,12 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); #endif /* - * If PG_dcache_clean is not set for the page, we need to ensure that any + * if PG_dcache_dirty is set for the page, we need to ensure that any * cache entries for the kernels virtual memory range are written - * back to the page. On ARMv6 and later, the cache coherency is handled via - * the set_pte_at() function. + * back to the page. */ -#if __LINUX_ARM_ARCH__ < 6 extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep); -#else -static inline void update_mmu_cache(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -} -#endif #endif diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index 5b9b268f4fbb..980b78e31328 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -42,7 +42,6 @@ obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_ARM_UNWIND) += unwind.o obj-$(CONFIG_HAVE_TCM) += tcm.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o -obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 diff --git a/trunk/arch/arm/kernel/armksyms.c b/trunk/arch/arm/kernel/armksyms.c index e5e1e5387678..8214bfebfaca 100644 --- a/trunk/arch/arm/kernel/armksyms.c +++ b/trunk/arch/arm/kernel/armksyms.c @@ -165,8 +165,6 @@ EXPORT_SYMBOL(_find_next_bit_be); #endif #ifdef CONFIG_FUNCTION_TRACER -#ifdef CONFIG_OLD_MCOUNT EXPORT_SYMBOL(mcount); -#endif EXPORT_SYMBOL(__gnu_mcount_nc); #endif diff --git a/trunk/arch/arm/kernel/entry-armv.S b/trunk/arch/arm/kernel/entry-armv.S index c09e3573c5de..bb8e93a76407 100644 --- a/trunk/arch/arm/kernel/entry-armv.S +++ b/trunk/arch/arm/kernel/entry-armv.S @@ -46,8 +46,7 @@ * this macro assumes that irqstat (r6) and base (r5) are * preserved from get_irqnr_and_base above */ - ALT_SMP(test_for_ipi r0, r6, r5, lr) - ALT_UP_B(9997f) + test_for_ipi r0, r6, r5, lr movne r0, sp adrne lr, BSYM(1b) bne do_IPI @@ -58,7 +57,6 @@ adrne lr, BSYM(1b) bne do_local_timer #endif -9997: #endif .endm @@ -967,8 +965,11 @@ kuser_cmpxchg_fixup: beq 1b rsbs r0, r3, #0 /* beware -- each __kuser slot must be 8 instructions max */ - ALT_SMP(b __kuser_memory_barrier) - ALT_UP(usr_ret lr) +#ifdef CONFIG_SMP + b __kuser_memory_barrier +#else + usr_ret lr +#endif #endif diff --git a/trunk/arch/arm/kernel/entry-common.S b/trunk/arch/arm/kernel/entry-common.S index 2d23ad985180..1b560825e1cf 100644 --- a/trunk/arch/arm/kernel/entry-common.S +++ b/trunk/arch/arm/kernel/entry-common.S @@ -48,8 +48,6 @@ work_pending: beq no_work_pending mov r0, sp @ 'regs' mov r2, why @ 'syscall' - tst r1, #_TIF_SIGPENDING @ delivering a signal? - movne why, #0 @ prevent further restarts bl do_notify_resume b ret_slow_syscall @ Check work again @@ -129,58 +127,30 @@ ENDPROC(ret_from_fork) * clobber the ip register. This is OK because the ARM calling convention * allows it to be clobbered in subroutines and doesn't use it to hold * parameters.) - * - * When using dynamic ftrace, we patch out the mcount call by a "mov r0, r0" - * for the mcount case, and a "pop {lr}" for the __gnu_mcount_nc case (see - * arch/arm/kernel/ftrace.c). */ - -#ifndef CONFIG_OLD_MCOUNT -#if (__GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 4)) -#error Ftrace requires CONFIG_FRAME_POINTER=y with GCC older than 4.4.0. -#endif -#endif - #ifdef CONFIG_DYNAMIC_FTRACE -ENTRY(__gnu_mcount_nc) - mov ip, lr - ldmia sp!, {lr} - mov pc, ip -ENDPROC(__gnu_mcount_nc) - -ENTRY(ftrace_caller) +ENTRY(mcount) stmdb sp!, {r0-r3, lr} mov r0, lr sub r0, r0, #MCOUNT_INSN_SIZE - ldr r1, [sp, #20] - .global ftrace_call -ftrace_call: + .globl mcount_call +mcount_call: bl ftrace_stub - ldmia sp!, {r0-r3, ip, lr} - mov pc, ip -ENDPROC(ftrace_caller) - -#ifdef CONFIG_OLD_MCOUNT -ENTRY(mcount) - stmdb sp!, {lr} - ldr lr, [fp, #-4] - ldmia sp!, {pc} -ENDPROC(mcount) + ldr lr, [fp, #-4] @ restore lr + ldmia sp!, {r0-r3, pc} -ENTRY(ftrace_caller_old) +ENTRY(ftrace_caller) stmdb sp!, {r0-r3, lr} ldr r1, [fp, #-4] mov r0, lr sub r0, r0, #MCOUNT_INSN_SIZE - .globl ftrace_call_old -ftrace_call_old: + .globl ftrace_call +ftrace_call: bl ftrace_stub ldr lr, [fp, #-4] @ restore lr ldmia sp!, {r0-r3, pc} -ENDPROC(ftrace_caller_old) -#endif #else @@ -188,7 +158,7 @@ ENTRY(__gnu_mcount_nc) stmdb sp!, {r0-r3, lr} ldr r0, =ftrace_trace_function ldr r2, [r0] - adr r0, .Lftrace_stub + adr r0, ftrace_stub cmp r0, r2 bne gnu_trace ldmia sp!, {r0-r3, ip, lr} @@ -198,19 +168,11 @@ gnu_trace: ldr r1, [sp, #20] @ lr of instrumented routine mov r0, lr sub r0, r0, #MCOUNT_INSN_SIZE - adr lr, BSYM(1f) + mov lr, pc mov pc, r2 -1: ldmia sp!, {r0-r3, ip, lr} mov pc, ip -ENDPROC(__gnu_mcount_nc) -#ifdef CONFIG_OLD_MCOUNT -/* - * This is under an ifdef in order to force link-time errors for people trying - * to build with !FRAME_POINTER with a GCC which doesn't use the new-style - * mcount. - */ ENTRY(mcount) stmdb sp!, {r0-r3, lr} ldr r0, =ftrace_trace_function @@ -229,15 +191,12 @@ trace: mov pc, r2 ldr lr, [fp, #-4] @ restore lr ldmia sp!, {r0-r3, pc} -ENDPROC(mcount) -#endif #endif /* CONFIG_DYNAMIC_FTRACE */ -ENTRY(ftrace_stub) -.Lftrace_stub: + .globl ftrace_stub +ftrace_stub: mov pc, lr -ENDPROC(ftrace_stub) #endif /* CONFIG_FUNCTION_TRACER */ diff --git a/trunk/arch/arm/kernel/etm.c b/trunk/arch/arm/kernel/etm.c index a48d51257988..33c7077174db 100644 --- a/trunk/arch/arm/kernel/etm.c +++ b/trunk/arch/arm/kernel/etm.c @@ -30,21 +30,6 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Alexander Shishkin"); -/* - * ETM tracer state - */ -struct tracectx { - unsigned int etb_bufsz; - void __iomem *etb_regs; - void __iomem *etm_regs; - unsigned long flags; - int ncmppairs; - int etm_portsz; - struct device *dev; - struct clk *emu_clk; - struct mutex mutex; -}; - static struct tracectx tracer; static inline bool trace_isrunning(struct tracectx *t) diff --git a/trunk/arch/arm/kernel/ftrace.c b/trunk/arch/arm/kernel/ftrace.c index 971ac8c36ea7..0298286ad4ad 100644 --- a/trunk/arch/arm/kernel/ftrace.c +++ b/trunk/arch/arm/kernel/ftrace.c @@ -2,194 +2,102 @@ * Dynamic function tracing support. * * Copyright (C) 2008 Abhishek Sagar - * Copyright (C) 2010 Rabin Vincent * * For licencing details, see COPYING. * * Defines low-level handling of mcount calls when the kernel * is compiled with the -pg flag. When using dynamic ftrace, the - * mcount call-sites get patched with NOP till they are enabled. - * All code mutation routines here are called under stop_machine(). + * mcount call-sites get patched lazily with NOP till they are + * enabled. All code mutation routines here take effect atomically. */ #include -#include #include #include -#ifdef CONFIG_THUMB2_KERNEL -#define NOP 0xeb04f85d /* pop.w {lr} */ -#else -#define NOP 0xe8bd4000 /* pop {lr} */ -#endif +#define PC_OFFSET 8 +#define BL_OPCODE 0xeb000000 +#define BL_OFFSET_MASK 0x00ffffff -#ifdef CONFIG_OLD_MCOUNT -#define OLD_MCOUNT_ADDR ((unsigned long) mcount) -#define OLD_FTRACE_ADDR ((unsigned long) ftrace_caller_old) +static unsigned long bl_insn; +static const unsigned long NOP = 0xe1a00000; /* mov r0, r0 */ -#define OLD_NOP 0xe1a00000 /* mov r0, r0 */ - -static unsigned long ftrace_nop_replace(struct dyn_ftrace *rec) +unsigned char *ftrace_nop_replace(void) { - return rec->arch.old_mcount ? OLD_NOP : NOP; + return (char *)&NOP; } -static unsigned long adjust_address(struct dyn_ftrace *rec, unsigned long addr) -{ - if (!rec->arch.old_mcount) - return addr; - - if (addr == MCOUNT_ADDR) - addr = OLD_MCOUNT_ADDR; - else if (addr == FTRACE_ADDR) - addr = OLD_FTRACE_ADDR; - - return addr; -} -#else -static unsigned long ftrace_nop_replace(struct dyn_ftrace *rec) -{ - return NOP; -} - -static unsigned long adjust_address(struct dyn_ftrace *rec, unsigned long addr) -{ - return addr; -} -#endif - /* construct a branch (BL) instruction to addr */ -#ifdef CONFIG_THUMB2_KERNEL -static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr) +unsigned char *ftrace_call_replace(unsigned long pc, unsigned long addr) { - unsigned long s, j1, j2, i1, i2, imm10, imm11; - unsigned long first, second; long offset; - offset = (long)addr - (long)(pc + 4); - if (offset < -16777216 || offset > 16777214) { - WARN_ON_ONCE(1); - return 0; - } - - s = (offset >> 24) & 0x1; - i1 = (offset >> 23) & 0x1; - i2 = (offset >> 22) & 0x1; - imm10 = (offset >> 12) & 0x3ff; - imm11 = (offset >> 1) & 0x7ff; - - j1 = (!i1) ^ s; - j2 = (!i2) ^ s; - - first = 0xf000 | (s << 10) | imm10; - second = 0xd000 | (j1 << 13) | (j2 << 11) | imm11; - - return (second << 16) | first; -} -#else -static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr) -{ - long offset; - - offset = (long)addr - (long)(pc + 8); + offset = (long)addr - (long)(pc + PC_OFFSET); if (unlikely(offset < -33554432 || offset > 33554428)) { /* Can't generate branches that far (from ARM ARM). Ftrace * doesn't generate branches outside of kernel text. */ WARN_ON_ONCE(1); - return 0; + return NULL; } - - offset = (offset >> 2) & 0x00ffffff; - - return 0xeb000000 | offset; + offset = (offset >> 2) & BL_OFFSET_MASK; + bl_insn = BL_OPCODE | offset; + return (unsigned char *)&bl_insn; } -#endif -static int ftrace_modify_code(unsigned long pc, unsigned long old, - unsigned long new) +int ftrace_modify_code(unsigned long pc, unsigned char *old_code, + unsigned char *new_code) { - unsigned long replaced; + unsigned long err = 0, replaced = 0, old, new; - if (probe_kernel_read(&replaced, (void *)pc, MCOUNT_INSN_SIZE)) - return -EFAULT; + old = *(unsigned long *)old_code; + new = *(unsigned long *)new_code; - if (replaced != old) - return -EINVAL; + __asm__ __volatile__ ( + "1: ldr %1, [%2] \n" + " cmp %1, %4 \n" + "2: streq %3, [%2] \n" + " cmpne %1, %3 \n" + " movne %0, #2 \n" + "3:\n" - if (probe_kernel_write((void *)pc, &new, MCOUNT_INSN_SIZE)) - return -EPERM; + ".pushsection .fixup, \"ax\"\n" + "4: mov %0, #1 \n" + " b 3b \n" + ".popsection\n" - flush_icache_range(pc, pc + MCOUNT_INSN_SIZE); + ".pushsection __ex_table, \"a\"\n" + " .long 1b, 4b \n" + " .long 2b, 4b \n" + ".popsection\n" - return 0; + : "=r"(err), "=r"(replaced) + : "r"(pc), "r"(new), "r"(old), "0"(err), "1"(replaced) + : "memory"); + + if (!err && (replaced == old)) + flush_icache_range(pc, pc + MCOUNT_INSN_SIZE); + + return err; } int ftrace_update_ftrace_func(ftrace_func_t func) { - unsigned long pc, old; - unsigned long new; int ret; + unsigned long pc, old; + unsigned char *new; pc = (unsigned long)&ftrace_call; memcpy(&old, &ftrace_call, MCOUNT_INSN_SIZE); new = ftrace_call_replace(pc, (unsigned long)func); - - ret = ftrace_modify_code(pc, old, new); - -#ifdef CONFIG_OLD_MCOUNT - if (!ret) { - pc = (unsigned long)&ftrace_call_old; - memcpy(&old, &ftrace_call_old, MCOUNT_INSN_SIZE); - new = ftrace_call_replace(pc, (unsigned long)func); - - ret = ftrace_modify_code(pc, old, new); - } -#endif - - return ret; -} - -int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) -{ - unsigned long new, old; - unsigned long ip = rec->ip; - - old = ftrace_nop_replace(rec); - new = ftrace_call_replace(ip, adjust_address(rec, addr)); - - return ftrace_modify_code(rec->ip, old, new); -} - -int ftrace_make_nop(struct module *mod, - struct dyn_ftrace *rec, unsigned long addr) -{ - unsigned long ip = rec->ip; - unsigned long old; - unsigned long new; - int ret; - - old = ftrace_call_replace(ip, adjust_address(rec, addr)); - new = ftrace_nop_replace(rec); - ret = ftrace_modify_code(ip, old, new); - -#ifdef CONFIG_OLD_MCOUNT - if (ret == -EINVAL && addr == MCOUNT_ADDR) { - rec->arch.old_mcount = true; - - old = ftrace_call_replace(ip, adjust_address(rec, addr)); - new = ftrace_nop_replace(rec); - ret = ftrace_modify_code(ip, old, new); - } -#endif - + ret = ftrace_modify_code(pc, (unsigned char *)&old, new); return ret; } +/* run from ftrace_init with irqs disabled */ int __init ftrace_dyn_arch_init(void *data) { - *(unsigned long *)data = 0; - + ftrace_mcount_set(data); return 0; } diff --git a/trunk/arch/arm/kernel/head-common.S b/trunk/arch/arm/kernel/head-common.S index bbecaac1e013..b9505aa267c0 100644 --- a/trunk/arch/arm/kernel/head-common.S +++ b/trunk/arch/arm/kernel/head-common.S @@ -15,6 +15,55 @@ #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) + .align 2 + .type __switch_data, %object +__switch_data: + .long __mmap_switched + .long __data_loc @ r4 + .long _data @ r5 + .long __bss_start @ r6 + .long _end @ r7 + .long processor_id @ r4 + .long __machine_arch_type @ r5 + .long __atags_pointer @ r6 + .long cr_alignment @ r7 + .long init_thread_union + THREAD_START_SP @ sp + +/* + * The following fragment of code is executed with the MMU on in MMU mode, + * and uses absolute addresses; this is not position independent. + * + * r0 = cp#15 control register + * r1 = machine ID + * r2 = atags pointer + * r9 = processor ID + */ +__mmap_switched: + adr r3, __switch_data + 4 + + ldmia r3!, {r4, r5, r6, r7} + cmp r4, r5 @ Copy data segment if needed +1: cmpne r5, r6 + ldrne fp, [r4], #4 + strne fp, [r5], #4 + bne 1b + + mov fp, #0 @ Clear BSS (and zero fp) +1: cmp r6, r7 + strcc fp, [r6],#4 + bcc 1b + + ARM( ldmia r3, {r4, r5, r6, r7, sp}) + THUMB( ldmia r3, {r4, r5, r6, r7} ) + THUMB( ldr sp, [r3, #16] ) + str r9, [r4] @ Save processor ID + str r1, [r5] @ Save machine type + str r2, [r6] @ Save atags pointer + bic r4, r0, #CR_A @ Clear 'A' bit + stmia r7, {r0, r4} @ Save control register values + b start_kernel +ENDPROC(__mmap_switched) + /* * Exception handling. Something went wrong and we can't proceed. We * ought to tell the user, but since we don't have any guarantee that @@ -24,7 +73,21 @@ * and hope for the best (useful if bootloader fails to pass a proper * machine ID for example). */ - __HEAD +__error_p: +#ifdef CONFIG_DEBUG_LL + adr r0, str_p1 + bl printascii + mov r0, r9 + bl printhex8 + adr r0, str_p2 + bl printascii + b __error +str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" +str_p2: .asciz ").\n" + .align +#endif +ENDPROC(__error_p) + __error_a: #ifdef CONFIG_DEBUG_LL mov r4, r1 @ preserve machine ID @@ -34,7 +97,7 @@ __error_a: bl printhex8 adr r0, str_a2 bl printascii - adr r3, __lookup_machine_type_data + adr r3, 4f ldmia r3, {r4, r5, r6} @ get machine desc list sub r4, r3, r4 @ get offset between virt&phys add r5, r5, r4 @ convert virt addresses to @@ -62,6 +125,78 @@ str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" .align #endif +__error: +#ifdef CONFIG_ARCH_RPC +/* + * Turn the screen red on a error - RiscPC only. + */ + mov r0, #0x02000000 + mov r3, #0x11 + orr r3, r3, r3, lsl #8 + orr r3, r3, r3, lsl #16 + str r3, [r0], #4 + str r3, [r0], #4 + str r3, [r0], #4 + str r3, [r0], #4 +#endif +1: mov r0, r0 + b 1b +ENDPROC(__error) + + +/* + * Read processor ID register (CP#15, CR0), and look up in the linker-built + * supported processor list. Note that we can't use the absolute addresses + * for the __proc_info lists since we aren't running with the MMU on + * (and therefore, we are not in the correct address space). We have to + * calculate the offset. + * + * r9 = cpuid + * Returns: + * r3, r4, r6 corrupted + * r5 = proc_info pointer in physical address space + * r9 = cpuid (preserved) + */ +__lookup_processor_type: + adr r3, 3f + ldmia r3, {r5 - r7} + add r3, r3, #8 + sub r3, r3, r7 @ get offset between virt&phys + add r5, r5, r3 @ convert virt addresses to + add r6, r6, r3 @ physical address space +1: ldmia r5, {r3, r4} @ value, mask + and r4, r4, r9 @ mask wanted bits + teq r3, r4 + beq 2f + add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) + cmp r5, r6 + blo 1b + mov r5, #0 @ unknown processor +2: mov pc, lr +ENDPROC(__lookup_processor_type) + +/* + * This provides a C-API version of the above function. + */ +ENTRY(lookup_processor_type) + stmfd sp!, {r4 - r7, r9, lr} + mov r9, r0 + bl __lookup_processor_type + mov r0, r5 + ldmfd sp!, {r4 - r7, r9, pc} +ENDPROC(lookup_processor_type) + +/* + * Look in and arch/arm/kernel/arch.[ch] for + * more information about the __proc_info and __arch_info structures. + */ + .align 2 +3: .long __proc_info_begin + .long __proc_info_end +4: .long . + .long __arch_info_begin + .long __arch_info_end + /* * Lookup machine architecture in the linker-build list of architectures. * Note that we can't use the absolute addresses for the __arch_info @@ -74,7 +209,7 @@ str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" * r5 = mach_info pointer in physical address space */ __lookup_machine_type: - adr r3, __lookup_machine_type_data + adr r3, 4b ldmia r3, {r4, r5, r6} sub r3, r3, r4 @ get offset between virt&phys add r5, r5, r3 @ convert virt addresses to @@ -90,16 +225,15 @@ __lookup_machine_type: ENDPROC(__lookup_machine_type) /* - * Look in arch/arm/kernel/arch.[ch] for information about the - * __arch_info structures. + * This provides a C-API version of the above function. */ - .align 2 - .type __lookup_machine_type_data, %object -__lookup_machine_type_data: - .long . - .long __arch_info_begin - .long __arch_info_end - .size __lookup_machine_type_data, . - __lookup_machine_type_data +ENTRY(lookup_machine_type) + stmfd sp!, {r4 - r6, lr} + mov r1, r0 + bl __lookup_machine_type + mov r0, r5 + ldmfd sp!, {r4 - r6, pc} +ENDPROC(lookup_machine_type) /* Determine validity of the r2 atags pointer. The heuristic requires * that the pointer be aligned, in the first 16k of physical RAM and @@ -131,150 +265,3 @@ __vet_atags: 1: mov r2, #0 mov pc, lr ENDPROC(__vet_atags) - -/* - * The following fragment of code is executed with the MMU on in MMU mode, - * and uses absolute addresses; this is not position independent. - * - * r0 = cp#15 control register - * r1 = machine ID - * r2 = atags pointer - * r9 = processor ID - */ - __INIT -__mmap_switched: - adr r3, __mmap_switched_data - - ldmia r3!, {r4, r5, r6, r7} - cmp r4, r5 @ Copy data segment if needed -1: cmpne r5, r6 - ldrne fp, [r4], #4 - strne fp, [r5], #4 - bne 1b - - mov fp, #0 @ Clear BSS (and zero fp) -1: cmp r6, r7 - strcc fp, [r6],#4 - bcc 1b - - ARM( ldmia r3, {r4, r5, r6, r7, sp}) - THUMB( ldmia r3, {r4, r5, r6, r7} ) - THUMB( ldr sp, [r3, #16] ) - str r9, [r4] @ Save processor ID - str r1, [r5] @ Save machine type - str r2, [r6] @ Save atags pointer - bic r4, r0, #CR_A @ Clear 'A' bit - stmia r7, {r0, r4} @ Save control register values - b start_kernel -ENDPROC(__mmap_switched) - - .align 2 - .type __mmap_switched_data, %object -__mmap_switched_data: - .long __data_loc @ r4 - .long _sdata @ r5 - .long __bss_start @ r6 - .long _end @ r7 - .long processor_id @ r4 - .long __machine_arch_type @ r5 - .long __atags_pointer @ r6 - .long cr_alignment @ r7 - .long init_thread_union + THREAD_START_SP @ sp - .size __mmap_switched_data, . - __mmap_switched_data - -/* - * This provides a C-API version of __lookup_machine_type - */ -ENTRY(lookup_machine_type) - stmfd sp!, {r4 - r6, lr} - mov r1, r0 - bl __lookup_machine_type - mov r0, r5 - ldmfd sp!, {r4 - r6, pc} -ENDPROC(lookup_machine_type) - -/* - * This provides a C-API version of __lookup_processor_type - */ -ENTRY(lookup_processor_type) - stmfd sp!, {r4 - r6, r9, lr} - mov r9, r0 - bl __lookup_processor_type - mov r0, r5 - ldmfd sp!, {r4 - r6, r9, pc} -ENDPROC(lookup_processor_type) - -/* - * Read processor ID register (CP#15, CR0), and look up in the linker-built - * supported processor list. Note that we can't use the absolute addresses - * for the __proc_info lists since we aren't running with the MMU on - * (and therefore, we are not in the correct address space). We have to - * calculate the offset. - * - * r9 = cpuid - * Returns: - * r3, r4, r6 corrupted - * r5 = proc_info pointer in physical address space - * r9 = cpuid (preserved) - */ - __CPUINIT -__lookup_processor_type: - adr r3, __lookup_processor_type_data - ldmia r3, {r4 - r6} - sub r3, r3, r4 @ get offset between virt&phys - add r5, r5, r3 @ convert virt addresses to - add r6, r6, r3 @ physical address space -1: ldmia r5, {r3, r4} @ value, mask - and r4, r4, r9 @ mask wanted bits - teq r3, r4 - beq 2f - add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) - cmp r5, r6 - blo 1b - mov r5, #0 @ unknown processor -2: mov pc, lr -ENDPROC(__lookup_processor_type) - -/* - * Look in for information about the __proc_info structure. - */ - .align 2 - .type __lookup_processor_type_data, %object -__lookup_processor_type_data: - .long . - .long __proc_info_begin - .long __proc_info_end - .size __lookup_processor_type_data, . - __lookup_processor_type_data - -__error_p: -#ifdef CONFIG_DEBUG_LL - adr r0, str_p1 - bl printascii - mov r0, r9 - bl printhex8 - adr r0, str_p2 - bl printascii - b __error -str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" -str_p2: .asciz ").\n" - .align -#endif -ENDPROC(__error_p) - -__error: -#ifdef CONFIG_ARCH_RPC -/* - * Turn the screen red on a error - RiscPC only. - */ - mov r0, #0x02000000 - mov r3, #0x11 - orr r3, r3, r3, lsl #8 - orr r3, r3, r3, lsl #16 - str r3, [r0], #4 - str r3, [r0], #4 - str r3, [r0], #4 - str r3, [r0], #4 -#endif -1: mov r0, r0 - b 1b -ENDPROC(__error) diff --git a/trunk/arch/arm/kernel/head-nommu.S b/trunk/arch/arm/kernel/head-nommu.S index 814ce1a73270..573b803dc6bf 100644 --- a/trunk/arch/arm/kernel/head-nommu.S +++ b/trunk/arch/arm/kernel/head-nommu.S @@ -48,6 +48,8 @@ ENTRY(stext) movs r8, r5 @ invalid machine (r5=0)? beq __error_a @ yes, error 'a' + ldr r13, __switch_data @ address to jump to after + @ the initialization is done adr lr, BSYM(__after_proc_init) @ return (PIC) address ARM( add pc, r10, #PROCINFO_INITFUNC ) THUMB( add r12, r10, #PROCINFO_INITFUNC ) @@ -85,7 +87,8 @@ __after_proc_init: mcr p15, 0, r0, c1, c0, 0 @ write control reg #endif /* CONFIG_CPU_CP15 */ - b __mmap_switched @ clear the BSS and jump + mov r3, r13 + mov pc, r3 @ clear the BSS and jump @ to start_kernel ENDPROC(__after_proc_init) .ltorg diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index 767390449e0a..eb62bf947212 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -86,9 +86,6 @@ ENTRY(stext) movs r8, r5 @ invalid machine (r5=0)? beq __error_a @ yes, error 'a' bl __vet_atags -#ifdef CONFIG_SMP_ON_UP - bl __fixup_smp -#endif bl __create_page_tables /* @@ -98,15 +95,113 @@ ENTRY(stext) * above. On return, the CPU will be ready for the MMU to be * turned on, and r0 will hold the CPU control register value. */ - ldr r13, =__mmap_switched @ address to jump to after + ldr r13, __switch_data @ address to jump to after @ mmu has been enabled - adr lr, BSYM(1f) @ return (PIC) address + adr lr, BSYM(__enable_mmu) @ return (PIC) address ARM( add pc, r10, #PROCINFO_INITFUNC ) THUMB( add r12, r10, #PROCINFO_INITFUNC ) THUMB( mov pc, r12 ) -1: b __enable_mmu ENDPROC(stext) - .ltorg + +#if defined(CONFIG_SMP) +ENTRY(secondary_startup) + /* + * Common entry point for secondary CPUs. + * + * Ensure that we're in SVC mode, and IRQs are disabled. Lookup + * the processor type - there is no need to check the machine type + * as it has already been validated by the primary processor. + */ + setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 + mrc p15, 0, r9, c0, c0 @ get processor id + bl __lookup_processor_type + movs r10, r5 @ invalid processor? + moveq r0, #'p' @ yes, error 'p' + beq __error + + /* + * Use the page tables supplied from __cpu_up. + */ + adr r4, __secondary_data + ldmia r4, {r5, r7, r12} @ address to jump to after + sub r4, r4, r5 @ mmu has been enabled + ldr r4, [r7, r4] @ get secondary_data.pgdir + adr lr, BSYM(__enable_mmu) @ return address + mov r13, r12 @ __secondary_switched address + ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor + @ (return control reg) + THUMB( add r12, r10, #PROCINFO_INITFUNC ) + THUMB( mov pc, r12 ) +ENDPROC(secondary_startup) + + /* + * r6 = &secondary_data + */ +ENTRY(__secondary_switched) + ldr sp, [r7, #4] @ get secondary_data.stack + mov fp, #0 + b secondary_start_kernel +ENDPROC(__secondary_switched) + + .type __secondary_data, %object +__secondary_data: + .long . + .long secondary_data + .long __secondary_switched +#endif /* defined(CONFIG_SMP) */ + + + +/* + * Setup common bits before finally enabling the MMU. Essentially + * this is just loading the page table pointer and domain access + * registers. + */ +__enable_mmu: +#ifdef CONFIG_ALIGNMENT_TRAP + orr r0, r0, #CR_A +#else + bic r0, r0, #CR_A +#endif +#ifdef CONFIG_CPU_DCACHE_DISABLE + bic r0, r0, #CR_C +#endif +#ifdef CONFIG_CPU_BPREDICT_DISABLE + bic r0, r0, #CR_Z +#endif +#ifdef CONFIG_CPU_ICACHE_DISABLE + bic r0, r0, #CR_I +#endif + mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ + domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ + domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ + domain_val(DOMAIN_IO, DOMAIN_CLIENT)) + mcr p15, 0, r5, c3, c0, 0 @ load domain access register + mcr p15, 0, r4, c2, c0, 0 @ load page table pointer + b __turn_mmu_on +ENDPROC(__enable_mmu) + +/* + * Enable the MMU. This completely changes the structure of the visible + * memory space. You will not be able to trace execution through this. + * If you have an enquiry about this, *please* check the linux-arm-kernel + * mailing list archives BEFORE sending another post to the list. + * + * r0 = cp#15 control register + * r13 = *virtual* address to jump to upon completion + * + * other registers depend on the function called upon completion + */ + .align 5 +__turn_mmu_on: + mov r0, r0 + mcr p15, 0, r0, c1, c0, 0 @ write control reg + mrc p15, 0, r3, c0, c0, 0 @ read id reg + mov r3, r3 + mov r3, r13 + mov pc, r3 +ENDPROC(__turn_mmu_on) + /* * Setup the initial page tables. We only setup the barest @@ -118,7 +213,7 @@ ENDPROC(stext) * r10 = procinfo * * Returns: - * r0, r3, r5-r7 corrupted + * r0, r3, r6, r7 corrupted * r4 = physical page table address */ __create_page_tables: @@ -140,30 +235,20 @@ __create_page_tables: ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags /* - * Create identity mapping to cater for __enable_mmu. - * This identity mapping will be removed by paging_init(). + * Create identity mapping for first MB of kernel to + * cater for the MMU enable. This identity mapping + * will be removed by paging_init(). We use our current program + * counter to determine corresponding section base address. */ - adr r0, __enable_mmu_loc - ldmia r0, {r3, r5, r6} - sub r0, r0, r3 @ virt->phys offset - add r5, r5, r0 @ phys __enable_mmu - add r6, r6, r0 @ phys __enable_mmu_end - mov r5, r5, lsr #20 - mov r6, r6, lsr #20 - -1: orr r3, r7, r5, lsl #20 @ flags + kernel base - str r3, [r4, r5, lsl #2] @ identity mapping - teq r5, r6 - addne r5, r5, #1 @ next section - bne 1b + mov r6, pc + mov r6, r6, lsr #20 @ start of kernel section + orr r3, r7, r6, lsl #20 @ flags + kernel base + str r3, [r4, r6, lsl #2] @ identity mapping /* * Now setup the pagetables for our kernel direct * mapped region. */ - mov r3, pc - mov r3, r3, lsr #20 - orr r3, r7, r3, lsl #20 add r0, r4, #(KERNEL_START & 0xff000000) >> 18 str r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]! ldr r6, =(KERNEL_END - 1) @@ -247,168 +332,5 @@ __create_page_tables: mov pc, lr ENDPROC(__create_page_tables) .ltorg -__enable_mmu_loc: - .long . - .long __enable_mmu - .long __enable_mmu_end - -#if defined(CONFIG_SMP) - __CPUINIT -ENTRY(secondary_startup) - /* - * Common entry point for secondary CPUs. - * - * Ensure that we're in SVC mode, and IRQs are disabled. Lookup - * the processor type - there is no need to check the machine type - * as it has already been validated by the primary processor. - */ - setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 - mrc p15, 0, r9, c0, c0 @ get processor id - bl __lookup_processor_type - movs r10, r5 @ invalid processor? - moveq r0, #'p' @ yes, error 'p' - beq __error_p - - /* - * Use the page tables supplied from __cpu_up. - */ - adr r4, __secondary_data - ldmia r4, {r5, r7, r12} @ address to jump to after - sub r4, r4, r5 @ mmu has been enabled - ldr r4, [r7, r4] @ get secondary_data.pgdir - adr lr, BSYM(__enable_mmu) @ return address - mov r13, r12 @ __secondary_switched address - ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor - @ (return control reg) - THUMB( add r12, r10, #PROCINFO_INITFUNC ) - THUMB( mov pc, r12 ) -ENDPROC(secondary_startup) - - /* - * r6 = &secondary_data - */ -ENTRY(__secondary_switched) - ldr sp, [r7, #4] @ get secondary_data.stack - mov fp, #0 - b secondary_start_kernel -ENDPROC(__secondary_switched) - - .type __secondary_data, %object -__secondary_data: - .long . - .long secondary_data - .long __secondary_switched -#endif /* defined(CONFIG_SMP) */ - - - -/* - * Setup common bits before finally enabling the MMU. Essentially - * this is just loading the page table pointer and domain access - * registers. - * - * r0 = cp#15 control register - * r1 = machine ID - * r2 = atags pointer - * r4 = page table pointer - * r9 = processor ID - * r13 = *virtual* address to jump to upon completion - */ -__enable_mmu: -#ifdef CONFIG_ALIGNMENT_TRAP - orr r0, r0, #CR_A -#else - bic r0, r0, #CR_A -#endif -#ifdef CONFIG_CPU_DCACHE_DISABLE - bic r0, r0, #CR_C -#endif -#ifdef CONFIG_CPU_BPREDICT_DISABLE - bic r0, r0, #CR_Z -#endif -#ifdef CONFIG_CPU_ICACHE_DISABLE - bic r0, r0, #CR_I -#endif - mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_IO, DOMAIN_CLIENT)) - mcr p15, 0, r5, c3, c0, 0 @ load domain access register - mcr p15, 0, r4, c2, c0, 0 @ load page table pointer - b __turn_mmu_on -ENDPROC(__enable_mmu) - -/* - * Enable the MMU. This completely changes the structure of the visible - * memory space. You will not be able to trace execution through this. - * If you have an enquiry about this, *please* check the linux-arm-kernel - * mailing list archives BEFORE sending another post to the list. - * - * r0 = cp#15 control register - * r1 = machine ID - * r2 = atags pointer - * r9 = processor ID - * r13 = *virtual* address to jump to upon completion - * - * other registers depend on the function called upon completion - */ - .align 5 -__turn_mmu_on: - mov r0, r0 - mcr p15, 0, r0, c1, c0, 0 @ write control reg - mrc p15, 0, r3, c0, c0, 0 @ read id reg - mov r3, r3 - mov r3, r13 - mov pc, r3 -__enable_mmu_end: -ENDPROC(__turn_mmu_on) - - -#ifdef CONFIG_SMP_ON_UP -__fixup_smp: - mov r7, #0x00070000 - orr r6, r7, #0xff000000 @ mask 0xff070000 - orr r7, r7, #0x41000000 @ val 0x41070000 - and r0, r9, r6 - teq r0, r7 @ ARM CPU and ARMv6/v7? - bne __fixup_smp_on_up @ no, assume UP - - orr r6, r6, #0x0000ff00 - orr r6, r6, #0x000000f0 @ mask 0xff07fff0 - orr r7, r7, #0x0000b000 - orr r7, r7, #0x00000020 @ val 0x4107b020 - and r0, r9, r6 - teq r0, r7 @ ARM 11MPCore? - moveq pc, lr @ yes, assume SMP - - mrc p15, 0, r0, c0, c0, 5 @ read MPIDR - tst r0, #1 << 31 - movne pc, lr @ bit 31 => SMP - -__fixup_smp_on_up: - adr r0, 1f - ldmia r0, {r3, r6, r7} - sub r3, r0, r3 - add r6, r6, r3 - add r7, r7, r3 -2: cmp r6, r7 - ldmia r6!, {r0, r4} - strlo r4, [r0, r3] - blo 2b - mov pc, lr -ENDPROC(__fixup_smp) - -1: .word . - .word __smpalt_begin - .word __smpalt_end - - .pushsection .data - .globl smp_on_up -smp_on_up: - ALT_SMP(.long 1) - ALT_UP(.long 0) - .popsection - -#endif #include "head-common.S" diff --git a/trunk/arch/arm/kernel/hw_breakpoint.c b/trunk/arch/arm/kernel/hw_breakpoint.c deleted file mode 100644 index 54593b0c241b..000000000000 --- a/trunk/arch/arm/kernel/hw_breakpoint.c +++ /dev/null @@ -1,849 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) 2009, 2010 ARM Limited - * - * Author: Will Deacon - */ - -/* - * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility, - * using the CPU's debug registers. - */ -#define pr_fmt(fmt) "hw-breakpoint: " fmt - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -/* Breakpoint currently in use for each BRP. */ -static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]); - -/* Watchpoint currently in use for each WRP. */ -static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[ARM_MAX_WRP]); - -/* Number of BRP/WRP registers on this CPU. */ -static int core_num_brps; -static int core_num_wrps; - -/* Debug architecture version. */ -static u8 debug_arch; - -/* Maximum supported watchpoint length. */ -static u8 max_watchpoint_len; - -/* Determine number of BRP registers available. */ -static int get_num_brps(void) -{ - u32 didr; - ARM_DBG_READ(c0, 0, didr); - return ((didr >> 24) & 0xf) + 1; -} - -/* Determine number of WRP registers available. */ -static int get_num_wrps(void) -{ - /* - * FIXME: When a watchpoint fires, the only way to work out which - * watchpoint it was is by disassembling the faulting instruction - * and working out the address of the memory access. - * - * Furthermore, we can only do this if the watchpoint was precise - * since imprecise watchpoints prevent us from calculating register - * based addresses. - * - * For the time being, we only report 1 watchpoint register so we - * always know which watchpoint fired. In the future we can either - * add a disassembler and address generation emulator, or we can - * insert a check to see if the DFAR is set on watchpoint exception - * entry [the ARM ARM states that the DFAR is UNKNOWN, but - * experience shows that it is set on some implementations]. - */ - -#if 0 - u32 didr, wrps; - ARM_DBG_READ(c0, 0, didr); - return ((didr >> 28) & 0xf) + 1; -#endif - - return 1; -} - -int hw_breakpoint_slots(int type) -{ - /* - * We can be called early, so don't rely on - * our static variables being initialised. - */ - switch (type) { - case TYPE_INST: - return get_num_brps(); - case TYPE_DATA: - return get_num_wrps(); - default: - pr_warning("unknown slot type: %d\n", type); - return 0; - } -} - -/* Determine debug architecture. */ -static u8 get_debug_arch(void) -{ - u32 didr; - - /* Do we implement the extended CPUID interface? */ - if (((read_cpuid_id() >> 16) & 0xf) != 0xf) { - pr_warning("CPUID feature registers not supported. " - "Assuming v6 debug is present.\n"); - return ARM_DEBUG_ARCH_V6; - } - - ARM_DBG_READ(c0, 0, didr); - return (didr >> 16) & 0xf; -} - -/* Does this core support mismatch breakpoints? */ -static int core_has_mismatch_bps(void) -{ - return debug_arch >= ARM_DEBUG_ARCH_V7_ECP14 && core_num_brps > 1; -} - -u8 arch_get_debug_arch(void) -{ - return debug_arch; -} - -#define READ_WB_REG_CASE(OP2, M, VAL) \ - case ((OP2 << 4) + M): \ - ARM_DBG_READ(c ## M, OP2, VAL); \ - break - -#define WRITE_WB_REG_CASE(OP2, M, VAL) \ - case ((OP2 << 4) + M): \ - ARM_DBG_WRITE(c ## M, OP2, VAL);\ - break - -#define GEN_READ_WB_REG_CASES(OP2, VAL) \ - READ_WB_REG_CASE(OP2, 0, VAL); \ - READ_WB_REG_CASE(OP2, 1, VAL); \ - READ_WB_REG_CASE(OP2, 2, VAL); \ - READ_WB_REG_CASE(OP2, 3, VAL); \ - READ_WB_REG_CASE(OP2, 4, VAL); \ - READ_WB_REG_CASE(OP2, 5, VAL); \ - READ_WB_REG_CASE(OP2, 6, VAL); \ - READ_WB_REG_CASE(OP2, 7, VAL); \ - READ_WB_REG_CASE(OP2, 8, VAL); \ - READ_WB_REG_CASE(OP2, 9, VAL); \ - READ_WB_REG_CASE(OP2, 10, VAL); \ - READ_WB_REG_CASE(OP2, 11, VAL); \ - READ_WB_REG_CASE(OP2, 12, VAL); \ - READ_WB_REG_CASE(OP2, 13, VAL); \ - READ_WB_REG_CASE(OP2, 14, VAL); \ - READ_WB_REG_CASE(OP2, 15, VAL) - -#define GEN_WRITE_WB_REG_CASES(OP2, VAL) \ - WRITE_WB_REG_CASE(OP2, 0, VAL); \ - WRITE_WB_REG_CASE(OP2, 1, VAL); \ - WRITE_WB_REG_CASE(OP2, 2, VAL); \ - WRITE_WB_REG_CASE(OP2, 3, VAL); \ - WRITE_WB_REG_CASE(OP2, 4, VAL); \ - WRITE_WB_REG_CASE(OP2, 5, VAL); \ - WRITE_WB_REG_CASE(OP2, 6, VAL); \ - WRITE_WB_REG_CASE(OP2, 7, VAL); \ - WRITE_WB_REG_CASE(OP2, 8, VAL); \ - WRITE_WB_REG_CASE(OP2, 9, VAL); \ - WRITE_WB_REG_CASE(OP2, 10, VAL); \ - WRITE_WB_REG_CASE(OP2, 11, VAL); \ - WRITE_WB_REG_CASE(OP2, 12, VAL); \ - WRITE_WB_REG_CASE(OP2, 13, VAL); \ - WRITE_WB_REG_CASE(OP2, 14, VAL); \ - WRITE_WB_REG_CASE(OP2, 15, VAL) - -static u32 read_wb_reg(int n) -{ - u32 val = 0; - - switch (n) { - GEN_READ_WB_REG_CASES(ARM_OP2_BVR, val); - GEN_READ_WB_REG_CASES(ARM_OP2_BCR, val); - GEN_READ_WB_REG_CASES(ARM_OP2_WVR, val); - GEN_READ_WB_REG_CASES(ARM_OP2_WCR, val); - default: - pr_warning("attempt to read from unknown breakpoint " - "register %d\n", n); - } - - return val; -} - -static void write_wb_reg(int n, u32 val) -{ - switch (n) { - GEN_WRITE_WB_REG_CASES(ARM_OP2_BVR, val); - GEN_WRITE_WB_REG_CASES(ARM_OP2_BCR, val); - GEN_WRITE_WB_REG_CASES(ARM_OP2_WVR, val); - GEN_WRITE_WB_REG_CASES(ARM_OP2_WCR, val); - default: - pr_warning("attempt to write to unknown breakpoint " - "register %d\n", n); - } - isb(); -} - -/* - * In order to access the breakpoint/watchpoint control registers, - * we must be running in debug monitor mode. Unfortunately, we can - * be put into halting debug mode at any time by an external debugger - * but there is nothing we can do to prevent that. - */ -static int enable_monitor_mode(void) -{ - u32 dscr; - int ret = 0; - - ARM_DBG_READ(c1, 0, dscr); - - /* Ensure that halting mode is disabled. */ - if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, "halting debug mode enabled." - "Unable to access hardware resources.")) { - ret = -EPERM; - goto out; - } - - /* Write to the corresponding DSCR. */ - switch (debug_arch) { - case ARM_DEBUG_ARCH_V6: - case ARM_DEBUG_ARCH_V6_1: - ARM_DBG_WRITE(c1, 0, (dscr | ARM_DSCR_MDBGEN)); - break; - case ARM_DEBUG_ARCH_V7_ECP14: - ARM_DBG_WRITE(c2, 2, (dscr | ARM_DSCR_MDBGEN)); - break; - default: - ret = -ENODEV; - goto out; - } - - /* Check that the write made it through. */ - ARM_DBG_READ(c1, 0, dscr); - if (WARN_ONCE(!(dscr & ARM_DSCR_MDBGEN), - "failed to enable monitor mode.")) { - ret = -EPERM; - } - -out: - return ret; -} - -/* - * Check if 8-bit byte-address select is available. - * This clobbers WRP 0. - */ -static u8 get_max_wp_len(void) -{ - u32 ctrl_reg; - struct arch_hw_breakpoint_ctrl ctrl; - u8 size = 4; - - if (debug_arch < ARM_DEBUG_ARCH_V7_ECP14) - goto out; - - if (enable_monitor_mode()) - goto out; - - memset(&ctrl, 0, sizeof(ctrl)); - ctrl.len = ARM_BREAKPOINT_LEN_8; - ctrl_reg = encode_ctrl_reg(ctrl); - - write_wb_reg(ARM_BASE_WVR, 0); - write_wb_reg(ARM_BASE_WCR, ctrl_reg); - if ((read_wb_reg(ARM_BASE_WCR) & ctrl_reg) == ctrl_reg) - size = 8; - -out: - return size; -} - -u8 arch_get_max_wp_len(void) -{ - return max_watchpoint_len; -} - -/* - * Handler for reactivating a suspended watchpoint when the single - * step `mismatch' breakpoint is triggered. - */ -static void wp_single_step_handler(struct perf_event *bp, int unused, - struct perf_sample_data *data, - struct pt_regs *regs) -{ - perf_event_enable(counter_arch_bp(bp)->suspended_wp); - unregister_hw_breakpoint(bp); -} - -static int bp_is_single_step(struct perf_event *bp) -{ - return bp->overflow_handler == wp_single_step_handler; -} - -/* - * Install a perf counter breakpoint. - */ -int arch_install_hw_breakpoint(struct perf_event *bp) -{ - struct arch_hw_breakpoint *info = counter_arch_bp(bp); - struct perf_event **slot, **slots; - int i, max_slots, ctrl_base, val_base, ret = 0; - - /* Ensure that we are in monitor mode and halting mode is disabled. */ - ret = enable_monitor_mode(); - if (ret) - goto out; - - if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { - /* Breakpoint */ - ctrl_base = ARM_BASE_BCR; - val_base = ARM_BASE_BVR; - slots = __get_cpu_var(bp_on_reg); - max_slots = core_num_brps - 1; - - if (bp_is_single_step(bp)) { - info->ctrl.mismatch = 1; - i = max_slots; - slots[i] = bp; - goto setup; - } - } else { - /* Watchpoint */ - ctrl_base = ARM_BASE_WCR; - val_base = ARM_BASE_WVR; - slots = __get_cpu_var(wp_on_reg); - max_slots = core_num_wrps; - } - - for (i = 0; i < max_slots; ++i) { - slot = &slots[i]; - - if (!*slot) { - *slot = bp; - break; - } - } - - if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) { - ret = -EBUSY; - goto out; - } - -setup: - /* Setup the address register. */ - write_wb_reg(val_base + i, info->address); - - /* Setup the control register. */ - write_wb_reg(ctrl_base + i, encode_ctrl_reg(info->ctrl) | 0x1); - -out: - return ret; -} - -void arch_uninstall_hw_breakpoint(struct perf_event *bp) -{ - struct arch_hw_breakpoint *info = counter_arch_bp(bp); - struct perf_event **slot, **slots; - int i, max_slots, base; - - if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { - /* Breakpoint */ - base = ARM_BASE_BCR; - slots = __get_cpu_var(bp_on_reg); - max_slots = core_num_brps - 1; - - if (bp_is_single_step(bp)) { - i = max_slots; - slots[i] = NULL; - goto reset; - } - } else { - /* Watchpoint */ - base = ARM_BASE_WCR; - slots = __get_cpu_var(wp_on_reg); - max_slots = core_num_wrps; - } - - /* Remove the breakpoint. */ - for (i = 0; i < max_slots; ++i) { - slot = &slots[i]; - - if (*slot == bp) { - *slot = NULL; - break; - } - } - - if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) - return; - -reset: - /* Reset the control register. */ - write_wb_reg(base + i, 0); -} - -static int get_hbp_len(u8 hbp_len) -{ - unsigned int len_in_bytes = 0; - - switch (hbp_len) { - case ARM_BREAKPOINT_LEN_1: - len_in_bytes = 1; - break; - case ARM_BREAKPOINT_LEN_2: - len_in_bytes = 2; - break; - case ARM_BREAKPOINT_LEN_4: - len_in_bytes = 4; - break; - case ARM_BREAKPOINT_LEN_8: - len_in_bytes = 8; - break; - } - - return len_in_bytes; -} - -/* - * Check whether bp virtual address is in kernel space. - */ -int arch_check_bp_in_kernelspace(struct perf_event *bp) -{ - unsigned int len; - unsigned long va; - struct arch_hw_breakpoint *info = counter_arch_bp(bp); - - va = info->address; - len = get_hbp_len(info->ctrl.len); - - return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE); -} - -/* - * Extract generic type and length encodings from an arch_hw_breakpoint_ctrl. - * Hopefully this will disappear when ptrace can bypass the conversion - * to generic breakpoint descriptions. - */ -int arch_bp_generic_fields(struct arch_hw_breakpoint_ctrl ctrl, - int *gen_len, int *gen_type) -{ - /* Type */ - switch (ctrl.type) { - case ARM_BREAKPOINT_EXECUTE: - *gen_type = HW_BREAKPOINT_X; - break; - case ARM_BREAKPOINT_LOAD: - *gen_type = HW_BREAKPOINT_R; - break; - case ARM_BREAKPOINT_STORE: - *gen_type = HW_BREAKPOINT_W; - break; - case ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE: - *gen_type = HW_BREAKPOINT_RW; - break; - default: - return -EINVAL; - } - - /* Len */ - switch (ctrl.len) { - case ARM_BREAKPOINT_LEN_1: - *gen_len = HW_BREAKPOINT_LEN_1; - break; - case ARM_BREAKPOINT_LEN_2: - *gen_len = HW_BREAKPOINT_LEN_2; - break; - case ARM_BREAKPOINT_LEN_4: - *gen_len = HW_BREAKPOINT_LEN_4; - break; - case ARM_BREAKPOINT_LEN_8: - *gen_len = HW_BREAKPOINT_LEN_8; - break; - default: - return -EINVAL; - } - - return 0; -} - -/* - * Construct an arch_hw_breakpoint from a perf_event. - */ -static int arch_build_bp_info(struct perf_event *bp) -{ - struct arch_hw_breakpoint *info = counter_arch_bp(bp); - - /* Type */ - switch (bp->attr.bp_type) { - case HW_BREAKPOINT_X: - info->ctrl.type = ARM_BREAKPOINT_EXECUTE; - break; - case HW_BREAKPOINT_R: - info->ctrl.type = ARM_BREAKPOINT_LOAD; - break; - case HW_BREAKPOINT_W: - info->ctrl.type = ARM_BREAKPOINT_STORE; - break; - case HW_BREAKPOINT_RW: - info->ctrl.type = ARM_BREAKPOINT_LOAD | ARM_BREAKPOINT_STORE; - break; - default: - return -EINVAL; - } - - /* Len */ - switch (bp->attr.bp_len) { - case HW_BREAKPOINT_LEN_1: - info->ctrl.len = ARM_BREAKPOINT_LEN_1; - break; - case HW_BREAKPOINT_LEN_2: - info->ctrl.len = ARM_BREAKPOINT_LEN_2; - break; - case HW_BREAKPOINT_LEN_4: - info->ctrl.len = ARM_BREAKPOINT_LEN_4; - break; - case HW_BREAKPOINT_LEN_8: - info->ctrl.len = ARM_BREAKPOINT_LEN_8; - if ((info->ctrl.type != ARM_BREAKPOINT_EXECUTE) - && max_watchpoint_len >= 8) - break; - default: - return -EINVAL; - } - - /* Address */ - info->address = bp->attr.bp_addr; - - /* Privilege */ - info->ctrl.privilege = ARM_BREAKPOINT_USER; - if (arch_check_bp_in_kernelspace(bp) && !bp_is_single_step(bp)) - info->ctrl.privilege |= ARM_BREAKPOINT_PRIV; - - /* Enabled? */ - info->ctrl.enabled = !bp->attr.disabled; - - /* Mismatch */ - info->ctrl.mismatch = 0; - - return 0; -} - -/* - * Validate the arch-specific HW Breakpoint register settings. - */ -int arch_validate_hwbkpt_settings(struct perf_event *bp) -{ - struct arch_hw_breakpoint *info = counter_arch_bp(bp); - int ret = 0; - u32 bytelen, max_len, offset, alignment_mask = 0x3; - - /* Build the arch_hw_breakpoint. */ - ret = arch_build_bp_info(bp); - if (ret) - goto out; - - /* Check address alignment. */ - if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) - alignment_mask = 0x7; - if (info->address & alignment_mask) { - /* - * Try to fix the alignment. This may result in a length - * that is too large, so we must check for that. - */ - bytelen = get_hbp_len(info->ctrl.len); - max_len = info->ctrl.type == ARM_BREAKPOINT_EXECUTE ? 4 : - max_watchpoint_len; - - if (max_len >= 8) - offset = info->address & 0x7; - else - offset = info->address & 0x3; - - if (bytelen > (1 << ((max_len - (offset + 1)) >> 1))) { - ret = -EFBIG; - goto out; - } - - info->ctrl.len <<= offset; - info->address &= ~offset; - - pr_debug("breakpoint alignment fixup: length = 0x%x, " - "address = 0x%x\n", info->ctrl.len, info->address); - } - - /* - * Currently we rely on an overflow handler to take - * care of single-stepping the breakpoint when it fires. - * In the case of userspace breakpoints on a core with V7 debug, - * we can use the mismatch feature as a poor-man's hardware single-step. - */ - if (WARN_ONCE(!bp->overflow_handler && - (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_bps()), - "overflow handler required but none found")) { - ret = -EINVAL; - goto out; - } -out: - return ret; -} - -static void update_mismatch_flag(int idx, int flag) -{ - struct perf_event *bp = __get_cpu_var(bp_on_reg[idx]); - struct arch_hw_breakpoint *info; - - if (bp == NULL) - return; - - info = counter_arch_bp(bp); - - /* Update the mismatch field to enter/exit `single-step' mode */ - if (!bp->overflow_handler && info->ctrl.mismatch != flag) { - info->ctrl.mismatch = flag; - write_wb_reg(ARM_BASE_BCR + idx, encode_ctrl_reg(info->ctrl) | 0x1); - } -} - -static void watchpoint_handler(unsigned long unknown, struct pt_regs *regs) -{ - int i; - struct perf_event *bp, **slots = __get_cpu_var(wp_on_reg); - struct arch_hw_breakpoint *info; - struct perf_event_attr attr; - - /* Without a disassembler, we can only handle 1 watchpoint. */ - BUG_ON(core_num_wrps > 1); - - hw_breakpoint_init(&attr); - attr.bp_addr = regs->ARM_pc & ~0x3; - attr.bp_len = HW_BREAKPOINT_LEN_4; - attr.bp_type = HW_BREAKPOINT_X; - - for (i = 0; i < core_num_wrps; ++i) { - rcu_read_lock(); - - if (slots[i] == NULL) { - rcu_read_unlock(); - continue; - } - - /* - * The DFAR is an unknown value. Since we only allow a - * single watchpoint, we can set the trigger to the lowest - * possible faulting address. - */ - info = counter_arch_bp(slots[i]); - info->trigger = slots[i]->attr.bp_addr; - pr_debug("watchpoint fired: address = 0x%x\n", info->trigger); - perf_bp_event(slots[i], regs); - - /* - * If no overflow handler is present, insert a temporary - * mismatch breakpoint so we can single-step over the - * watchpoint trigger. - */ - if (!slots[i]->overflow_handler) { - bp = register_user_hw_breakpoint(&attr, - wp_single_step_handler, - current); - counter_arch_bp(bp)->suspended_wp = slots[i]; - perf_event_disable(slots[i]); - } - - rcu_read_unlock(); - } -} - -static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs) -{ - int i; - int mismatch; - u32 ctrl_reg, val, addr; - struct perf_event *bp, **slots = __get_cpu_var(bp_on_reg); - struct arch_hw_breakpoint *info; - struct arch_hw_breakpoint_ctrl ctrl; - - /* The exception entry code places the amended lr in the PC. */ - addr = regs->ARM_pc; - - for (i = 0; i < core_num_brps; ++i) { - rcu_read_lock(); - - bp = slots[i]; - - if (bp == NULL) { - rcu_read_unlock(); - continue; - } - - mismatch = 0; - - /* Check if the breakpoint value matches. */ - val = read_wb_reg(ARM_BASE_BVR + i); - if (val != (addr & ~0x3)) - goto unlock; - - /* Possible match, check the byte address select to confirm. */ - ctrl_reg = read_wb_reg(ARM_BASE_BCR + i); - decode_ctrl_reg(ctrl_reg, &ctrl); - if ((1 << (addr & 0x3)) & ctrl.len) { - mismatch = 1; - info = counter_arch_bp(bp); - info->trigger = addr; - } - -unlock: - if ((mismatch && !info->ctrl.mismatch) || bp_is_single_step(bp)) { - pr_debug("breakpoint fired: address = 0x%x\n", addr); - perf_bp_event(bp, regs); - } - - update_mismatch_flag(i, mismatch); - rcu_read_unlock(); - } -} - -/* - * Called from either the Data Abort Handler [watchpoint] or the - * Prefetch Abort Handler [breakpoint]. - */ -static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, - struct pt_regs *regs) -{ - int ret = 1; /* Unhandled fault. */ - u32 dscr; - - /* We only handle watchpoints and hardware breakpoints. */ - ARM_DBG_READ(c1, 0, dscr); - - /* Perform perf callbacks. */ - switch (ARM_DSCR_MOE(dscr)) { - case ARM_ENTRY_BREAKPOINT: - breakpoint_handler(addr, regs); - break; - case ARM_ENTRY_ASYNC_WATCHPOINT: - WARN_ON("Asynchronous watchpoint exception taken. " - "Debugging results may be unreliable"); - case ARM_ENTRY_SYNC_WATCHPOINT: - watchpoint_handler(addr, regs); - break; - default: - goto out; - } - - ret = 0; -out: - return ret; -} - -/* - * One-time initialisation. - */ -static void __init reset_ctrl_regs(void *unused) -{ - int i; - - if (enable_monitor_mode()) - return; - - for (i = 0; i < core_num_brps; ++i) { - write_wb_reg(ARM_BASE_BCR + i, 0UL); - write_wb_reg(ARM_BASE_BVR + i, 0UL); - } - - for (i = 0; i < core_num_wrps; ++i) { - write_wb_reg(ARM_BASE_WCR + i, 0UL); - write_wb_reg(ARM_BASE_WVR + i, 0UL); - } -} - -static int __init arch_hw_breakpoint_init(void) -{ - int ret = 0; - u32 dscr; - - debug_arch = get_debug_arch(); - - if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) { - pr_info("debug architecture 0x%x unsupported.\n", debug_arch); - ret = -ENODEV; - goto out; - } - - /* Determine how many BRPs/WRPs are available. */ - core_num_brps = get_num_brps(); - core_num_wrps = get_num_wrps(); - - pr_info("found %d breakpoint and %d watchpoint registers.\n", - core_num_brps, core_num_wrps); - - if (core_has_mismatch_bps()) - pr_info("1 breakpoint reserved for watchpoint single-step.\n"); - - ARM_DBG_READ(c1, 0, dscr); - if (dscr & ARM_DSCR_HDBGEN) { - pr_warning("halting debug mode enabled. Assuming maximum " - "watchpoint size of 4 bytes."); - } else { - /* Work out the maximum supported watchpoint length. */ - max_watchpoint_len = get_max_wp_len(); - pr_info("maximum watchpoint size is %u bytes.\n", - max_watchpoint_len); - - /* - * Reset the breakpoint resources. We assume that a halting - * debugger will leave the world in a nice state for us. - */ - smp_call_function(reset_ctrl_regs, NULL, 1); - reset_ctrl_regs(NULL); - } - - /* Register debug fault handler. */ - hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, - "watchpoint debug exception"); - hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, - "breakpoint debug exception"); - -out: - return ret; -} -arch_initcall(arch_hw_breakpoint_init); - -void hw_breakpoint_pmu_read(struct perf_event *bp) -{ -} - -/* - * Dummy function to register with die_notifier. - */ -int hw_breakpoint_exceptions_notify(struct notifier_block *unused, - unsigned long val, void *data) -{ - return NOTIFY_DONE; -} diff --git a/trunk/arch/arm/kernel/module.c b/trunk/arch/arm/kernel/module.c index d9bd786ce23d..6b4605893f1e 100644 --- a/trunk/arch/arm/kernel/module.c +++ b/trunk/arch/arm/kernel/module.c @@ -69,31 +69,20 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, { #ifdef CONFIG_ARM_UNWIND Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; - struct arm_unwind_mapping *maps = mod->arch.map; for (s = sechdrs; s < sechdrs_end; s++) { - char const *secname = secstrings + s->sh_name; - - if (strcmp(".ARM.exidx.init.text", secname) == 0) - maps[ARM_SEC_INIT].unw_sec = s; - else if (strcmp(".ARM.exidx.devinit.text", secname) == 0) - maps[ARM_SEC_DEVINIT].unw_sec = s; - else if (strcmp(".ARM.exidx", secname) == 0) - maps[ARM_SEC_CORE].unw_sec = s; - else if (strcmp(".ARM.exidx.exit.text", secname) == 0) - maps[ARM_SEC_EXIT].unw_sec = s; - else if (strcmp(".ARM.exidx.devexit.text", secname) == 0) - maps[ARM_SEC_DEVEXIT].unw_sec = s; - else if (strcmp(".init.text", secname) == 0) - maps[ARM_SEC_INIT].sec_text = s; - else if (strcmp(".devinit.text", secname) == 0) - maps[ARM_SEC_DEVINIT].sec_text = s; - else if (strcmp(".text", secname) == 0) - maps[ARM_SEC_CORE].sec_text = s; - else if (strcmp(".exit.text", secname) == 0) - maps[ARM_SEC_EXIT].sec_text = s; - else if (strcmp(".devexit.text", secname) == 0) - maps[ARM_SEC_DEVEXIT].sec_text = s; + if (strcmp(".ARM.exidx.init.text", secstrings + s->sh_name) == 0) + mod->arch.unw_sec_init = s; + else if (strcmp(".ARM.exidx.devinit.text", secstrings + s->sh_name) == 0) + mod->arch.unw_sec_devinit = s; + else if (strcmp(".ARM.exidx", secstrings + s->sh_name) == 0) + mod->arch.unw_sec_core = s; + else if (strcmp(".init.text", secstrings + s->sh_name) == 0) + mod->arch.sec_init_text = s; + else if (strcmp(".devinit.text", secstrings + s->sh_name) == 0) + mod->arch.sec_devinit_text = s; + else if (strcmp(".text", secstrings + s->sh_name) == 0) + mod->arch.sec_core_text = s; } #endif return 0; @@ -303,22 +292,31 @@ apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, #ifdef CONFIG_ARM_UNWIND static void register_unwind_tables(struct module *mod) { - int i; - for (i = 0; i < ARM_SEC_MAX; ++i) { - struct arm_unwind_mapping *map = &mod->arch.map[i]; - if (map->unw_sec && map->sec_text) - map->unwind = unwind_table_add(map->unw_sec->sh_addr, - map->unw_sec->sh_size, - map->sec_text->sh_addr, - map->sec_text->sh_size); - } + if (mod->arch.unw_sec_init && mod->arch.sec_init_text) + mod->arch.unwind_init = + unwind_table_add(mod->arch.unw_sec_init->sh_addr, + mod->arch.unw_sec_init->sh_size, + mod->arch.sec_init_text->sh_addr, + mod->arch.sec_init_text->sh_size); + if (mod->arch.unw_sec_devinit && mod->arch.sec_devinit_text) + mod->arch.unwind_devinit = + unwind_table_add(mod->arch.unw_sec_devinit->sh_addr, + mod->arch.unw_sec_devinit->sh_size, + mod->arch.sec_devinit_text->sh_addr, + mod->arch.sec_devinit_text->sh_size); + if (mod->arch.unw_sec_core && mod->arch.sec_core_text) + mod->arch.unwind_core = + unwind_table_add(mod->arch.unw_sec_core->sh_addr, + mod->arch.unw_sec_core->sh_size, + mod->arch.sec_core_text->sh_addr, + mod->arch.sec_core_text->sh_size); } static void unregister_unwind_tables(struct module *mod) { - int i = ARM_SEC_MAX; - while (--i >= 0) - unwind_table_del(mod->arch.map[i].unwind); + unwind_table_del(mod->arch.unwind_init); + unwind_table_del(mod->arch.unwind_devinit); + unwind_table_del(mod->arch.unwind_core); } #else static inline void register_unwind_tables(struct module *mod) { } diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index 3af34bf4f4df..401e38be1f78 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include @@ -136,25 +135,6 @@ EXPORT_SYMBOL(pm_power_off); void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; EXPORT_SYMBOL_GPL(arm_pm_restart); -static void do_nothing(void *unused) -{ -} - -/* - * cpu_idle_wait - Used to ensure that all the CPUs discard old value of - * pm_idle and update to new pm_idle value. Required while changing pm_idle - * handler on SMP systems. - * - * Caller must have changed pm_idle to the new value before the call. Old - * pm_idle value will not be used by any CPU after the return of this function. - */ -void cpu_idle_wait(void) -{ - smp_mb(); - /* kick all the CPUs so that they exit out of pm_idle */ - smp_call_function(do_nothing, NULL, 1); -} -EXPORT_SYMBOL_GPL(cpu_idle_wait); /* * This is our default idle handler. We need to disable @@ -337,8 +317,6 @@ void flush_thread(void) struct thread_info *thread = current_thread_info(); struct task_struct *tsk = current; - flush_ptrace_hw_breakpoint(tsk); - memset(thread->used_cp, 0, sizeof(thread->used_cp)); memset(&tsk->thread.debug, 0, sizeof(struct debug_info)); memset(&thread->fpstate, 0, sizeof(union fp_state)); @@ -367,8 +345,6 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start, thread->cpu_context.sp = (unsigned long)childregs; thread->cpu_context.pc = (unsigned long)ret_from_fork; - clear_ptrace_hw_breakpoint(p); - if (clone_flags & CLONE_SETTLS) thread->tp_value = regs->ARM_r3; diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index e0cb6370ed14..f99d489822d5 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -19,8 +19,6 @@ #include #include #include -#include -#include #include #include @@ -849,232 +847,6 @@ static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) } #endif -#ifdef CONFIG_HAVE_HW_BREAKPOINT -/* - * Convert a virtual register number into an index for a thread_info - * breakpoint array. Breakpoints are identified using positive numbers - * whilst watchpoints are negative. The registers are laid out as pairs - * of (address, control), each pair mapping to a unique hw_breakpoint struct. - * Register 0 is reserved for describing resource information. - */ -static int ptrace_hbp_num_to_idx(long num) -{ - if (num < 0) - num = (ARM_MAX_BRP << 1) - num; - return (num - 1) >> 1; -} - -/* - * Returns the virtual register number for the address of the - * breakpoint at index idx. - */ -static long ptrace_hbp_idx_to_num(int idx) -{ - long mid = ARM_MAX_BRP << 1; - long num = (idx << 1) + 1; - return num > mid ? mid - num : num; -} - -/* - * Handle hitting a HW-breakpoint. - */ -static void ptrace_hbptriggered(struct perf_event *bp, int unused, - struct perf_sample_data *data, - struct pt_regs *regs) -{ - struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp); - long num; - int i; - siginfo_t info; - - for (i = 0; i < ARM_MAX_HBP_SLOTS; ++i) - if (current->thread.debug.hbp[i] == bp) - break; - - num = (i == ARM_MAX_HBP_SLOTS) ? 0 : ptrace_hbp_idx_to_num(i); - - info.si_signo = SIGTRAP; - info.si_errno = (int)num; - info.si_code = TRAP_HWBKPT; - info.si_addr = (void __user *)(bkpt->trigger); - - force_sig_info(SIGTRAP, &info, current); -} - -/* - * Set ptrace breakpoint pointers to zero for this task. - * This is required in order to prevent child processes from unregistering - * breakpoints held by their parent. - */ -void clear_ptrace_hw_breakpoint(struct task_struct *tsk) -{ - memset(tsk->thread.debug.hbp, 0, sizeof(tsk->thread.debug.hbp)); -} - -/* - * Unregister breakpoints from this task and reset the pointers in - * the thread_struct. - */ -void flush_ptrace_hw_breakpoint(struct task_struct *tsk) -{ - int i; - struct thread_struct *t = &tsk->thread; - - for (i = 0; i < ARM_MAX_HBP_SLOTS; i++) { - if (t->debug.hbp[i]) { - unregister_hw_breakpoint(t->debug.hbp[i]); - t->debug.hbp[i] = NULL; - } - } -} - -static u32 ptrace_get_hbp_resource_info(void) -{ - u8 num_brps, num_wrps, debug_arch, wp_len; - u32 reg = 0; - - num_brps = hw_breakpoint_slots(TYPE_INST); - num_wrps = hw_breakpoint_slots(TYPE_DATA); - debug_arch = arch_get_debug_arch(); - wp_len = arch_get_max_wp_len(); - - reg |= debug_arch; - reg <<= 8; - reg |= wp_len; - reg <<= 8; - reg |= num_wrps; - reg <<= 8; - reg |= num_brps; - - return reg; -} - -static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type) -{ - struct perf_event_attr attr; - - ptrace_breakpoint_init(&attr); - - /* Initialise fields to sane defaults. */ - attr.bp_addr = 0; - attr.bp_len = HW_BREAKPOINT_LEN_4; - attr.bp_type = type; - attr.disabled = 1; - - return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, tsk); -} - -static int ptrace_gethbpregs(struct task_struct *tsk, long num, - unsigned long __user *data) -{ - u32 reg; - int idx, ret = 0; - struct perf_event *bp; - struct arch_hw_breakpoint_ctrl arch_ctrl; - - if (num == 0) { - reg = ptrace_get_hbp_resource_info(); - } else { - idx = ptrace_hbp_num_to_idx(num); - if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) { - ret = -EINVAL; - goto out; - } - - bp = tsk->thread.debug.hbp[idx]; - if (!bp) { - reg = 0; - goto put; - } - - arch_ctrl = counter_arch_bp(bp)->ctrl; - - /* - * Fix up the len because we may have adjusted it - * to compensate for an unaligned address. - */ - while (!(arch_ctrl.len & 0x1)) - arch_ctrl.len >>= 1; - - if (idx & 0x1) - reg = encode_ctrl_reg(arch_ctrl); - else - reg = bp->attr.bp_addr; - } - -put: - if (put_user(reg, data)) - ret = -EFAULT; - -out: - return ret; -} - -static int ptrace_sethbpregs(struct task_struct *tsk, long num, - unsigned long __user *data) -{ - int idx, gen_len, gen_type, implied_type, ret = 0; - u32 user_val; - struct perf_event *bp; - struct arch_hw_breakpoint_ctrl ctrl; - struct perf_event_attr attr; - - if (num == 0) - goto out; - else if (num < 0) - implied_type = HW_BREAKPOINT_RW; - else - implied_type = HW_BREAKPOINT_X; - - idx = ptrace_hbp_num_to_idx(num); - if (idx < 0 || idx >= ARM_MAX_HBP_SLOTS) { - ret = -EINVAL; - goto out; - } - - if (get_user(user_val, data)) { - ret = -EFAULT; - goto out; - } - - bp = tsk->thread.debug.hbp[idx]; - if (!bp) { - bp = ptrace_hbp_create(tsk, implied_type); - if (IS_ERR(bp)) { - ret = PTR_ERR(bp); - goto out; - } - tsk->thread.debug.hbp[idx] = bp; - } - - attr = bp->attr; - - if (num & 0x1) { - /* Address */ - attr.bp_addr = user_val; - } else { - /* Control */ - decode_ctrl_reg(user_val, &ctrl); - ret = arch_bp_generic_fields(ctrl, &gen_len, &gen_type); - if (ret) - goto out; - - if ((gen_type & implied_type) != gen_type) { - ret = -EINVAL; - goto out; - } - - attr.bp_len = gen_len; - attr.bp_type = gen_type; - attr.disabled = !ctrl.enabled; - } - - ret = modify_user_hw_breakpoint(bp, &attr); -out: - return ret; -} -#endif - long arch_ptrace(struct task_struct *child, long request, long addr, long data) { int ret; @@ -1144,17 +916,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; #endif -#ifdef CONFIG_HAVE_HW_BREAKPOINT - case PTRACE_GETHBPREGS: - ret = ptrace_gethbpregs(child, addr, - (unsigned long __user *)data); - break; - case PTRACE_SETHBPREGS: - ret = ptrace_sethbpregs(child, addr, - (unsigned long __user *)data); - break; -#endif - default: ret = ptrace_request(child, request, addr, data); break; diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index 336f14e0e5c2..d5231ae7355a 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include #include @@ -239,35 +238,6 @@ int cpu_architecture(void) return cpu_arch; } -static int cpu_has_aliasing_icache(unsigned int arch) -{ - int aliasing_icache; - unsigned int id_reg, num_sets, line_size; - - /* arch specifies the register format */ - switch (arch) { - case CPU_ARCH_ARMv7: - asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR" - : /* No output operands */ - : "r" (1)); - isb(); - asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR" - : "=r" (id_reg)); - line_size = 4 << ((id_reg & 0x7) + 2); - num_sets = ((id_reg >> 13) & 0x7fff) + 1; - aliasing_icache = (line_size * num_sets) > PAGE_SIZE; - break; - case CPU_ARCH_ARMv6: - aliasing_icache = read_cpuid_cachetype() & (1 << 11); - break; - default: - /* I-cache aliases will be handled by D-cache aliasing code */ - aliasing_icache = 0; - } - - return aliasing_icache; -} - static void __init cacheid_init(void) { unsigned int cachetype = read_cpuid_cachetype(); @@ -279,15 +249,10 @@ static void __init cacheid_init(void) cacheid = CACHEID_VIPT_NONALIASING; if ((cachetype & (3 << 14)) == 1 << 14) cacheid |= CACHEID_ASID_TAGGED; - else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7)) - cacheid |= CACHEID_VIPT_I_ALIASING; - } else if (cachetype & (1 << 23)) { + } else if (cachetype & (1 << 23)) cacheid = CACHEID_VIPT_ALIASING; - } else { + else cacheid = CACHEID_VIPT_NONALIASING; - if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6)) - cacheid |= CACHEID_VIPT_I_ALIASING; - } } else { cacheid = CACHEID_VIVT; } @@ -298,7 +263,7 @@ static void __init cacheid_init(void) cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown", cache_is_vivt() ? "VIVT" : icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" : - icache_is_vipt_aliasing() ? "VIPT aliasing" : + cache_is_vipt_aliasing() ? "VIPT aliasing" : cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown"); } @@ -525,7 +490,7 @@ request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc) kernel_code.start = virt_to_phys(_text); kernel_code.end = virt_to_phys(_etext - 1); - kernel_data.start = virt_to_phys(_sdata); + kernel_data.start = virt_to_phys(_data); kernel_data.end = virt_to_phys(_end - 1); for (i = 0; i < mi->nr_banks; i++) { @@ -860,8 +825,7 @@ void __init setup_arch(char **cmdline_p) request_standard_resources(&meminfo, mdesc); #ifdef CONFIG_SMP - if (is_smp()) - smp_init_cpus(); + smp_init_cpus(); #endif reserve_crashkernel(); diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c index 8c1959590252..40dc74f2b27f 100644 --- a/trunk/arch/arm/kernel/smp.c +++ b/trunk/arch/arm/kernel/smp.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include @@ -68,47 +67,12 @@ enum ipi_msg_type { IPI_CPU_STOP, }; -static inline void identity_mapping_add(pgd_t *pgd, unsigned long start, - unsigned long end) -{ - unsigned long addr, prot; - pmd_t *pmd; - - prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE; - if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) - prot |= PMD_BIT4; - - for (addr = start & PGDIR_MASK; addr < end;) { - pmd = pmd_offset(pgd + pgd_index(addr), addr); - pmd[0] = __pmd(addr | prot); - addr += SECTION_SIZE; - pmd[1] = __pmd(addr | prot); - addr += SECTION_SIZE; - flush_pmd_entry(pmd); - outer_clean_range(__pa(pmd), __pa(pmd + 1)); - } -} - -static inline void identity_mapping_del(pgd_t *pgd, unsigned long start, - unsigned long end) -{ - unsigned long addr; - pmd_t *pmd; - - for (addr = start & PGDIR_MASK; addr < end; addr += PGDIR_SIZE) { - pmd = pmd_offset(pgd + pgd_index(addr), addr); - pmd[0] = __pmd(0); - pmd[1] = __pmd(0); - clean_pmd_entry(pmd); - outer_clean_range(__pa(pmd), __pa(pmd + 1)); - } -} - int __cpuinit __cpu_up(unsigned int cpu) { struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); struct task_struct *idle = ci->idle; pgd_t *pgd; + pmd_t *pmd; int ret; /* @@ -137,16 +101,11 @@ int __cpuinit __cpu_up(unsigned int cpu) * a 1:1 mapping for the physical address of the kernel. */ pgd = pgd_alloc(&init_mm); - if (!pgd) - return -ENOMEM; - - if (PHYS_OFFSET != PAGE_OFFSET) { -#ifndef CONFIG_HOTPLUG_CPU - identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); -#endif - identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); - identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); - } + pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); + *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | + PMD_TYPE_SECT | PMD_SECT_AP_WRITE); + flush_pmd_entry(pmd); + outer_clean_range(__pa(pmd), __pa(pmd + 1)); /* * We need to tell the secondary core where to find @@ -184,14 +143,8 @@ int __cpuinit __cpu_up(unsigned int cpu) secondary_data.stack = NULL; secondary_data.pgdir = 0; - if (PHYS_OFFSET != PAGE_OFFSET) { -#ifndef CONFIG_HOTPLUG_CPU - identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); -#endif - identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); - identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); - } - + *pmd = __pmd(0); + clean_pmd_entry(pmd); pgd_free(&init_mm, pgd); if (ret) { @@ -614,8 +567,7 @@ void smp_send_stop(void) { cpumask_t mask = cpu_online_map; cpu_clear(smp_processor_id(), mask); - if (!cpus_empty(mask)) - send_ipi_message(&mask, IPI_CPU_STOP); + send_ipi_message(&mask, IPI_CPU_STOP); } /* diff --git a/trunk/arch/arm/kernel/unwind.c b/trunk/arch/arm/kernel/unwind.c index 2a161765f6d5..dd81a918c106 100644 --- a/trunk/arch/arm/kernel/unwind.c +++ b/trunk/arch/arm/kernel/unwind.c @@ -146,8 +146,6 @@ static struct unwind_idx *unwind_find_idx(unsigned long addr) addr < table->end_addr) { idx = search_index(addr, table->start, table->stop - 1); - /* Move-to-front to exploit common traces */ - list_move(&table->list, &unwind_tables); break; } } diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 1953e3d21abf..b16c07914b55 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -8,19 +8,6 @@ #include #include -#define PROC_INFO \ - VMLINUX_SYMBOL(__proc_info_begin) = .; \ - *(.proc.info.init) \ - VMLINUX_SYMBOL(__proc_info_end) = .; - -#ifdef CONFIG_HOTPLUG_CPU -#define ARM_CPU_DISCARD(x) -#define ARM_CPU_KEEP(x) x -#else -#define ARM_CPU_DISCARD(x) x -#define ARM_CPU_KEEP(x) -#endif - OUTPUT_ARCH(arm) ENTRY(stext) @@ -44,18 +31,15 @@ SECTIONS HEAD_TEXT INIT_TEXT _einittext = .; - ARM_CPU_DISCARD(PROC_INFO) + __proc_info_begin = .; + *(.proc.info.init) + __proc_info_end = .; __arch_info_begin = .; *(.arch.info.init) __arch_info_end = .; __tagtable_begin = .; *(.taglist.init) __tagtable_end = .; -#ifdef CONFIG_SMP_ON_UP - __smpalt_begin = .; - *(.alt.smp.init) - __smpalt_end = .; -#endif INIT_SETUP(16) @@ -84,8 +68,10 @@ SECTIONS /DISCARD/ : { *(.ARM.exidx.exit.text) *(.ARM.extab.exit.text) - ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text)) - ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text)) +#ifndef CONFIG_HOTPLUG_CPU + *(.ARM.exidx.cpuexit.text) + *(.ARM.extab.cpuexit.text) +#endif #ifndef CONFIG_HOTPLUG *(.ARM.exidx.devexit.text) *(.ARM.extab.devexit.text) @@ -114,11 +100,12 @@ SECTIONS *(.glue_7) *(.glue_7t) *(.got) /* Global offset table */ - ARM_CPU_KEEP(PROC_INFO) } RO_DATA(PAGE_SIZE) + _etext = .; /* End of text and rodata section */ + #ifdef CONFIG_ARM_UNWIND /* * Stack unwinding tables @@ -136,8 +123,6 @@ SECTIONS } #endif - _etext = .; /* End of text and rodata section */ - #ifdef CONFIG_XIP_KERNEL __data_loc = ALIGN(4); /* location in binary */ . = PAGE_OFFSET + TEXT_OFFSET; @@ -252,12 +237,6 @@ SECTIONS /* Default discards */ DISCARDS - -#ifndef CONFIG_SMP_ON_UP - /DISCARD/ : { - *(.alt.smp.init) - } -#endif } /* diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index ca33862b4bf4..939bccd70569 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -248,12 +248,6 @@ config MACH_CPU9260 Select this if you are using a Eukrea Electromatique's CPU9260 Board -config MACH_FLEXIBITY - bool "Flexibity Connect board" - help - Select this if you are using Flexibity Connect board - - endif # ---------------------------------------------------------- diff --git a/trunk/arch/arm/mach-at91/Makefile b/trunk/arch/arm/mach-at91/Makefile index 7cbe06d7cee9..ca2ac003f41f 100644 --- a/trunk/arch/arm/mach-at91/Makefile +++ b/trunk/arch/arm/mach-at91/Makefile @@ -46,7 +46,6 @@ obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o -obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o # AT91SAM9261 board-specific support obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o diff --git a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c index 1276babf84d5..5e71ccd5e7d3 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c @@ -426,7 +426,7 @@ static struct i2c_gpio_platform_data pdata_i2c0 = { .sda_is_open_drain = 1, .scl_pin = AT91_PIN_PA21, .scl_is_open_drain = 1, - .udelay = 5, /* ~100 kHz */ + .udelay = 2, /* ~100 kHz */ }; static struct platform_device at91sam9g45_twi0_device = { @@ -440,7 +440,7 @@ static struct i2c_gpio_platform_data pdata_i2c1 = { .sda_is_open_drain = 1, .scl_pin = AT91_PIN_PB11, .scl_is_open_drain = 1, - .udelay = 5, /* ~100 kHz */ + .udelay = 2, /* ~100 kHz */ }; static struct platform_device at91sam9g45_twi1_device = { diff --git a/trunk/arch/arm/mach-at91/board-flexibity.c b/trunk/arch/arm/mach-at91/board-flexibity.c deleted file mode 100644 index 216c8ca985f4..000000000000 --- a/trunk/arch/arm/mach-at91/board-flexibity.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * linux/arch/arm/mach-at91/board-flexibity.c - * - * Copyright (C) 2010 Flexibity - * Copyright (C) 2005 SAN People - * Copyright (C) 2006 Atmel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include "generic.h" - -static void __init flexibity_map_io(void) -{ - /* Initialize processor: 18.432 MHz crystal */ - at91sam9260_initialize(18432000); - - /* DBGU on ttyS0. (Rx & Tx only) */ - at91_register_uart(0, 0, 0); - - /* set serial console to ttyS0 (ie, DBGU) */ - at91_set_serial_console(0); -} - -static void __init flexibity_init_irq(void) -{ - at91sam9260_init_interrupts(NULL); -} - -/* USB Host port */ -static struct at91_usbh_data __initdata flexibity_usbh_data = { - .ports = 2, -}; - -/* USB Device port */ -static struct at91_udc_data __initdata flexibity_udc_data = { - .vbus_pin = AT91_PIN_PC5, - .pullup_pin = 0, /* pull-up driven by UDC */ -}; - -/* SPI devices */ -static struct spi_board_info flexibity_spi_devices[] = { - { /* DataFlash chip */ - .modalias = "mtd_dataflash", - .chip_select = 1, - .max_speed_hz = 15 * 1000 * 1000, - .bus_num = 0, - }, -}; - -/* MCI (SD/MMC) */ -static struct at91_mmc_data __initdata flexibity_mmc_data = { - .slot_b = 0, - .wire4 = 1, - .det_pin = AT91_PIN_PC9, - .wp_pin = AT91_PIN_PC4, -}; - -/* LEDs */ -static struct gpio_led flexibity_leds[] = { - { - .name = "usb1:green", - .gpio = AT91_PIN_PA12, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb1:red", - .gpio = AT91_PIN_PA13, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb2:green", - .gpio = AT91_PIN_PB26, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb2:red", - .gpio = AT91_PIN_PB27, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb3:green", - .gpio = AT91_PIN_PC8, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb3:red", - .gpio = AT91_PIN_PC6, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb4:green", - .gpio = AT91_PIN_PB4, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "usb4:red", - .gpio = AT91_PIN_PB5, - .active_low = 1, - .default_trigger = "default-on", - } -}; - -static void __init flexibity_board_init(void) -{ - /* Serial */ - at91_add_device_serial(); - /* USB Host */ - at91_add_device_usbh(&flexibity_usbh_data); - /* USB Device */ - at91_add_device_udc(&flexibity_udc_data); - /* SPI */ - at91_add_device_spi(flexibity_spi_devices, - ARRAY_SIZE(flexibity_spi_devices)); - /* MMC */ - at91_add_device_mmc(0, &flexibity_mmc_data); - /* LEDs */ - at91_gpio_leds(flexibity_leds, ARRAY_SIZE(flexibity_leds)); -} - -MACHINE_START(FLEXIBITY, "Flexibity Connect") - /* Maintainer: Maxim Osipov */ - .phys_io = AT91_BASE_SYS, - .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, - .boot_params = AT91_SDRAM_BASE + 0x100, - .timer = &at91sam926x_timer, - .map_io = flexibity_map_io, - .init_irq = flexibity_init_irq, - .init_machine = flexibity_board_init, -MACHINE_END diff --git a/trunk/arch/arm/mach-davinci/dm355.c b/trunk/arch/arm/mach-davinci/dm355.c index 9be261beae7d..3d996b659ff4 100644 --- a/trunk/arch/arm/mach-davinci/dm355.c +++ b/trunk/arch/arm/mach-davinci/dm355.c @@ -769,7 +769,8 @@ static struct map_desc dm355_io_desc[] = { .virtual = SRAM_VIRT, .pfn = __phys_to_pfn(0x00010000), .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, + /* MT_MEMORY_NONCACHED requires supersection alignment */ + .type = MT_DEVICE, }, }; diff --git a/trunk/arch/arm/mach-davinci/dm365.c b/trunk/arch/arm/mach-davinci/dm365.c index 7781e35daec3..6b6f4c643709 100644 --- a/trunk/arch/arm/mach-davinci/dm365.c +++ b/trunk/arch/arm/mach-davinci/dm365.c @@ -969,7 +969,8 @@ static struct map_desc dm365_io_desc[] = { .virtual = SRAM_VIRT, .pfn = __phys_to_pfn(0x00010000), .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, + /* MT_MEMORY_NONCACHED requires supersection alignment */ + .type = MT_DEVICE, }, }; diff --git a/trunk/arch/arm/mach-davinci/dm644x.c b/trunk/arch/arm/mach-davinci/dm644x.c index 5e5b0a7831fb..40fec315c99a 100644 --- a/trunk/arch/arm/mach-davinci/dm644x.c +++ b/trunk/arch/arm/mach-davinci/dm644x.c @@ -653,7 +653,8 @@ static struct map_desc dm644x_io_desc[] = { .virtual = SRAM_VIRT, .pfn = __phys_to_pfn(0x00008000), .length = SZ_16K, - .type = MT_MEMORY_NONCACHED, + /* MT_MEMORY_NONCACHED requires supersection alignment */ + .type = MT_DEVICE, }, }; diff --git a/trunk/arch/arm/mach-davinci/dm646x.c b/trunk/arch/arm/mach-davinci/dm646x.c index 26e8a9c7f50b..e4a3df1872ac 100644 --- a/trunk/arch/arm/mach-davinci/dm646x.c +++ b/trunk/arch/arm/mach-davinci/dm646x.c @@ -737,7 +737,8 @@ static struct map_desc dm646x_io_desc[] = { .virtual = SRAM_VIRT, .pfn = __phys_to_pfn(0x00010000), .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, + /* MT_MEMORY_NONCACHED requires supersection alignment */ + .type = MT_DEVICE, }, }; diff --git a/trunk/arch/arm/mach-dove/include/mach/io.h b/trunk/arch/arm/mach-dove/include/mach/io.h index eb4936ff90ad..3b3e4721ce2e 100644 --- a/trunk/arch/arm/mach-dove/include/mach/io.h +++ b/trunk/arch/arm/mach-dove/include/mach/io.h @@ -13,8 +13,8 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_BUS_BASE) + \ - DOVE_PCIE0_IO_VIRT_BASE)) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(((a) - DOVE_PCIE0_IO_PHYS_BASE) +\ + DOVE_PCIE0_IO_VIRT_BASE)) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-ixp4xx/common-pci.c b/trunk/arch/arm/mach-ixp4xx/common-pci.c index 24498a932ba6..61cd4d64b985 100644 --- a/trunk/arch/arm/mach-ixp4xx/common-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/common-pci.c @@ -503,14 +503,6 @@ struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); } -int dma_set_coherent_mask(struct device *dev, u64 mask) -{ - if (mask >= SZ_64M - 1) - return 0; - - return -EIO; -} - EXPORT_SYMBOL(ixp4xx_pci_read); EXPORT_SYMBOL(ixp4xx_pci_write); diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/hardware.h b/trunk/arch/arm/mach-ixp4xx/include/mach/hardware.h index 8138371c406e..f91ca6d4fbe8 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/hardware.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/hardware.h @@ -26,8 +26,6 @@ #define PCIBIOS_MAX_MEM 0x4BFFFFFF #endif -#define ARCH_HAS_DMA_SET_COHERENT_MASK - #define pcibios_assign_all_busses() 1 /* Register locations and bits */ diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 6e924b398919..93fc2ec95e76 100644 --- a/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -38,7 +38,7 @@ #define KIRKWOOD_PCIE1_IO_PHYS_BASE 0xf3000000 #define KIRKWOOD_PCIE1_IO_VIRT_BASE 0xfef00000 -#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00100000 +#define KIRKWOOD_PCIE1_IO_BUS_BASE 0x00000000 #define KIRKWOOD_PCIE1_IO_SIZE SZ_1M #define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 diff --git a/trunk/arch/arm/mach-kirkwood/pcie.c b/trunk/arch/arm/mach-kirkwood/pcie.c index 513ad3102d7c..55e7f00836b7 100644 --- a/trunk/arch/arm/mach-kirkwood/pcie.c +++ b/trunk/arch/arm/mach-kirkwood/pcie.c @@ -117,7 +117,7 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp) * IORESOURCE_IO */ pp->res[0].name = "PCIe 0 I/O Space"; - pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE; + pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; pp->res[0].flags = IORESOURCE_IO; @@ -139,7 +139,7 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp) * IORESOURCE_IO */ pp->res[0].name = "PCIe 1 I/O Space"; - pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE; + pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE; pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1; pp->res[0].flags = IORESOURCE_IO; diff --git a/trunk/arch/arm/mach-mmp/include/mach/system.h b/trunk/arch/arm/mach-mmp/include/mach/system.h index 1a8a25edb1b4..4f5b0e0ce6cf 100644 --- a/trunk/arch/arm/mach-mmp/include/mach/system.h +++ b/trunk/arch/arm/mach-mmp/include/mach/system.h @@ -9,8 +9,6 @@ #ifndef __ASM_MACH_SYSTEM_H #define __ASM_MACH_SYSTEM_H -#include - static inline void arch_idle(void) { cpu_do_idle(); @@ -18,9 +16,6 @@ static inline void arch_idle(void) static inline void arch_reset(char mode, const char *cmd) { - if (cpu_is_pxa168()) - cpu_reset(0xffff0000); - else - cpu_reset(0); + cpu_reset(0); } #endif /* __ASM_MACH_SYSTEM_H */ diff --git a/trunk/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/trunk/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 58093d9e07be..50d5939a78f1 100644 --- a/trunk/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/trunk/arch/arm/mach-pxa/cpufreq-pxa2xx.c @@ -312,7 +312,8 @@ static int pxa_set_target(struct cpufreq_policy *policy, freqs.cpu = policy->cpu; if (freq_debug) - pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", + pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, " + "(SDRAM %d Mhz)\n", freqs.new / 1000, (pxa_freq_settings[idx].div2) ? (new_freq_mem / 2000) : (new_freq_mem / 1000)); diff --git a/trunk/arch/arm/mach-pxa/include/mach/hardware.h b/trunk/arch/arm/mach-pxa/include/mach/hardware.h index 814f1458a06a..7f64d24cd564 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/hardware.h +++ b/trunk/arch/arm/mach-pxa/include/mach/hardware.h @@ -264,35 +264,23 @@ * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x * == 0x3 for pxa300/pxa310/pxa320 */ -#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) #define __cpu_is_pxa2xx(id) \ ({ \ unsigned int _id = (id) >> 13 & 0x7; \ _id <= 0x2; \ }) -#else -#define __cpu_is_pxa2xx(id) (0) -#endif -#ifdef CONFIG_PXA3xx #define __cpu_is_pxa3xx(id) \ ({ \ unsigned int _id = (id) >> 13 & 0x7; \ _id == 0x3; \ }) -#else -#define __cpu_is_pxa3xx(id) (0) -#endif -#if defined(CONFIG_CPU_PXA930) || defined(CONFIG_CPU_PXA935) #define __cpu_is_pxa93x(id) \ ({ \ unsigned int _id = (id) >> 4 & 0xfff; \ _id == 0x683 || _id == 0x693; \ }) -#else -#define __cpu_is_pxa93x(id) (0) -#endif #define cpu_is_pxa2xx() \ ({ \ @@ -321,7 +309,7 @@ extern unsigned long get_clock_tick_rate(void); #define PCIBIOS_MIN_IO 0 #define PCIBIOS_MIN_MEM 0 #define pcibios_assign_all_busses() 1 -#define ARCH_HAS_DMA_SET_COHERENT_MASK #endif + #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/trunk/arch/arm/mach-pxa/include/mach/io.h b/trunk/arch/arm/mach-pxa/include/mach/io.h index fdca3be47d9b..262691fb97d8 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/io.h +++ b/trunk/arch/arm/mach-pxa/include/mach/io.h @@ -6,8 +6,6 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include - #define IO_SPACE_LIMIT 0xffffffff /* diff --git a/trunk/arch/arm/mach-pxa/palm27x.c b/trunk/arch/arm/mach-pxa/palm27x.c index 405b92a29793..77ad6d34ab5b 100644 --- a/trunk/arch/arm/mach-pxa/palm27x.c +++ b/trunk/arch/arm/mach-pxa/palm27x.c @@ -469,13 +469,9 @@ static struct i2c_board_info __initdata palm27x_pi2c_board_info[] = { }, }; -static struct i2c_pxa_platform_data palm27x_i2c_power_info = { - .use_pio = 1, -}; - void __init palm27x_pmic_init(void) { i2c_register_board_info(1, ARRAY_AND_SIZE(palm27x_pi2c_board_info)); - pxa27x_set_i2c_power_info(&palm27x_i2c_power_info); + pxa27x_set_i2c_power_info(NULL); } #endif diff --git a/trunk/arch/arm/mach-pxa/vpac270.c b/trunk/arch/arm/mach-pxa/vpac270.c index 37d6173bbb66..c9b747cedea8 100644 --- a/trunk/arch/arm/mach-pxa/vpac270.c +++ b/trunk/arch/arm/mach-pxa/vpac270.c @@ -240,7 +240,6 @@ static void __init vpac270_onenand_init(void) {} #if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE) static struct pxamci_platform_data vpac270_mci_platform_data = { .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, - .gpio_power = -1, .gpio_card_detect = GPIO53_VPAC270_SD_DETECT_N, .gpio_card_ro = GPIO52_VPAC270_SD_READONLY, .detect_delay_ms = 200, diff --git a/trunk/arch/arm/mach-realview/core.c b/trunk/arch/arm/mach-realview/core.c index 07c08151dfe6..2fa38df28414 100644 --- a/trunk/arch/arm/mach-realview/core.c +++ b/trunk/arch/arm/mach-realview/core.c @@ -259,7 +259,6 @@ struct mmci_platform_data realview_mmc0_plat_data = { .status = realview_mmc_status, .gpio_wp = 17, .gpio_cd = 16, - .cd_invert = true, }; struct mmci_platform_data realview_mmc1_plat_data = { @@ -267,7 +266,6 @@ struct mmci_platform_data realview_mmc1_plat_data = { .status = realview_mmc_status, .gpio_wp = 19, .gpio_cd = 18, - .cd_invert = true, }; /* diff --git a/trunk/arch/arm/mach-realview/include/mach/smp.h b/trunk/arch/arm/mach-realview/include/mach/smp.h index d3cd265cb058..dd53892d44a7 100644 --- a/trunk/arch/arm/mach-realview/include/mach/smp.h +++ b/trunk/arch/arm/mach-realview/include/mach/smp.h @@ -1,8 +1,16 @@ #ifndef ASMARM_ARCH_SMP_H #define ASMARM_ARCH_SMP_H + #include -#include + +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) /* * We use IRQ1 as the IPI diff --git a/trunk/arch/arm/mach-s3c64xx/dev-spi.c b/trunk/arch/arm/mach-s3c64xx/dev-spi.c index 405e62128917..a492b982aa06 100644 --- a/trunk/arch/arm/mach-s3c64xx/dev-spi.c +++ b/trunk/arch/arm/mach-s3c64xx/dev-spi.c @@ -18,11 +18,10 @@ #include #include #include -#include #include #include -#include +#include static char *spi_src_clks[] = { [S3C64XX_SPI_SRCCLK_PCLK] = "pclk", diff --git a/trunk/arch/arm/mach-s3c64xx/mach-real6410.c b/trunk/arch/arm/mach-s3c64xx/mach-real6410.c index e130379ba0e8..5c07d013b23d 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-real6410.c @@ -30,73 +30,73 @@ #include #include -#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) -#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) -#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { [0] = { - .hwport = 0, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, + .hwport = 0, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, }, [1] = { - .hwport = 1, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, + .hwport = 1, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, }, [2] = { - .hwport = 2, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, + .hwport = 2, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, }, [3] = { - .hwport = 3, - .flags = 0, - .ucon = UCON, - .ulcon = ULCON, - .ufcon = UFCON, + .hwport = 3, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, }, }; /* DM9000AEP 10/100 ethernet controller */ static struct resource real6410_dm9k_resource[] = { - [0] = { - .start = S3C64XX_PA_XM0CSN1, - .end = S3C64XX_PA_XM0CSN1 + 1, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = S3C64XX_PA_XM0CSN1 + 4, - .end = S3C64XX_PA_XM0CSN1 + 5, - .flags = IORESOURCE_MEM - }, - [2] = { - .start = S3C_EINT(7), - .end = S3C_EINT(7), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL - } + [0] = { + .start = S3C64XX_PA_XM0CSN1, + .end = S3C64XX_PA_XM0CSN1 + 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = S3C64XX_PA_XM0CSN1 + 4, + .end = S3C64XX_PA_XM0CSN1 + 5, + .flags = IORESOURCE_MEM + }, + [2] = { + .start = S3C_EINT(7), + .end = S3C_EINT(7), + .flags = IORESOURCE_IRQ, + } }; static struct dm9000_plat_data real6410_dm9k_pdata = { - .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), + .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), }; static struct platform_device real6410_device_eth = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(real6410_dm9k_resource), - .resource = real6410_dm9k_resource, - .dev = { - .platform_data = &real6410_dm9k_pdata, - }, + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(real6410_dm9k_resource), + .resource = real6410_dm9k_resource, + .dev = { + .platform_data = &real6410_dm9k_pdata, + }, }; static struct platform_device *real6410_devices[] __initdata = { @@ -129,12 +129,12 @@ static void __init real6410_machine_init(void) /* set timing for nCS1 suitable for ethernet chip */ __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | - (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | - (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | - (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | - (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | - (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); + (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | + (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | + (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | + (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); } diff --git a/trunk/arch/arm/mach-s3c64xx/mach-smartq.c b/trunk/arch/arm/mach-s3c64xx/mach-smartq.c index cb1ebeb08763..3a9639bc3d9b 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-smartq.c @@ -136,7 +136,7 @@ static struct platform_device smartq_usb_otg_vbus_dev = { .dev.platform_data = &smartq_usb_otg_vbus_pdata, }; -static int smartq_bl_init(struct device *dev) +static int __init smartq_bl_init(struct device *dev) { s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2)); diff --git a/trunk/arch/arm/mach-s3c64xx/mach-smartq5.c b/trunk/arch/arm/mach-s3c64xx/mach-smartq5.c index 235e43928cb8..a4d59b076e3d 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -32,7 +32,7 @@ #include "mach-smartq.h" -static struct gpio_led smartq5_leds[] = { +static struct gpio_led smartq5_leds[] __initdata = { { .name = "smartq5:green", .active_low = 1, diff --git a/trunk/arch/arm/mach-s3c64xx/mach-smartq7.c b/trunk/arch/arm/mach-s3c64xx/mach-smartq7.c index 78a58c351f0a..e50a7d781732 100644 --- a/trunk/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/trunk/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -32,7 +32,7 @@ #include "mach-smartq.h" -static struct gpio_led smartq7_leds[] = { +static struct gpio_led smartq7_leds[] __initdata = { { .name = "smartq7:red", .active_low = 1, diff --git a/trunk/arch/arm/mach-s5pv210/clock.c b/trunk/arch/arm/mach-s5pv210/clock.c index cfecd70657cb..af91fefef2c6 100644 --- a/trunk/arch/arm/mach-s5pv210/clock.c +++ b/trunk/arch/arm/mach-s5pv210/clock.c @@ -280,24 +280,6 @@ static struct clk init_clocks_disable[] = { .parent = &clk_hclk_dsys.clk, .enable = s5pv210_clk_ip0_ctrl, .ctrlbit = (1<<29), - }, { - .name = "fimc", - .id = 0, - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 24), - }, { - .name = "fimc", - .id = 1, - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "fimc", - .id = 2, - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 26), }, { .name = "otg", .id = -1, @@ -375,7 +357,7 @@ static struct clk init_clocks_disable[] = { .id = 1, .parent = &clk_pclk_psys.clk, .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 10), + .ctrlbit = (1<<8), }, { .name = "i2c", .id = 2, diff --git a/trunk/arch/arm/mach-s5pv210/cpu.c b/trunk/arch/arm/mach-s5pv210/cpu.c index 77f456c91ad3..b9f4d677cf55 100644 --- a/trunk/arch/arm/mach-s5pv210/cpu.c +++ b/trunk/arch/arm/mach-s5pv210/cpu.c @@ -47,7 +47,7 @@ static struct map_desc s5pv210_iodesc[] __initdata = { { .virtual = (unsigned long)S5P_VA_SYSTIMER, .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), - .length = SZ_4K, + .length = SZ_1M, .type = MT_DEVICE, }, { .virtual = (unsigned long)VA_VIC2, diff --git a/trunk/arch/arm/mach-s5pv310/include/mach/smp.h b/trunk/arch/arm/mach-s5pv310/include/mach/smp.h index b7ec252384f4..990f3ba88a1f 100644 --- a/trunk/arch/arm/mach-s5pv310/include/mach/smp.h +++ b/trunk/arch/arm/mach-s5pv310/include/mach/smp.h @@ -7,10 +7,17 @@ #define ASM_ARCH_SMP_H __FILE__ #include -#include extern void __iomem *gic_cpu_base_addr; +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x03; \ + }) + /* * We use IRQ1 as the IPI */ diff --git a/trunk/arch/arm/mach-tcc8k/Kconfig b/trunk/arch/arm/mach-tcc8k/Kconfig new file mode 100644 index 000000000000..ec7f71b17c06 --- /dev/null +++ b/trunk/arch/arm/mach-tcc8k/Kconfig @@ -0,0 +1,5 @@ +if ARCH_TCC8K + +comment "TCC8000 systems:" + +endif diff --git a/trunk/arch/arm/mach-tegra/include/mach/smp.h b/trunk/arch/arm/mach-tegra/include/mach/smp.h index e4a34a35a544..8b42dab79a70 100644 --- a/trunk/arch/arm/mach-tegra/include/mach/smp.h +++ b/trunk/arch/arm/mach-tegra/include/mach/smp.h @@ -1,8 +1,16 @@ #ifndef ASMARM_ARCH_SMP_H #define ASMARM_ARCH_SMP_H + #include -#include + +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) /* * We use IRQ1 as the IPI diff --git a/trunk/arch/arm/mach-u300/include/mach/gpio.h b/trunk/arch/arm/mach-u300/include/mach/gpio.h index d5a71abcbaea..7b1fc984abb6 100644 --- a/trunk/arch/arm/mach-u300/include/mach/gpio.h +++ b/trunk/arch/arm/mach-u300/include/mach/gpio.h @@ -273,9 +273,6 @@ extern void gpio_pullup(unsigned gpio, int value); extern int gpio_get_value(unsigned gpio); extern void gpio_set_value(unsigned gpio, int value); -#define gpio_get_value_cansleep gpio_get_value -#define gpio_set_value_cansleep gpio_set_value - /* wrappers to sleep-enable the previous two functions */ static inline unsigned gpio_to_irq(unsigned gpio) { diff --git a/trunk/arch/arm/mach-ux500/Kconfig b/trunk/arch/arm/mach-ux500/Kconfig index 2dd44a0b4615..6625e5bbf4d6 100644 --- a/trunk/arch/arm/mach-ux500/Kconfig +++ b/trunk/arch/arm/mach-ux500/Kconfig @@ -21,7 +21,9 @@ config MACH_U8500_MOP bool "U8500 Development platform" select UX500_SOC_DB8500 help - Include support for the mop500 development platform. + Include support for mop500 development platform + based on U8500 architecture. The platform is based + on early drop silicon version of 8500. config MACH_U5500 bool "U5500 Development platform" @@ -37,18 +39,4 @@ config UX500_DEBUG_UART Choose the UART on which kernel low-level debug messages should be output. -config U5500_MODEM_IRQ - bool "Modem IRQ support" - depends on MACH_U5500 - default y - help - Add support for handling IRQ:s from modem side - -config U5500_MBOX - bool "Mailbox support" - depends on MACH_U5500 && U5500_MODEM_IRQ - default y - help - Add support for U5500 mailbox communication with modem side - endif diff --git a/trunk/arch/arm/mach-ux500/Makefile b/trunk/arch/arm/mach-ux500/Makefile index 9e27a84433cb..4556aea9c3c5 100644 --- a/trunk/arch/arm/mach-ux500/Makefile +++ b/trunk/arch/arm/mach-ux500/Makefile @@ -4,12 +4,8 @@ obj-y := clock.o cpu.o devices.o obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o devices-db5500.o -obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o prcmu.o -obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o board-mop500-sdi.o +obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o +obj-$(CONFIG_MACH_U8500_MOP) += board-mop500.o obj-$(CONFIG_MACH_U5500) += board-u5500.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o -obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o -obj-$(CONFIG_REGULATOR_AB8500) += board-mop500-regulators.o -obj-$(CONFIG_U5500_MODEM_IRQ) += modem_irq.o -obj-$(CONFIG_U5500_MBOX) += mbox.o diff --git a/trunk/arch/arm/mach-ux500/board-mop500-regulators.c b/trunk/arch/arm/mach-ux500/board-mop500-regulators.c deleted file mode 100644 index 1187f1fc2e53..000000000000 --- a/trunk/arch/arm/mach-ux500/board-mop500-regulators.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * - * Author: Sundar Iyer - * - * MOP500 board specific initialization for regulators - */ -#include -#include - -/* supplies to the display/camera */ -static struct regulator_init_data ab8500_vaux1_regulator = { - .constraints = { - .name = "V-DISPLAY", - .min_uV = 2500000, - .max_uV = 2900000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE| - REGULATOR_CHANGE_STATUS, - }, -}; - -/* supplies to the on-board eMMC */ -static struct regulator_init_data ab8500_vaux2_regulator = { - .constraints = { - .name = "V-eMMC1", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE| - REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for VAUX3, supplies to SDcard slots */ -static struct regulator_init_data ab8500_vaux3_regulator = { - .constraints = { - .name = "V-MMC-SD", - .min_uV = 1100000, - .max_uV = 3300000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE| - REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for tvout, gpadc, TVOUT LDO */ -static struct regulator_init_data ab8500_vtvout_init = { - .constraints = { - .name = "V-TVOUT", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for ab8500-vaudio, VAUDIO LDO */ -static struct regulator_init_data ab8500_vaudio_init = { - .constraints = { - .name = "V-AUD", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for v-anamic1 VAMic1-LDO */ -static struct regulator_init_data ab8500_vamic1_init = { - .constraints = { - .name = "V-AMIC1", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ -static struct regulator_init_data ab8500_vamic2_init = { - .constraints = { - .name = "V-AMIC2", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for v-dmic, VDMIC LDO */ -static struct regulator_init_data ab8500_vdmic_init = { - .constraints = { - .name = "V-DMIC", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for v-intcore12, VINTCORE12 LDO */ -static struct regulator_init_data ab8500_vintcore_init = { - .constraints = { - .name = "V-INTCORE", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - -/* supply for U8500 CSI/DSI, VANA LDO */ -static struct regulator_init_data ab8500_vana_init = { - .constraints = { - .name = "V-CSI/DSI", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, -}; - diff --git a/trunk/arch/arm/mach-ux500/board-mop500-sdi.c b/trunk/arch/arm/mach-ux500/board-mop500-sdi.c deleted file mode 100644 index bac995665b58..000000000000 --- a/trunk/arch/arm/mach-ux500/board-mop500-sdi.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Hanumath Prasad - * License terms: GNU General Public License (GPL) version 2 - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "pins-db8500.h" -#include "board-mop500.h" - -static pin_cfg_t mop500_sdi_pins[] = { - /* SDI4 (on-board eMMC) */ - GPIO197_MC4_DAT3, - GPIO198_MC4_DAT2, - GPIO199_MC4_DAT1, - GPIO200_MC4_DAT0, - GPIO201_MC4_CMD, - GPIO202_MC4_FBCLK, - GPIO203_MC4_CLK, - GPIO204_MC4_DAT7, - GPIO205_MC4_DAT6, - GPIO206_MC4_DAT5, - GPIO207_MC4_DAT4, -}; - -static pin_cfg_t mop500_sdi2_pins[] = { - /* SDI2 (POP eMMC) */ - GPIO128_MC2_CLK, - GPIO129_MC2_CMD, - GPIO130_MC2_FBCLK, - GPIO131_MC2_DAT0, - GPIO132_MC2_DAT1, - GPIO133_MC2_DAT2, - GPIO134_MC2_DAT3, - GPIO135_MC2_DAT4, - GPIO136_MC2_DAT5, - GPIO137_MC2_DAT6, - GPIO138_MC2_DAT7, -}; - -/* - * SDI 2 (POP eMMC, not on DB8500ed) - */ - -static struct mmci_platform_data mop500_sdi2_data = { - .ocr_mask = MMC_VDD_165_195, - .f_max = 100000000, - .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_cd = -1, - .gpio_wp = -1, -}; - -/* - * SDI 4 (on-board eMMC) - */ - -static struct mmci_platform_data mop500_sdi4_data = { - .ocr_mask = MMC_VDD_29_30, - .f_max = 100000000, - .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED, - .gpio_cd = -1, - .gpio_wp = -1, -}; - -void mop500_sdi_init(void) -{ - nmk_config_pins(mop500_sdi_pins, ARRAY_SIZE(mop500_sdi_pins)); - - u8500_sdi2_device.dev.platform_data = &mop500_sdi2_data; - u8500_sdi4_device.dev.platform_data = &mop500_sdi4_data; - - if (!cpu_is_u8500ed()) { - nmk_config_pins(mop500_sdi2_pins, ARRAY_SIZE(mop500_sdi2_pins)); - amba_device_register(&u8500_sdi2_device, &iomem_resource); - } - - /* On-board eMMC */ - amba_device_register(&u8500_sdi4_device, &iomem_resource); -} diff --git a/trunk/arch/arm/mach-ux500/board-mop500.c b/trunk/arch/arm/mach-ux500/board-mop500.c index 642b8e60d119..0e8fd135a57d 100644 --- a/trunk/arch/arm/mach-ux500/board-mop500.c +++ b/trunk/arch/arm/mach-ux500/board-mop500.c @@ -28,10 +28,8 @@ #include #include #include -#include #include "pins-db8500.h" -#include "board-mop500.h" static pin_cfg_t mop500_pins[] = { /* SSP0 */ @@ -77,27 +75,9 @@ static struct ab8500_platform_data ab8500_platdata = { .irq_base = MOP500_AB8500_IRQ_BASE, }; -static struct resource ab8500_resources[] = { - [0] = { - .start = IRQ_AB8500, - .end = IRQ_AB8500, - .flags = IORESOURCE_IRQ - } -}; - -struct platform_device ab8500_device = { - .name = "ab8500-i2c", - .id = 0, - .dev = { - .platform_data = &ab8500_platdata, - }, - .num_resources = 1, - .resource = ab8500_resources, -}; - -static struct spi_board_info ab8500_spi_devices[] = { +static struct spi_board_info u8500_spi_devices[] = { { - .modalias = "ab8500-spi", + .modalias = "ab8500", .controller_data = &ab4500_chip_info, .platform_data = &ab8500_platdata, .max_speed_hz = 12000000, @@ -183,14 +163,8 @@ static void __init u8500_init_machine(void) platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); - mop500_sdi_init(); - - /* If HW is early drop (ED) or V1.0 then use SPI to access AB8500 */ - if (cpu_is_u8500ed() || cpu_is_u8500v10()) - spi_register_board_info(ab8500_spi_devices, - ARRAY_SIZE(ab8500_spi_devices)); - else /* If HW is v.1.1 or later use I2C to access AB8500 */ - platform_device_register(&ab8500_device); + spi_register_board_info(u8500_spi_devices, + ARRAY_SIZE(u8500_spi_devices)); } MACHINE_START(U8500, "ST-Ericsson MOP500 platform") diff --git a/trunk/arch/arm/mach-ux500/board-mop500.h b/trunk/arch/arm/mach-ux500/board-mop500.h deleted file mode 100644 index 2d240322fa6f..000000000000 --- a/trunk/arch/arm/mach-ux500/board-mop500.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License (GPL) version 2 - */ - -#ifndef __BOARD_MOP500_H -#define __BOARD_MOP500_H - -extern void mop500_sdi_init(void); - -#endif diff --git a/trunk/arch/arm/mach-ux500/cpu-db5500.c b/trunk/arch/arm/mach-ux500/cpu-db5500.c index 2f87075e9d6f..e9278f6d67aa 100644 --- a/trunk/arch/arm/mach-ux500/cpu-db5500.c +++ b/trunk/arch/arm/mach-ux500/cpu-db5500.c @@ -14,7 +14,6 @@ #include #include #include -#include static struct map_desc u5500_io_desc[] __initdata = { __IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K), @@ -25,90 +24,6 @@ static struct map_desc u5500_io_desc[] __initdata = { __IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K), }; -static struct resource mbox0_resources[] = { - { - .name = "mbox_peer", - .start = U5500_MBOX0_PEER_START, - .end = U5500_MBOX0_PEER_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_local", - .start = U5500_MBOX0_LOCAL_START, - .end = U5500_MBOX0_LOCAL_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_irq", - .start = MBOX_PAIR0_VIRT_IRQ, - .end = MBOX_PAIR0_VIRT_IRQ, - .flags = IORESOURCE_IRQ, - } -}; - -static struct resource mbox1_resources[] = { - { - .name = "mbox_peer", - .start = U5500_MBOX1_PEER_START, - .end = U5500_MBOX1_PEER_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_local", - .start = U5500_MBOX1_LOCAL_START, - .end = U5500_MBOX1_LOCAL_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_irq", - .start = MBOX_PAIR1_VIRT_IRQ, - .end = MBOX_PAIR1_VIRT_IRQ, - .flags = IORESOURCE_IRQ, - } -}; - -static struct resource mbox2_resources[] = { - { - .name = "mbox_peer", - .start = U5500_MBOX2_PEER_START, - .end = U5500_MBOX2_PEER_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_local", - .start = U5500_MBOX2_LOCAL_START, - .end = U5500_MBOX2_LOCAL_END, - .flags = IORESOURCE_MEM, - }, - { - .name = "mbox_irq", - .start = MBOX_PAIR2_VIRT_IRQ, - .end = MBOX_PAIR2_VIRT_IRQ, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device mbox0_device = { - .id = 0, - .name = "mbox", - .resource = mbox0_resources, - .num_resources = ARRAY_SIZE(mbox0_resources), -}; - -static struct platform_device mbox1_device = { - .id = 1, - .name = "mbox", - .resource = mbox1_resources, - .num_resources = ARRAY_SIZE(mbox1_resources), -}; - -static struct platform_device mbox2_device = { - .id = 2, - .name = "mbox", - .resource = mbox2_resources, - .num_resources = ARRAY_SIZE(mbox2_resources), -}; - static struct platform_device *u5500_platform_devs[] __initdata = { &u5500_gpio_devs[0], &u5500_gpio_devs[1], @@ -118,9 +33,6 @@ static struct platform_device *u5500_platform_devs[] __initdata = { &u5500_gpio_devs[5], &u5500_gpio_devs[6], &u5500_gpio_devs[7], - &mbox0_device, - &mbox1_device, - &mbox2_device, }; void __init u5500_map_io(void) diff --git a/trunk/arch/arm/mach-ux500/cpu-db8500.c b/trunk/arch/arm/mach-ux500/cpu-db8500.c index 4acab7544b3c..f21c444edd99 100644 --- a/trunk/arch/arm/mach-ux500/cpu-db8500.c +++ b/trunk/arch/arm/mach-ux500/cpu-db8500.c @@ -38,12 +38,10 @@ static struct platform_device *platform_devs[] __initdata = { /* minimum static i/o mapping required to boot U8500 platforms */ static struct map_desc u8500_io_desc[] __initdata = { __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K), - __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K), __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K), __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K), __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K), __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K), - __MEM_DEV_DESC(U8500_BOOT_ROM_BASE, SZ_1M), }; static struct map_desc u8500ed_io_desc[] __initdata = { @@ -55,69 +53,6 @@ static struct map_desc u8500v1_io_desc[] __initdata = { __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K), }; -/* - * Functions to differentiate between later ASICs - * We look into the end of the ROM to locate the hardcoded ASIC ID. - * This is only needed to differentiate between minor revisions and - * process variants of an ASIC, the major revisions are encoded in - * the cpuid. - */ -#define U8500_ASIC_ID_LOC_ED_V1 (U8500_BOOT_ROM_BASE + 0x1FFF4) -#define U8500_ASIC_ID_LOC_V2 (U8500_BOOT_ROM_BASE + 0x1DBF4) -#define U8500_ASIC_REV_ED 0x01 -#define U8500_ASIC_REV_V10 0xA0 -#define U8500_ASIC_REV_V11 0xA1 -#define U8500_ASIC_REV_V20 0xB0 - -/** - * struct db8500_asic_id - fields of the ASIC ID - * @process: the manufacturing process, 0x40 is 40 nm - * 0x00 is "standard" - * @partnumber: hithereto 0x8500 for DB8500 - * @revision: version code in the series - * This field definion is not formally defined but makes - * sense. - */ -struct db8500_asic_id { - u8 process; - u16 partnumber; - u8 revision; -}; - -/* This isn't going to change at runtime */ -static struct db8500_asic_id db8500_id; - -static void __init get_db8500_asic_id(void) -{ - u32 asicid; - - if (cpu_is_u8500v1() || cpu_is_u8500ed()) - asicid = readl(__io_address(U8500_ASIC_ID_LOC_ED_V1)); - else if (cpu_is_u8500v2()) - asicid = readl(__io_address(U8500_ASIC_ID_LOC_V2)); - else - BUG(); - - db8500_id.process = (asicid >> 24); - db8500_id.partnumber = (asicid >> 16) & 0xFFFFU; - db8500_id.revision = asicid & 0xFFU; -} - -bool cpu_is_u8500v10(void) -{ - return (db8500_id.revision == U8500_ASIC_REV_V10); -} - -bool cpu_is_u8500v11(void) -{ - return (db8500_id.revision == U8500_ASIC_REV_V11); -} - -bool cpu_is_u8500v20(void) -{ - return (db8500_id.revision == U8500_ASIC_REV_V20); -} - void __init u8500_map_io(void) { ux500_map_io(); @@ -128,9 +63,6 @@ void __init u8500_map_io(void) iotable_init(u8500ed_io_desc, ARRAY_SIZE(u8500ed_io_desc)); else iotable_init(u8500v1_io_desc, ARRAY_SIZE(u8500v1_io_desc)); - - /* Read out the ASIC ID as early as we can */ - get_db8500_asic_id(); } /* @@ -138,20 +70,6 @@ void __init u8500_map_io(void) */ void __init u8500_init_devices(void) { - /* Display some ASIC boilerplate */ - pr_info("DB8500: process: %02x, revision ID: 0x%02x\n", - db8500_id.process, db8500_id.revision); - if (cpu_is_u8500ed()) - pr_info("DB8500: Early Drop (ED)\n"); - else if (cpu_is_u8500v10()) - pr_info("DB8500: version 1.0\n"); - else if (cpu_is_u8500v11()) - pr_info("DB8500: version 1.1\n"); - else if (cpu_is_u8500v20()) - pr_info("DB8500: version 2.0\n"); - else - pr_warning("ASIC: UNKNOWN SILICON VERSION!\n"); - ux500_init_devices(); if (cpu_is_u8500ed()) diff --git a/trunk/arch/arm/mach-ux500/devices-db8500.c b/trunk/arch/arm/mach-ux500/devices-db8500.c index 40032fecbc16..9280d2561111 100644 --- a/trunk/arch/arm/mach-ux500/devices-db8500.c +++ b/trunk/arch/arm/mach-ux500/devices-db8500.c @@ -110,82 +110,6 @@ struct platform_device u8500_i2c4_device = { .num_resources = ARRAY_SIZE(u8500_i2c4_resources), }; -/* - * SD/MMC - */ - -struct amba_device u8500_sdi0_device = { - .dev = { - .init_name = "sdi0", - }, - .res = { - .start = U8500_SDI0_BASE, - .end = U8500_SDI0_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC0, NO_IRQ}, -}; - -struct amba_device u8500_sdi1_device = { - .dev = { - .init_name = "sdi1", - }, - .res = { - .start = U8500_SDI1_BASE, - .end = U8500_SDI1_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC1, NO_IRQ}, -}; - -struct amba_device u8500_sdi2_device = { - .dev = { - .init_name = "sdi2", - }, - .res = { - .start = U8500_SDI2_BASE, - .end = U8500_SDI2_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC2, NO_IRQ}, -}; - -struct amba_device u8500_sdi3_device = { - .dev = { - .init_name = "sdi3", - }, - .res = { - .start = U8500_SDI3_BASE, - .end = U8500_SDI3_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC3, NO_IRQ}, -}; - -struct amba_device u8500_sdi4_device = { - .dev = { - .init_name = "sdi4", - }, - .res = { - .start = U8500_SDI4_BASE, - .end = U8500_SDI4_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC4, NO_IRQ}, -}; - -struct amba_device u8500_sdi5_device = { - .dev = { - .init_name = "sdi5", - }, - .res = { - .start = U8500_SDI5_BASE, - .end = U8500_SDI5_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - .irq = {IRQ_DB8500_SDMMC5, NO_IRQ}, -}; - static struct resource dma40_resources[] = { [0] = { .start = U8500_DMA_BASE, @@ -246,23 +170,23 @@ struct stedma40_chan_cfg dma40_memcpy_conf_log = { * Mapping between destination event lines and physical device address. * The event line is tied to a device and therefor the address is constant. */ -static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV]; +static const dma_addr_t dma40_tx_map[STEDMA40_NR_DEV]; /* Mapping between source event lines and physical device address */ -static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV]; +static const dma_addr_t dma40_rx_map[STEDMA40_NR_DEV]; /* Reserved event lines for memcpy only */ static int dma40_memcpy_event[] = { - DB8500_DMA_MEMCPY_TX_0, - DB8500_DMA_MEMCPY_TX_1, - DB8500_DMA_MEMCPY_TX_2, - DB8500_DMA_MEMCPY_TX_3, - DB8500_DMA_MEMCPY_TX_4, - DB8500_DMA_MEMCPY_TX_5, + STEDMA40_MEMCPY_TX_0, + STEDMA40_MEMCPY_TX_1, + STEDMA40_MEMCPY_TX_2, + STEDMA40_MEMCPY_TX_3, + STEDMA40_MEMCPY_TX_4, + STEDMA40_MEMCPY_TX_5, }; static struct stedma40_platform_data dma40_plat_data = { - .dev_len = DB8500_DMA_NR_DEV, + .dev_len = STEDMA40_NR_DEV, .dev_rx = dma40_rx_map, .dev_tx = dma40_tx_map, .memcpy = dma40_memcpy_event, diff --git a/trunk/arch/arm/mach-ux500/hotplug.c b/trunk/arch/arm/mach-ux500/hotplug.c deleted file mode 100644 index b782a03024be..000000000000 --- a/trunk/arch/arm/mach-ux500/hotplug.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * Based on ARM realview platform - * - * Author: Sundar Iyer - * - */ -#include -#include -#include -#include - -#include - -extern volatile int pen_release; - -static DECLARE_COMPLETION(cpu_killed); - -static inline void platform_do_lowpower(unsigned int cpu) -{ - flush_cache_all(); - - /* we put the platform to just WFI */ - for (;;) { - __asm__ __volatile__("dsb\n\t" "wfi\n\t" - : : : "memory"); - if (pen_release == cpu) { - /* - * OK, proper wakeup, we're done - */ - break; - } - } -} - -int platform_cpu_kill(unsigned int cpu) -{ - return wait_for_completion_timeout(&cpu_killed, 5000); -} - -/* - * platform-specific code to shutdown a CPU - * - * Called with IRQs disabled - */ -void platform_cpu_die(unsigned int cpu) -{ -#ifdef DEBUG - unsigned int this_cpu = hard_smp_processor_id(); - - if (cpu != this_cpu) { - printk(KERN_CRIT "Eek! platform_cpu_die running on %u, should be %u\n", - this_cpu, cpu); - BUG(); - } -#endif - - printk(KERN_NOTICE "CPU%u: shutdown\n", cpu); - complete(&cpu_killed); - - /* directly enter low power state, skipping secure registers */ - platform_do_lowpower(cpu); -} - -int platform_cpu_disable(unsigned int cpu) -{ - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} diff --git a/trunk/arch/arm/mach-ux500/include/mach/db5500-regs.h b/trunk/arch/arm/mach-ux500/include/mach/db5500-regs.h index 3eafc0e24ba5..545c80fc8024 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/db5500-regs.h +++ b/trunk/arch/arm/mach-ux500/include/mach/db5500-regs.h @@ -100,18 +100,4 @@ #define U5500_GPIOBANK6_BASE (U5500_GPIO4_BASE + 0x80) #define U5500_GPIOBANK7_BASE (U5500_GPIO4_BASE + 0x100) -#define U5500_MBOX_BASE (U5500_MODEM_BASE + 0xFFD1000) -#define U5500_MBOX0_PEER_START (U5500_MBOX_BASE + 0x40) -#define U5500_MBOX0_PEER_END (U5500_MBOX_BASE + 0x5F) -#define U5500_MBOX0_LOCAL_START (U5500_MBOX_BASE + 0x60) -#define U5500_MBOX0_LOCAL_END (U5500_MBOX_BASE + 0x7F) -#define U5500_MBOX1_PEER_START (U5500_MBOX_BASE + 0x80) -#define U5500_MBOX1_PEER_END (U5500_MBOX_BASE + 0x9F) -#define U5500_MBOX1_LOCAL_START (U5500_MBOX_BASE + 0xA0) -#define U5500_MBOX1_LOCAL_END (U5500_MBOX_BASE + 0xBF) -#define U5500_MBOX2_PEER_START (U5500_MBOX_BASE + 0x00) -#define U5500_MBOX2_PEER_END (U5500_MBOX_BASE + 0x1F) -#define U5500_MBOX2_LOCAL_START (U5500_MBOX_BASE + 0x20) -#define U5500_MBOX2_LOCAL_END (U5500_MBOX_BASE + 0x3F) - #endif diff --git a/trunk/arch/arm/mach-ux500/include/mach/db8500-regs.h b/trunk/arch/arm/mach-ux500/include/mach/db8500-regs.h index f07d0986409d..f000218210c9 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/db8500-regs.h +++ b/trunk/arch/arm/mach-ux500/include/mach/db8500-regs.h @@ -30,6 +30,8 @@ #define U8500_ICN_BASE 0x81000000 #define U8500_BOOT_ROM_BASE 0x90000000 +/* ASIC ID is at 0xff4 offset within this region */ +#define U8500_ASIC_ID_BASE 0x9001F000 #define U8500_PER6_BASE 0xa03c0000 #define U8500_PER5_BASE 0xa03e0000 diff --git a/trunk/arch/arm/mach-ux500/include/mach/devices.h b/trunk/arch/arm/mach-ux500/include/mach/devices.h index 33a120c2e82e..c2b2f2574947 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/devices.h +++ b/trunk/arch/arm/mach-ux500/include/mach/devices.h @@ -27,13 +27,6 @@ extern struct platform_device u8500_i2c0_device; extern struct platform_device u8500_i2c4_device; extern struct platform_device u8500_dma40_device; -extern struct amba_device u8500_sdi0_device; -extern struct amba_device u8500_sdi1_device; -extern struct amba_device u8500_sdi2_device; -extern struct amba_device u8500_sdi3_device; -extern struct amba_device u8500_sdi4_device; -extern struct amba_device u8500_sdi5_device; - void dma40_u8500ed_fixup(void); #endif diff --git a/trunk/arch/arm/mach-ux500/include/mach/hardware.h b/trunk/arch/arm/mach-ux500/include/mach/hardware.h index 32e883a8f2a2..8656379a8309 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/hardware.h +++ b/trunk/arch/arm/mach-ux500/include/mach/hardware.h @@ -104,35 +104,16 @@ static inline bool cpu_is_u8500(void) #endif } -#define CPUID_DB8500ED 0x410fc090 -#define CPUID_DB8500V1 0x411fc091 -#define CPUID_DB8500V2 0x412fc091 - static inline bool cpu_is_u8500ed(void) { - return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500ED); + return cpu_is_u8500() && (read_cpuid_id() & 15) == 0; } static inline bool cpu_is_u8500v1(void) { - return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500V1); -} - -static inline bool cpu_is_u8500v2(void) -{ - return cpu_is_u8500() && (read_cpuid_id() == CPUID_DB8500V2); + return cpu_is_u8500() && (read_cpuid_id() & 15) == 1; } -#ifdef CONFIG_UX500_SOC_DB8500 -bool cpu_is_u8500v10(void); -bool cpu_is_u8500v11(void); -bool cpu_is_u8500v20(void); -#else -static inline bool cpu_is_u8500v10(void) { return false; } -static inline bool cpu_is_u8500v11(void) { return false; } -static inline bool cpu_is_u8500v20(void) { return false; } -#endif - static inline bool cpu_is_u5500(void) { #ifdef CONFIG_UX500_SOC_DB5500 diff --git a/trunk/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/trunk/arch/arm/mach-ux500/include/mach/irqs-db5500.h index bfa123dbec3b..6fbfe5e2065a 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/irqs-db5500.h +++ b/trunk/arch/arm/mach-ux500/include/mach/irqs-db5500.h @@ -61,7 +61,6 @@ #define IRQ_DB5500_SDMMC0 (IRQ_SHPI_START + 60) #define IRQ_DB5500_HSEM (IRQ_SHPI_START + 61) #define IRQ_DB5500_SBAG (IRQ_SHPI_START + 63) -#define IRQ_DB5500_MODEM (IRQ_SHPI_START + 65) #define IRQ_DB5500_SPI1 (IRQ_SHPI_START + 96) #define IRQ_DB5500_MSP2 (IRQ_SHPI_START + 98) #define IRQ_DB5500_SRPTIMER (IRQ_SHPI_START + 101) diff --git a/trunk/arch/arm/mach-ux500/include/mach/irqs.h b/trunk/arch/arm/mach-ux500/include/mach/irqs.h index 693aa57de88d..10385bdc2b77 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/irqs.h +++ b/trunk/arch/arm/mach-ux500/include/mach/irqs.h @@ -40,8 +40,7 @@ #define IRQ_HSIR_CH1_OVRRUN (IRQ_SHPI_START + 33) #define IRQ_HSIR_CH2_OVRRUN (IRQ_SHPI_START + 34) #define IRQ_HSIR_CH3_OVRRUN (IRQ_SHPI_START + 35) -#define IRQ_AB8500 (IRQ_SHPI_START + 40) -#define IRQ_PRCMU (IRQ_SHPI_START + 47) +#define IRQ_AB4500 (IRQ_SHPI_START + 40) #define IRQ_DISP (IRQ_SHPI_START + 48) #define IRQ_SiPI3 (IRQ_SHPI_START + 49) #define IRQ_I2C4 (IRQ_SHPI_START + 51) @@ -84,19 +83,6 @@ #include #endif -/* - * After the board specific IRQ:s we reserve a range of IRQ:s in which virtual - * IRQ:s representing modem IRQ:s can be allocated - */ -#define IRQ_MODEM_EVENTS_BASE (IRQ_BOARD_END + 1) -#define IRQ_MODEM_EVENTS_NBR 72 -#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR) - -/* List of virtual IRQ:s that are allocated from the range above */ -#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43) -#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45) -#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41) - -#define NR_IRQS IRQ_MODEM_EVENTS_END +#define NR_IRQS IRQ_BOARD_END #endif /* ASM_ARCH_IRQS_H */ diff --git a/trunk/arch/arm/mach-ux500/include/mach/mbox.h b/trunk/arch/arm/mach-ux500/include/mach/mbox.h deleted file mode 100644 index 7f9da4d2fbda..000000000000 --- a/trunk/arch/arm/mach-ux500/include/mach/mbox.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * Author: Stefan Nilsson for ST-Ericsson. - * Author: Martin Persson for ST-Ericsson. - * License terms: GNU General Public License (GPL), version 2. - */ - -#ifndef __INC_STE_MBOX_H -#define __INC_STE_MBOX_H - -#define MBOX_BUF_SIZE 16 -#define MBOX_NAME_SIZE 8 - -/** - * mbox_recv_cb_t - Definition of the mailbox callback. - * @mbox_msg: The mailbox message. - * @priv: The clients private data as specified in the call to mbox_setup. - * - * This function will be called upon reception of new mailbox messages. - */ -typedef void mbox_recv_cb_t (u32 mbox_msg, void *priv); - -/** - * struct mbox - Mailbox instance struct - * @list: Linked list head. - * @pdev: Pointer to device struct. - * @cb: Callback function. Will be called - * when new data is received. - * @client_data: Clients private data. Will be sent back - * in the callback function. - * @virtbase_peer: Virtual address for outgoing mailbox. - * @virtbase_local: Virtual address for incoming mailbox. - * @buffer: Then internal queue for outgoing messages. - * @name: Name of this mailbox. - * @buffer_available: Completion variable to achieve "blocking send". - * This variable will be signaled when there is - * internal buffer space available. - * @client_blocked: To keep track if any client is currently - * blocked. - * @lock: Spinlock to protect this mailbox instance. - * @write_index: Index in internal buffer to write to. - * @read_index: Index in internal buffer to read from. - * @allocated: Indicates whether this particular mailbox - * id has been allocated by someone. - */ -struct mbox { - struct list_head list; - struct platform_device *pdev; - mbox_recv_cb_t *cb; - void *client_data; - void __iomem *virtbase_peer; - void __iomem *virtbase_local; - u32 buffer[MBOX_BUF_SIZE]; - char name[MBOX_NAME_SIZE]; - struct completion buffer_available; - u8 client_blocked; - spinlock_t lock; - u8 write_index; - u8 read_index; - bool allocated; -}; - -/** - * mbox_setup - Set up a mailbox and return its instance. - * @mbox_id: The ID number of the mailbox. 0 or 1 for modem CPU, - * 2 for modem DSP. - * @mbox_cb: Pointer to the callback function to be called when a new message - * is received. - * @priv: Client user data which will be returned in the callback. - * - * Returns a mailbox instance to be specified in subsequent calls to mbox_send. - */ -struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv); - -/** - * mbox_send - Send a mailbox message. - * @mbox: Mailbox instance (returned by mbox_setup) - * @mbox_msg: The mailbox message to send. - * @block: Specifies whether this call will block until send is possible, - * or return an error if the mailbox buffer is full. - * - * Returns 0 on success or a negative error code on error. -ENOMEM indicates - * that the internal buffer is full and you have to try again later (or - * specify "block" in order to block until send is possible). - */ -int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block); - -#endif /*INC_STE_MBOX_H*/ diff --git a/trunk/arch/arm/mach-ux500/include/mach/prcmu-regs.h b/trunk/arch/arm/mach-ux500/include/mach/prcmu-regs.h deleted file mode 100644 index 8885f39a6421..000000000000 --- a/trunk/arch/arm/mach-ux500/include/mach/prcmu-regs.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (c) 2009 ST-Ericsson SA - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - */ -#ifndef __MACH_PRCMU_REGS_H -#define __MACH_PRCMU_REGS_H - -#include - -#define _PRCMU_BASE IO_ADDRESS(U8500_PRCMU_BASE) - -#define PRCM_ARM_PLLDIVPS (_PRCMU_BASE + 0x118) -#define PRCM_ARM_CHGCLKREQ (_PRCMU_BASE + 0x114) -#define PRCM_PLLARM_ENABLE (_PRCMU_BASE + 0x98) -#define PRCM_ARMCLKFIX_MGT (_PRCMU_BASE + 0x0) -#define PRCM_A9_RESETN_CLR (_PRCMU_BASE + 0x1f4) -#define PRCM_A9_RESETN_SET (_PRCMU_BASE + 0x1f0) -#define PRCM_ARM_LS_CLAMP (_PRCMU_BASE + 0x30c) -#define PRCM_SRAM_A9 (_PRCMU_BASE + 0x308) - -/* ARM WFI Standby signal register */ -#define PRCM_ARM_WFI_STANDBY (_PRCMU_BASE + 0x130) -#define PRCMU_IOCR (_PRCMU_BASE + 0x310) - -/* CPU mailbox registers */ -#define PRCM_MBOX_CPU_VAL (_PRCMU_BASE + 0x0fc) -#define PRCM_MBOX_CPU_SET (_PRCMU_BASE + 0x100) -#define PRCM_MBOX_CPU_CLR (_PRCMU_BASE + 0x104) - -/* Dual A9 core interrupt management unit registers */ -#define PRCM_A9_MASK_REQ (_PRCMU_BASE + 0x328) -#define PRCM_A9_MASK_ACK (_PRCMU_BASE + 0x32c) -#define PRCM_ARMITMSK31TO0 (_PRCMU_BASE + 0x11c) -#define PRCM_ARMITMSK63TO32 (_PRCMU_BASE + 0x120) -#define PRCM_ARMITMSK95TO64 (_PRCMU_BASE + 0x124) -#define PRCM_ARMITMSK127TO96 (_PRCMU_BASE + 0x128) -#define PRCM_POWER_STATE_VAL (_PRCMU_BASE + 0x25C) -#define PRCM_ARMITVAL31TO0 (_PRCMU_BASE + 0x260) -#define PRCM_ARMITVAL63TO32 (_PRCMU_BASE + 0x264) -#define PRCM_ARMITVAL95TO64 (_PRCMU_BASE + 0x268) -#define PRCM_ARMITVAL127TO96 (_PRCMU_BASE + 0x26C) - -#define PRCM_HOSTACCESS_REQ (_PRCMU_BASE + 0x334) -#define ARM_WAKEUP_MODEM 0x1 - -#define PRCM_ARM_IT1_CLEAR (_PRCMU_BASE + 0x48C) -#define PRCM_ARM_IT1_VAL (_PRCMU_BASE + 0x494) -#define PRCM_HOLD_EVT (_PRCMU_BASE + 0x174) - -#define PRCM_ITSTATUS0 (_PRCMU_BASE + 0x148) -#define PRCM_ITSTATUS1 (_PRCMU_BASE + 0x150) -#define PRCM_ITSTATUS2 (_PRCMU_BASE + 0x158) -#define PRCM_ITSTATUS3 (_PRCMU_BASE + 0x160) -#define PRCM_ITSTATUS4 (_PRCMU_BASE + 0x168) -#define PRCM_ITSTATUS5 (_PRCMU_BASE + 0x484) -#define PRCM_ITCLEAR5 (_PRCMU_BASE + 0x488) -#define PRCM_ARMIT_MASKXP70_IT (_PRCMU_BASE + 0x1018) - -/* System reset register */ -#define PRCM_APE_SOFTRST (_PRCMU_BASE + 0x228) - -/* Level shifter and clamp control registers */ -#define PRCM_MMIP_LS_CLAMP_SET (_PRCMU_BASE + 0x420) -#define PRCM_MMIP_LS_CLAMP_CLR (_PRCMU_BASE + 0x424) - -/* PRCMU clock/PLL/reset registers */ -#define PRCM_PLLDSI_FREQ (_PRCMU_BASE + 0x500) -#define PRCM_PLLDSI_ENABLE (_PRCMU_BASE + 0x504) -#define PRCM_LCDCLK_MGT (_PRCMU_BASE + 0x044) -#define PRCM_MCDECLK_MGT (_PRCMU_BASE + 0x064) -#define PRCM_HDMICLK_MGT (_PRCMU_BASE + 0x058) -#define PRCM_TVCLK_MGT (_PRCMU_BASE + 0x07c) -#define PRCM_DSI_PLLOUT_SEL (_PRCMU_BASE + 0x530) -#define PRCM_DSITVCLK_DIV (_PRCMU_BASE + 0x52C) -#define PRCM_APE_RESETN_SET (_PRCMU_BASE + 0x1E4) -#define PRCM_APE_RESETN_CLR (_PRCMU_BASE + 0x1E8) - -/* ePOD and memory power signal control registers */ -#define PRCM_EPOD_C_SET (_PRCMU_BASE + 0x410) -#define PRCM_SRAM_LS_SLEEP (_PRCMU_BASE + 0x304) - -/* Debug power control unit registers */ -#define PRCM_POWER_STATE_SET (_PRCMU_BASE + 0x254) - -/* Miscellaneous unit registers */ -#define PRCM_DSI_SW_RESET (_PRCMU_BASE + 0x324) - -#endif /* __MACH_PRCMU__REGS_H */ diff --git a/trunk/arch/arm/mach-ux500/include/mach/prcmu.h b/trunk/arch/arm/mach-ux500/include/mach/prcmu.h deleted file mode 100644 index 549843ff6dbe..000000000000 --- a/trunk/arch/arm/mach-ux500/include/mach/prcmu.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) STMicroelectronics 2009 - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * - * PRCMU f/w APIs - */ -#ifndef __MACH_PRCMU_H -#define __MACH_PRCMU_H - -int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); -int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); - -#endif /* __MACH_PRCMU_H */ diff --git a/trunk/arch/arm/mach-ux500/include/mach/setup.h b/trunk/arch/arm/mach-ux500/include/mach/setup.h index 54bbe648bf58..e978dbd9e210 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/setup.h +++ b/trunk/arch/arm/mach-ux500/include/mach/setup.h @@ -38,11 +38,4 @@ extern struct sys_timer ux500_timer; .type = MT_DEVICE, \ } -#define __MEM_DEV_DESC(x, sz) { \ - .virtual = IO_ADDRESS(x), \ - .pfn = __phys_to_pfn(x), \ - .length = sz, \ - .type = MT_MEMORY, \ -} - #endif /* __ASM_ARCH_SETUP_H */ diff --git a/trunk/arch/arm/mach-ux500/include/mach/smp.h b/trunk/arch/arm/mach-ux500/include/mach/smp.h index 197e8417375e..b59f7bc9725d 100644 --- a/trunk/arch/arm/mach-ux500/include/mach/smp.h +++ b/trunk/arch/arm/mach-ux500/include/mach/smp.h @@ -10,11 +10,18 @@ #define ASMARM_ARCH_SMP_H #include -#include /* This is required to wakeup the secondary core */ extern void u8500_secondary_startup(void); +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) + /* * We use IRQ1 as the IPI */ diff --git a/trunk/arch/arm/mach-ux500/mbox.c b/trunk/arch/arm/mach-ux500/mbox.c deleted file mode 100644 index 63435389c544..000000000000 --- a/trunk/arch/arm/mach-ux500/mbox.c +++ /dev/null @@ -1,567 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * Author: Stefan Nilsson for ST-Ericsson. - * Author: Martin Persson for ST-Ericsson. - * License terms: GNU General Public License (GPL), version 2. - */ - -/* - * Mailbox nomenclature: - * - * APE MODEM - * mbox pairX - * .......................... - * . . - * . peer . - * . send ---- . - * . --> | | . - * . | | . - * . ---- . - * . . - * . local . - * . rec ---- . - * . | | <-- . - * . | | . - * . ---- . - * ......................... - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MBOX_NAME "mbox" - -#define MBOX_FIFO_DATA 0x000 -#define MBOX_FIFO_ADD 0x004 -#define MBOX_FIFO_REMOVE 0x008 -#define MBOX_FIFO_THRES_FREE 0x00C -#define MBOX_FIFO_THRES_OCCUP 0x010 -#define MBOX_FIFO_STATUS 0x014 - -#define MBOX_DISABLE_IRQ 0x4 -#define MBOX_ENABLE_IRQ 0x0 -#define MBOX_LATCH 1 - -/* Global list of all mailboxes */ -static struct list_head mboxs = LIST_HEAD_INIT(mboxs); - -static struct mbox *get_mbox_with_id(u8 id) -{ - u8 i; - struct list_head *pos = &mboxs; - for (i = 0; i <= id; i++) - pos = pos->next; - - return (struct mbox *) list_entry(pos, struct mbox, list); -} - -int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block) -{ - int res = 0; - - spin_lock(&mbox->lock); - - dev_dbg(&(mbox->pdev->dev), - "About to buffer 0x%X to mailbox 0x%X." - " ri = %d, wi = %d\n", - mbox_msg, (u32)mbox, mbox->read_index, - mbox->write_index); - - /* Check if write buffer is full */ - while (((mbox->write_index + 1) % MBOX_BUF_SIZE) == mbox->read_index) { - if (!block) { - dev_dbg(&(mbox->pdev->dev), - "Buffer full in non-blocking call! " - "Returning -ENOMEM!\n"); - res = -ENOMEM; - goto exit; - } - spin_unlock(&mbox->lock); - dev_dbg(&(mbox->pdev->dev), - "Buffer full in blocking call! Sleeping...\n"); - mbox->client_blocked = 1; - wait_for_completion(&mbox->buffer_available); - dev_dbg(&(mbox->pdev->dev), - "Blocking send was woken up! Trying again...\n"); - spin_lock(&mbox->lock); - } - - mbox->buffer[mbox->write_index] = mbox_msg; - mbox->write_index = (mbox->write_index + 1) % MBOX_BUF_SIZE; - - /* - * Indicate that we want an IRQ as soon as there is a slot - * in the FIFO - */ - writel(MBOX_ENABLE_IRQ, mbox->virtbase_peer + MBOX_FIFO_THRES_FREE); - -exit: - spin_unlock(&mbox->lock); - return res; -} -EXPORT_SYMBOL(mbox_send); - -#if defined(CONFIG_DEBUG_FS) -/* - * Expected input: - * Example: "echo 0xdeadbeef 4 > mbox-node" sends 0xdeadbeef 4 times - */ -static ssize_t mbox_write_fifo(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t count) -{ - unsigned long mbox_mess; - unsigned long nbr_sends; - unsigned long i; - char int_buf[16]; - char *token; - char *val; - - struct mbox *mbox = (struct mbox *) dev->platform_data; - - strncpy((char *) &int_buf, buf, sizeof(int_buf)); - token = (char *) &int_buf; - - /* Parse message */ - val = strsep(&token, " "); - if ((val == NULL) || (strict_strtoul(val, 16, &mbox_mess) != 0)) - mbox_mess = 0xDEADBEEF; - - val = strsep(&token, " "); - if ((val == NULL) || (strict_strtoul(val, 10, &nbr_sends) != 0)) - nbr_sends = 1; - - dev_dbg(dev, "Will write 0x%lX %ld times using data struct at 0x%X\n", - mbox_mess, nbr_sends, (u32) mbox); - - for (i = 0; i < nbr_sends; i++) - mbox_send(mbox, mbox_mess, true); - - return count; -} - -static ssize_t mbox_read_fifo(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - int mbox_value; - struct mbox *mbox = (struct mbox *) dev->platform_data; - - if ((readl(mbox->virtbase_local + MBOX_FIFO_STATUS) & 0x7) <= 0) - return sprintf(buf, "Mailbox is empty\n"); - - mbox_value = readl(mbox->virtbase_local + MBOX_FIFO_DATA); - writel(MBOX_LATCH, (mbox->virtbase_local + MBOX_FIFO_REMOVE)); - - return sprintf(buf, "0x%X\n", mbox_value); -} - -static DEVICE_ATTR(fifo, S_IWUGO | S_IRUGO, mbox_read_fifo, mbox_write_fifo); - -static int mbox_show(struct seq_file *s, void *data) -{ - struct list_head *pos; - u8 mbox_index = 0; - - list_for_each(pos, &mboxs) { - struct mbox *m = - (struct mbox *) list_entry(pos, struct mbox, list); - if (m == NULL) { - seq_printf(s, - "Unable to retrieve mailbox %d\n", - mbox_index); - continue; - } - - spin_lock(&m->lock); - if ((m->virtbase_peer == NULL) || (m->virtbase_local == NULL)) { - seq_printf(s, "MAILBOX %d not setup or corrupt\n", - mbox_index); - spin_unlock(&m->lock); - continue; - } - - seq_printf(s, - "===========================\n" - " MAILBOX %d\n" - " PEER MAILBOX DUMP\n" - "---------------------------\n" - "FIFO: 0x%X (%d)\n" - "Free Threshold: 0x%.2X (%d)\n" - "Occupied Threshold: 0x%.2X (%d)\n" - "Status: 0x%.2X (%d)\n" - " Free spaces (ot): %d (%d)\n" - " Occup spaces (ot): %d (%d)\n" - "===========================\n" - " LOCAL MAILBOX DUMP\n" - "---------------------------\n" - "FIFO: 0x%.X (%d)\n" - "Free Threshold: 0x%.2X (%d)\n" - "Occupied Threshold: 0x%.2X (%d)\n" - "Status: 0x%.2X (%d)\n" - " Free spaces (ot): %d (%d)\n" - " Occup spaces (ot): %d (%d)\n" - "===========================\n" - "write_index: %d\n" - "read_index : %d\n" - "===========================\n" - "\n", - mbox_index, - readl(m->virtbase_peer + MBOX_FIFO_DATA), - readl(m->virtbase_peer + MBOX_FIFO_DATA), - readl(m->virtbase_peer + MBOX_FIFO_THRES_FREE), - readl(m->virtbase_peer + MBOX_FIFO_THRES_FREE), - readl(m->virtbase_peer + MBOX_FIFO_THRES_OCCUP), - readl(m->virtbase_peer + MBOX_FIFO_THRES_OCCUP), - readl(m->virtbase_peer + MBOX_FIFO_STATUS), - readl(m->virtbase_peer + MBOX_FIFO_STATUS), - (readl(m->virtbase_peer + MBOX_FIFO_STATUS) >> 4) & 0x7, - (readl(m->virtbase_peer + MBOX_FIFO_STATUS) >> 7) & 0x1, - (readl(m->virtbase_peer + MBOX_FIFO_STATUS) >> 0) & 0x7, - (readl(m->virtbase_peer + MBOX_FIFO_STATUS) >> 3) & 0x1, - readl(m->virtbase_local + MBOX_FIFO_DATA), - readl(m->virtbase_local + MBOX_FIFO_DATA), - readl(m->virtbase_local + MBOX_FIFO_THRES_FREE), - readl(m->virtbase_local + MBOX_FIFO_THRES_FREE), - readl(m->virtbase_local + MBOX_FIFO_THRES_OCCUP), - readl(m->virtbase_local + MBOX_FIFO_THRES_OCCUP), - readl(m->virtbase_local + MBOX_FIFO_STATUS), - readl(m->virtbase_local + MBOX_FIFO_STATUS), - (readl(m->virtbase_local + MBOX_FIFO_STATUS) >> 4) & 0x7, - (readl(m->virtbase_local + MBOX_FIFO_STATUS) >> 7) & 0x1, - (readl(m->virtbase_local + MBOX_FIFO_STATUS) >> 0) & 0x7, - (readl(m->virtbase_local + MBOX_FIFO_STATUS) >> 3) & 0x1, - m->write_index, m->read_index); - mbox_index++; - spin_unlock(&m->lock); - } - - return 0; -} - -static int mbox_open(struct inode *inode, struct file *file) -{ - return single_open(file, mbox_show, NULL); -} - -static const struct file_operations mbox_operations = { - .owner = THIS_MODULE, - .open = mbox_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; -#endif - -static irqreturn_t mbox_irq(int irq, void *arg) -{ - u32 mbox_value; - int nbr_occup; - int nbr_free; - struct mbox *mbox = (struct mbox *) arg; - - spin_lock(&mbox->lock); - - dev_dbg(&(mbox->pdev->dev), - "mbox IRQ [%d] received. ri = %d, wi = %d\n", - irq, mbox->read_index, mbox->write_index); - - /* - * Check if we have any outgoing messages, and if there is space for - * them in the FIFO. - */ - if (mbox->read_index != mbox->write_index) { - /* - * Check by reading FREE for LOCAL since that indicates - * OCCUP for PEER - */ - nbr_free = (readl(mbox->virtbase_local + MBOX_FIFO_STATUS) - >> 4) & 0x7; - dev_dbg(&(mbox->pdev->dev), - "Status indicates %d empty spaces in the FIFO!\n", - nbr_free); - - while ((nbr_free > 0) && - (mbox->read_index != mbox->write_index)) { - /* Write the message and latch it into the FIFO */ - writel(mbox->buffer[mbox->read_index], - (mbox->virtbase_peer + MBOX_FIFO_DATA)); - writel(MBOX_LATCH, - (mbox->virtbase_peer + MBOX_FIFO_ADD)); - dev_dbg(&(mbox->pdev->dev), - "Wrote message 0x%X to addr 0x%X\n", - mbox->buffer[mbox->read_index], - (u32) (mbox->virtbase_peer + MBOX_FIFO_DATA)); - - nbr_free--; - mbox->read_index = - (mbox->read_index + 1) % MBOX_BUF_SIZE; - } - - /* - * Check if we still want IRQ:s when there is free - * space to send - */ - if (mbox->read_index != mbox->write_index) { - dev_dbg(&(mbox->pdev->dev), - "Still have messages to send, but FIFO full. " - "Request IRQ again!\n"); - writel(MBOX_ENABLE_IRQ, - mbox->virtbase_peer + MBOX_FIFO_THRES_FREE); - } else { - dev_dbg(&(mbox->pdev->dev), - "No more messages to send. " - "Do not request IRQ again!\n"); - writel(MBOX_DISABLE_IRQ, - mbox->virtbase_peer + MBOX_FIFO_THRES_FREE); - } - - /* - * Check if we can signal any blocked clients that it is OK to - * start buffering again - */ - if (mbox->client_blocked && - (((mbox->write_index + 1) % MBOX_BUF_SIZE) - != mbox->read_index)) { - dev_dbg(&(mbox->pdev->dev), - "Waking up blocked client\n"); - complete(&mbox->buffer_available); - mbox->client_blocked = 0; - } - } - - /* Check if we have any incoming messages */ - nbr_occup = readl(mbox->virtbase_local + MBOX_FIFO_STATUS) & 0x7; - if (nbr_occup == 0) - goto exit; - - if (mbox->cb == NULL) { - dev_dbg(&(mbox->pdev->dev), "No receive callback registered, " - "leaving %d incoming messages in fifo!\n", nbr_occup); - goto exit; - } - - /* Read and acknowledge the message */ - mbox_value = readl(mbox->virtbase_local + MBOX_FIFO_DATA); - writel(MBOX_LATCH, (mbox->virtbase_local + MBOX_FIFO_REMOVE)); - - /* Notify consumer of new mailbox message */ - dev_dbg(&(mbox->pdev->dev), "Calling callback for message 0x%X!\n", - mbox_value); - mbox->cb(mbox_value, mbox->client_data); - -exit: - dev_dbg(&(mbox->pdev->dev), "Exit mbox IRQ. ri = %d, wi = %d\n", - mbox->read_index, mbox->write_index); - spin_unlock(&mbox->lock); - - return IRQ_HANDLED; -} - -/* Setup is executed once for each mbox pair */ -struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv) -{ - struct resource *resource; - int irq; - int res; - struct mbox *mbox; - - mbox = get_mbox_with_id(mbox_id); - if (mbox == NULL) { - dev_err(&(mbox->pdev->dev), "Incorrect mailbox id: %d!\n", - mbox_id); - goto exit; - } - - /* - * Check if mailbox has been allocated to someone else, - * otherwise allocate it - */ - if (mbox->allocated) { - dev_err(&(mbox->pdev->dev), "Mailbox number %d is busy!\n", - mbox_id); - mbox = NULL; - goto exit; - } - mbox->allocated = true; - - dev_dbg(&(mbox->pdev->dev), "Initiating mailbox number %d: 0x%X...\n", - mbox_id, (u32)mbox); - - mbox->client_data = priv; - mbox->cb = mbox_cb; - - /* Get addr for peer mailbox and ioremap it */ - resource = platform_get_resource_byname(mbox->pdev, - IORESOURCE_MEM, - "mbox_peer"); - if (resource == NULL) { - dev_err(&(mbox->pdev->dev), - "Unable to retrieve mbox peer resource\n"); - mbox = NULL; - goto exit; - } - dev_dbg(&(mbox->pdev->dev), - "Resource name: %s start: 0x%X, end: 0x%X\n", - resource->name, resource->start, resource->end); - mbox->virtbase_peer = - ioremap(resource->start, resource->end - resource->start); - if (!mbox->virtbase_peer) { - dev_err(&(mbox->pdev->dev), "Unable to ioremap peer mbox\n"); - mbox = NULL; - goto exit; - } - dev_dbg(&(mbox->pdev->dev), - "ioremapped peer physical: (0x%X-0x%X) to virtual: 0x%X\n", - resource->start, resource->end, (u32) mbox->virtbase_peer); - - /* Get addr for local mailbox and ioremap it */ - resource = platform_get_resource_byname(mbox->pdev, - IORESOURCE_MEM, - "mbox_local"); - if (resource == NULL) { - dev_err(&(mbox->pdev->dev), - "Unable to retrieve mbox local resource\n"); - mbox = NULL; - goto exit; - } - dev_dbg(&(mbox->pdev->dev), - "Resource name: %s start: 0x%X, end: 0x%X\n", - resource->name, resource->start, resource->end); - mbox->virtbase_local = - ioremap(resource->start, resource->end - resource->start); - if (!mbox->virtbase_local) { - dev_err(&(mbox->pdev->dev), "Unable to ioremap local mbox\n"); - mbox = NULL; - goto exit; - } - dev_dbg(&(mbox->pdev->dev), - "ioremapped local physical: (0x%X-0x%X) to virtual: 0x%X\n", - resource->start, resource->end, (u32) mbox->virtbase_peer); - - init_completion(&mbox->buffer_available); - mbox->client_blocked = 0; - - /* Get IRQ for mailbox and allocate it */ - irq = platform_get_irq_byname(mbox->pdev, "mbox_irq"); - if (irq < 0) { - dev_err(&(mbox->pdev->dev), - "Unable to retrieve mbox irq resource\n"); - mbox = NULL; - goto exit; - } - - dev_dbg(&(mbox->pdev->dev), "Allocating irq %d...\n", irq); - res = request_irq(irq, mbox_irq, 0, mbox->name, (void *) mbox); - if (res < 0) { - dev_err(&(mbox->pdev->dev), - "Unable to allocate mbox irq %d\n", irq); - mbox = NULL; - goto exit; - } - - /* Set up mailbox to not launch IRQ on free space in mailbox */ - writel(MBOX_DISABLE_IRQ, mbox->virtbase_peer + MBOX_FIFO_THRES_FREE); - - /* - * Set up mailbox to launch IRQ on new message if we have - * a callback set. If not, do not raise IRQ, but keep message - * in FIFO for manual retrieval - */ - if (mbox_cb != NULL) - writel(MBOX_ENABLE_IRQ, - mbox->virtbase_local + MBOX_FIFO_THRES_OCCUP); - else - writel(MBOX_DISABLE_IRQ, - mbox->virtbase_local + MBOX_FIFO_THRES_OCCUP); - -#if defined(CONFIG_DEBUG_FS) - res = device_create_file(&(mbox->pdev->dev), &dev_attr_fifo); - if (res != 0) - dev_warn(&(mbox->pdev->dev), - "Unable to create mbox sysfs entry"); - - (void) debugfs_create_file("mbox", S_IFREG | S_IRUGO, NULL, - NULL, &mbox_operations); -#endif - - dev_info(&(mbox->pdev->dev), - "Mailbox driver with index %d initated!\n", mbox_id); - -exit: - return mbox; -} -EXPORT_SYMBOL(mbox_setup); - - -int __init mbox_probe(struct platform_device *pdev) -{ - struct mbox local_mbox; - struct mbox *mbox; - int res = 0; - dev_dbg(&(pdev->dev), "Probing mailbox (pdev = 0x%X)...\n", (u32) pdev); - - memset(&local_mbox, 0x0, sizeof(struct mbox)); - - /* Associate our mbox data with the platform device */ - res = platform_device_add_data(pdev, - (void *) &local_mbox, - sizeof(struct mbox)); - if (res != 0) { - dev_err(&(pdev->dev), - "Unable to allocate driver platform data!\n"); - goto exit; - } - - mbox = (struct mbox *) pdev->dev.platform_data; - mbox->pdev = pdev; - mbox->write_index = 0; - mbox->read_index = 0; - - INIT_LIST_HEAD(&(mbox->list)); - list_add_tail(&(mbox->list), &mboxs); - - sprintf(mbox->name, "%s", MBOX_NAME); - spin_lock_init(&mbox->lock); - - dev_info(&(pdev->dev), "Mailbox driver loaded\n"); - -exit: - return res; -} - -static struct platform_driver mbox_driver = { - .driver = { - .name = MBOX_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init mbox_init(void) -{ - return platform_driver_probe(&mbox_driver, mbox_probe); -} - -module_init(mbox_init); - -void __exit mbox_exit(void) -{ - platform_driver_unregister(&mbox_driver); -} - -module_exit(mbox_exit); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("MBOX driver"); diff --git a/trunk/arch/arm/mach-ux500/modem_irq.c b/trunk/arch/arm/mach-ux500/modem_irq.c deleted file mode 100644 index 3187f8871169..000000000000 --- a/trunk/arch/arm/mach-ux500/modem_irq.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * Author: Stefan Nilsson for ST-Ericsson. - * Author: Martin Persson for ST-Ericsson. - * License terms: GNU General Public License (GPL), version 2. - */ - -#include -#include -#include -#include -#include -#include - -#define MODEM_INTCON_BASE_ADDR 0xBFFD3000 -#define MODEM_INTCON_SIZE 0xFFF - -#define DEST_IRQ41_OFFSET 0x2A4 -#define DEST_IRQ43_OFFSET 0x2AC -#define DEST_IRQ45_OFFSET 0x2B4 - -#define PRIO_IRQ41_OFFSET 0x6A4 -#define PRIO_IRQ43_OFFSET 0x6AC -#define PRIO_IRQ45_OFFSET 0x6B4 - -#define ALLOW_IRQ_OFFSET 0x104 - -#define MODEM_INTCON_CPU_NBR 0x1 -#define MODEM_INTCON_PRIO_HIGH 0x0 - -#define MODEM_INTCON_ALLOW_IRQ41 0x0200 -#define MODEM_INTCON_ALLOW_IRQ43 0x0800 -#define MODEM_INTCON_ALLOW_IRQ45 0x2000 - -#define MODEM_IRQ_REG_OFFSET 0x4 - -struct modem_irq { - void __iomem *modem_intcon_base; -}; - - -static void setup_modem_intcon(void __iomem *modem_intcon_base) -{ - /* IC_DESTINATION_BASE_ARRAY - Which CPU to receive the IRQ */ - writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ41_OFFSET); - writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ43_OFFSET); - writel(MODEM_INTCON_CPU_NBR, modem_intcon_base + DEST_IRQ45_OFFSET); - - /* IC_PRIORITY_BASE_ARRAY - IRQ priority in modem IRQ controller */ - writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ41_OFFSET); - writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ43_OFFSET); - writel(MODEM_INTCON_PRIO_HIGH, modem_intcon_base + PRIO_IRQ45_OFFSET); - - /* IC_ALLOW_ARRAY - IRQ enable */ - writel(MODEM_INTCON_ALLOW_IRQ41 | - MODEM_INTCON_ALLOW_IRQ43 | - MODEM_INTCON_ALLOW_IRQ45, - modem_intcon_base + ALLOW_IRQ_OFFSET); -} - -static irqreturn_t modem_cpu_irq_handler(int irq, void *data) -{ - int real_irq; - int virt_irq; - struct modem_irq *mi = (struct modem_irq *)data; - - /* Read modem side IRQ number from modem IRQ controller */ - real_irq = readl(mi->modem_intcon_base + MODEM_IRQ_REG_OFFSET) & 0xFF; - virt_irq = IRQ_MODEM_EVENTS_BASE + real_irq; - - pr_debug("modem_irq: Worker read addr 0x%X and got value 0x%X " - "which will be 0x%X (%d) which translates to " - "virtual IRQ 0x%X (%d)!\n", - (u32)mi->modem_intcon_base + MODEM_IRQ_REG_OFFSET, - real_irq, - real_irq & 0xFF, - real_irq & 0xFF, - virt_irq, - virt_irq); - - if (virt_irq != 0) - generic_handle_irq(virt_irq); - - pr_debug("modem_irq: Done handling virtual IRQ %d!\n", virt_irq); - - return IRQ_HANDLED; -} - -static void create_virtual_irq(int irq, struct irq_chip *modem_irq_chip) -{ - set_irq_chip(irq, modem_irq_chip); - set_irq_handler(irq, handle_simple_irq); - set_irq_flags(irq, IRQF_VALID); - - pr_debug("modem_irq: Created virtual IRQ %d\n", irq); -} - -static int modem_irq_init(void) -{ - int err; - static struct irq_chip modem_irq_chip; - struct modem_irq *mi; - - pr_info("modem_irq: Set up IRQ handler for incoming modem IRQ %d\n", - IRQ_DB5500_MODEM); - - mi = kmalloc(sizeof(struct modem_irq), GFP_KERNEL); - if (!mi) { - pr_err("modem_irq: Could not allocate device\n"); - return -ENOMEM; - } - - mi->modem_intcon_base = - ioremap(MODEM_INTCON_BASE_ADDR, MODEM_INTCON_SIZE); - pr_debug("modem_irq: ioremapped modem_intcon_base from " - "phy 0x%x to virt 0x%x\n", MODEM_INTCON_BASE_ADDR, - (u32)mi->modem_intcon_base); - - setup_modem_intcon(mi->modem_intcon_base); - - modem_irq_chip = dummy_irq_chip; - modem_irq_chip.name = "modem_irq"; - - /* Create the virtual IRQ:s needed */ - create_virtual_irq(MBOX_PAIR0_VIRT_IRQ, &modem_irq_chip); - create_virtual_irq(MBOX_PAIR1_VIRT_IRQ, &modem_irq_chip); - create_virtual_irq(MBOX_PAIR2_VIRT_IRQ, &modem_irq_chip); - - err = request_threaded_irq(IRQ_DB5500_MODEM, NULL, - modem_cpu_irq_handler, IRQF_ONESHOT, - "modem_irq", mi); - if (err) - pr_err("modem_irq: Could not register IRQ %d\n", - IRQ_DB5500_MODEM); - - return 0; -} - -arch_initcall(modem_irq_init); diff --git a/trunk/arch/arm/mach-ux500/pins-db5500.h b/trunk/arch/arm/mach-ux500/pins-db5500.h deleted file mode 100644 index bf50c21fe69d..000000000000 --- a/trunk/arch/arm/mach-ux500/pins-db5500.h +++ /dev/null @@ -1,620 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License terms: GNU General Public License, version 2 - * Author: Rabin Vincent - */ - -#ifndef __MACH_DB5500_PINS_H -#define __MACH_DB5500_PINS_H - -#define GPIO0_GPIO PIN_CFG(0, GPIO) -#define GPIO0_SM_CS3n PIN_CFG(0, ALT_A) - -#define GPIO1_GPIO PIN_CFG(1, GPIO) -#define GPIO1_SM_A3 PIN_CFG(1, ALT_A) - -#define GPIO2_GPIO PIN_CFG(2, GPIO) -#define GPIO2_SM_A4 PIN_CFG(2, ALT_A) -#define GPIO2_SM_AVD PIN_CFG(2, ALT_B) - -#define GPIO3_GPIO PIN_CFG(3, GPIO) -#define GPIO3_I2C1_SCL PIN_CFG(3, ALT_A) - -#define GPIO4_GPIO PIN_CFG(4, GPIO) -#define GPIO4_I2C1_SDA PIN_CFG(4, ALT_A) - -#define GPIO5_GPIO PIN_CFG(5, GPIO) -#define GPIO5_MC0_DAT0 PIN_CFG(5, ALT_A) -#define GPIO5_SM_ADQ8 PIN_CFG(5, ALT_B) - -#define GPIO6_GPIO PIN_CFG(6, GPIO) -#define GPIO6_MC0_DAT1 PIN_CFG(6, ALT_A) -#define GPIO6_SM_ADQ0 PIN_CFG(6, ALT_B) - -#define GPIO7_GPIO PIN_CFG(7, GPIO) -#define GPIO7_MC0_DAT2 PIN_CFG(7, ALT_A) -#define GPIO7_SM_ADQ9 PIN_CFG(7, ALT_B) - -#define GPIO8_GPIO PIN_CFG(8, GPIO) -#define GPIO8_MC0_DAT3 PIN_CFG(8, ALT_A) -#define GPIO8_SM_ADQ1 PIN_CFG(8, ALT_B) - -#define GPIO9_GPIO PIN_CFG(9, GPIO) -#define GPIO9_MC0_DAT4 PIN_CFG(9, ALT_A) -#define GPIO9_SM_ADQ10 PIN_CFG(9, ALT_B) - -#define GPIO10_GPIO PIN_CFG(10, GPIO) -#define GPIO10_MC0_DAT5 PIN_CFG(10, ALT_A) -#define GPIO10_SM_ADQ2 PIN_CFG(10, ALT_B) - -#define GPIO11_GPIO PIN_CFG(11, GPIO) -#define GPIO11_MC0_DAT6 PIN_CFG(11, ALT_A) -#define GPIO11_SM_ADQ11 PIN_CFG(11, ALT_B) - -#define GPIO12_GPIO PIN_CFG(12, GPIO) -#define GPIO12_MC0_DAT7 PIN_CFG(12, ALT_A) -#define GPIO12_SM_ADQ3 PIN_CFG(12, ALT_B) - -#define GPIO13_GPIO PIN_CFG(13, GPIO) -#define GPIO13_MC0_CMD PIN_CFG(13, ALT_A) -#define GPIO13_SM_BUSY0n PIN_CFG(13, ALT_B) -#define GPIO13_SM_WAIT0n PIN_CFG(13, ALT_C) - -#define GPIO14_GPIO PIN_CFG(14, GPIO) -#define GPIO14_MC0_CLK PIN_CFG(14, ALT_A) -#define GPIO14_SM_CS1n PIN_CFG(14, ALT_B) -#define GPIO14_SM_CKO PIN_CFG(14, ALT_C) - -#define GPIO15_GPIO PIN_CFG(15, GPIO) -#define GPIO15_SM_A5 PIN_CFG(15, ALT_A) -#define GPIO15_SM_CLE PIN_CFG(15, ALT_B) - -#define GPIO16_GPIO PIN_CFG(16, GPIO) -#define GPIO16_MC2_CMD PIN_CFG(16, ALT_A) -#define GPIO16_SM_OEn PIN_CFG(16, ALT_B) - -#define GPIO17_GPIO PIN_CFG(17, GPIO) -#define GPIO17_MC2_CLK PIN_CFG(17, ALT_A) -#define GPIO17_SM_WEn PIN_CFG(17, ALT_B) - -#define GPIO18_GPIO PIN_CFG(18, GPIO) -#define GPIO18_SM_A6 PIN_CFG(18, ALT_A) -#define GPIO18_SM_ALE PIN_CFG(18, ALT_B) -#define GPIO18_SM_AVDn PIN_CFG(18, ALT_C) - -#define GPIO19_GPIO PIN_CFG(19, GPIO) -#define GPIO19_MC2_DAT1 PIN_CFG(19, ALT_A) -#define GPIO19_SM_ADQ4 PIN_CFG(19, ALT_B) - -#define GPIO20_GPIO PIN_CFG(20, GPIO) -#define GPIO20_MC2_DAT3 PIN_CFG(20, ALT_A) -#define GPIO20_SM_ADQ5 PIN_CFG(20, ALT_B) - -#define GPIO21_GPIO PIN_CFG(21, GPIO) -#define GPIO21_MC2_DAT5 PIN_CFG(21, ALT_A) -#define GPIO21_SM_ADQ6 PIN_CFG(21, ALT_B) - -#define GPIO22_GPIO PIN_CFG(22, GPIO) -#define GPIO22_MC2_DAT7 PIN_CFG(22, ALT_A) -#define GPIO22_SM_ADQ7 PIN_CFG(22, ALT_B) - -#define GPIO23_GPIO PIN_CFG(23, GPIO) -#define GPIO23_MC2_DAT0 PIN_CFG(23, ALT_A) -#define GPIO23_SM_ADQ12 PIN_CFG(23, ALT_B) -#define GPIO23_MC0_DAT1 PIN_CFG(23, ALT_C) - -#define GPIO24_GPIO PIN_CFG(24, GPIO) -#define GPIO24_MC2_DAT2 PIN_CFG(24, ALT_A) -#define GPIO24_SM_ADQ13 PIN_CFG(24, ALT_B) -#define GPIO24_MC0_DAT3 PIN_CFG(24, ALT_C) - -#define GPIO25_GPIO PIN_CFG(25, GPIO) -#define GPIO25_MC2_DAT4 PIN_CFG(25, ALT_A) -#define GPIO25_SM_ADQ14 PIN_CFG(25, ALT_B) -#define GPIO25_MC0_CMD PIN_CFG(25, ALT_C) - -#define GPIO26_GPIO PIN_CFG(26, GPIO) -#define GPIO26_MC2_DAT6 PIN_CFG(26, ALT_A) -#define GPIO26_SM_ADQ15 PIN_CFG(26, ALT_B) - -#define GPIO27_GPIO PIN_CFG(27, GPIO) -#define GPIO27_SM_CS0n PIN_CFG(27, ALT_A) -#define GPIO27_SM_PS0n PIN_CFG(27, ALT_B) - -#define GPIO28_GPIO PIN_CFG(28, GPIO) -#define GPIO28_U0_TXD PIN_CFG(28, ALT_A) -#define GPIO28_SM_A0 PIN_CFG(28, ALT_B) - -#define GPIO29_GPIO PIN_CFG(29, GPIO) -#define GPIO29_U0_RXD PIN_CFG(29, ALT_A) -#define GPIO29_SM_A1 PIN_CFG(29, ALT_B) -#define GPIO29_PWM_0 PIN_CFG(29, ALT_C) - -#define GPIO30_GPIO PIN_CFG(30, GPIO) -#define GPIO30_MC0_DAT5 PIN_CFG(30, ALT_A) -#define GPIO30_SM_A2 PIN_CFG(30, ALT_B) -#define GPIO30_PWM_1 PIN_CFG(30, ALT_C) - -#define GPIO31_GPIO PIN_CFG(31, GPIO) -#define GPIO31_MC0_DAT7 PIN_CFG(31, ALT_A) -#define GPIO31_SM_CS2n PIN_CFG(31, ALT_B) -#define GPIO31_PWM_2 PIN_CFG(31, ALT_C) - -#define GPIO32_GPIO PIN_CFG(32, GPIO) -#define GPIO32_MSP0_TCK PIN_CFG(32, ALT_A) -#define GPIO32_ACCI2S0_SCK PIN_CFG(32, ALT_B) - -#define GPIO33_GPIO PIN_CFG(33, GPIO) -#define GPIO33_MSP0_TFS PIN_CFG(33, ALT_A) -#define GPIO33_ACCI2S0_WS PIN_CFG(33, ALT_B) - -#define GPIO34_GPIO PIN_CFG(34, GPIO) -#define GPIO34_MSP0_TXD PIN_CFG(34, ALT_A) -#define GPIO34_ACCI2S0_DLD PIN_CFG(34, ALT_B) - -#define GPIO35_GPIO PIN_CFG(35, GPIO) -#define GPIO35_MSP0_RXD PIN_CFG(35, ALT_A) -#define GPIO35_ACCI2S0_ULD PIN_CFG(35, ALT_B) - -#define GPIO64_GPIO PIN_CFG(64, GPIO) -#define GPIO64_USB_DAT0 PIN_CFG(64, ALT_A) -#define GPIO64_U0_TXD PIN_CFG(64, ALT_B) - -#define GPIO65_GPIO PIN_CFG(65, GPIO) -#define GPIO65_USB_DAT1 PIN_CFG(65, ALT_A) -#define GPIO65_U0_RXD PIN_CFG(65, ALT_B) - -#define GPIO66_GPIO PIN_CFG(66, GPIO) -#define GPIO66_USB_DAT2 PIN_CFG(66, ALT_A) - -#define GPIO67_GPIO PIN_CFG(67, GPIO) -#define GPIO67_USB_DAT3 PIN_CFG(67, ALT_A) - -#define GPIO68_GPIO PIN_CFG(68, GPIO) -#define GPIO68_USB_DAT4 PIN_CFG(68, ALT_A) - -#define GPIO69_GPIO PIN_CFG(69, GPIO) -#define GPIO69_USB_DAT5 PIN_CFG(69, ALT_A) - -#define GPIO70_GPIO PIN_CFG(70, GPIO) -#define GPIO70_USB_DAT6 PIN_CFG(70, ALT_A) - -#define GPIO71_GPIO PIN_CFG(71, GPIO) -#define GPIO71_USB_DAT7 PIN_CFG(71, ALT_A) - -#define GPIO72_GPIO PIN_CFG(72, GPIO) -#define GPIO72_USB_STP PIN_CFG(72, ALT_A) - -#define GPIO73_GPIO PIN_CFG(73, GPIO) -#define GPIO73_USB_DIR PIN_CFG(73, ALT_A) - -#define GPIO74_GPIO PIN_CFG(74, GPIO) -#define GPIO74_USB_NXT PIN_CFG(74, ALT_A) - -#define GPIO75_GPIO PIN_CFG(75, GPIO) -#define GPIO75_USB_XCLK PIN_CFG(75, ALT_A) - -#define GPIO76_GPIO PIN_CFG(76, GPIO) - -#define GPIO77_GPIO PIN_CFG(77, GPIO) -#define GPIO77_ACCTX_ON PIN_CFG(77, ALT_A) - -#define GPIO78_GPIO PIN_CFG(78, GPIO) -#define GPIO78_IRQn PIN_CFG(78, ALT_A) - -#define GPIO79_GPIO PIN_CFG(79, GPIO) -#define GPIO79_ACCSIM_Clk PIN_CFG(79, ALT_A) - -#define GPIO80_GPIO PIN_CFG(80, GPIO) -#define GPIO80_ACCSIM_Da PIN_CFG(80, ALT_A) - -#define GPIO81_GPIO PIN_CFG(81, GPIO) -#define GPIO81_ACCSIM_Reset PIN_CFG(81, ALT_A) - -#define GPIO82_GPIO PIN_CFG(82, GPIO) -#define GPIO82_ACCSIM_DDir PIN_CFG(82, ALT_A) - -#define GPIO96_GPIO PIN_CFG(96, GPIO) -#define GPIO96_MSP1_TCK PIN_CFG(96, ALT_A) -#define GPIO96_PRCMU_DEBUG3 PIN_CFG(96, ALT_B) -#define GPIO96_PRCMU_DEBUG7 PIN_CFG(96, ALT_C) - -#define GPIO97_GPIO PIN_CFG(97, GPIO) -#define GPIO97_MSP1_TFS PIN_CFG(97, ALT_A) -#define GPIO97_PRCMU_DEBUG2 PIN_CFG(97, ALT_B) -#define GPIO97_PRCMU_DEBUG6 PIN_CFG(97, ALT_C) - -#define GPIO98_GPIO PIN_CFG(98, GPIO) -#define GPIO98_MSP1_TXD PIN_CFG(98, ALT_A) -#define GPIO98_PRCMU_DEBUG1 PIN_CFG(98, ALT_B) -#define GPIO98_PRCMU_DEBUG5 PIN_CFG(98, ALT_C) - -#define GPIO99_GPIO PIN_CFG(99, GPIO) -#define GPIO99_MSP1_RXD PIN_CFG(99, ALT_A) -#define GPIO99_PRCMU_DEBUG0 PIN_CFG(99, ALT_B) -#define GPIO99_PRCMU_DEBUG4 PIN_CFG(99, ALT_C) - -#define GPIO100_GPIO PIN_CFG(100, GPIO) -#define GPIO100_I2C0_SCL PIN_CFG(100, ALT_A) - -#define GPIO101_GPIO PIN_CFG(101, GPIO) -#define GPIO101_I2C0_SDA PIN_CFG(101, ALT_A) - -#define GPIO128_GPIO PIN_CFG(128, GPIO) -#define GPIO128_KP_I0 PIN_CFG(128, ALT_A) -#define GPIO128_BUSMON_D0 PIN_CFG(128, ALT_B) - -#define GPIO129_GPIO PIN_CFG(129, GPIO) -#define GPIO129_KP_O0 PIN_CFG(129, ALT_A) -#define GPIO129_BUSMON_D1 PIN_CFG(129, ALT_B) - -#define GPIO130_GPIO PIN_CFG(130, GPIO) -#define GPIO130_KP_I1 PIN_CFG(130, ALT_A) -#define GPIO130_BUSMON_D2 PIN_CFG(130, ALT_B) - -#define GPIO131_GPIO PIN_CFG(131, GPIO) -#define GPIO131_KP_O1 PIN_CFG(131, ALT_A) -#define GPIO131_BUSMON_D3 PIN_CFG(131, ALT_B) - -#define GPIO132_GPIO PIN_CFG(132, GPIO) -#define GPIO132_KP_I2 PIN_CFG(132, ALT_A) -#define GPIO132_ETM_D15 PIN_CFG(132, ALT_B) -#define GPIO132_STMAPE_CLK PIN_CFG(132, ALT_C) - -#define GPIO133_GPIO PIN_CFG(133, GPIO) -#define GPIO133_KP_O2 PIN_CFG(133, ALT_A) -#define GPIO133_ETM_D14 PIN_CFG(133, ALT_B) -#define GPIO133_U0_RXD PIN_CFG(133, ALT_C) - -#define GPIO134_GPIO PIN_CFG(134, GPIO) -#define GPIO134_KP_I3 PIN_CFG(134, ALT_A) -#define GPIO134_ETM_D13 PIN_CFG(134, ALT_B) -#define GPIO134_STMAPE_DAT0 PIN_CFG(134, ALT_C) - -#define GPIO135_GPIO PIN_CFG(135, GPIO) -#define GPIO135_KP_O3 PIN_CFG(135, ALT_A) -#define GPIO135_ETM_D12 PIN_CFG(135, ALT_B) -#define GPIO135_STMAPE_DAT1 PIN_CFG(135, ALT_C) - -#define GPIO136_GPIO PIN_CFG(136, GPIO) -#define GPIO136_KP_I4 PIN_CFG(136, ALT_A) -#define GPIO136_ETM_D11 PIN_CFG(136, ALT_B) -#define GPIO136_STMAPE_DAT2 PIN_CFG(136, ALT_C) - -#define GPIO137_GPIO PIN_CFG(137, GPIO) -#define GPIO137_KP_O4 PIN_CFG(137, ALT_A) -#define GPIO137_ETM_D10 PIN_CFG(137, ALT_B) -#define GPIO137_STMAPE_DAT3 PIN_CFG(137, ALT_C) - -#define GPIO138_GPIO PIN_CFG(138, GPIO) -#define GPIO138_KP_I5 PIN_CFG(138, ALT_A) -#define GPIO138_ETM_D9 PIN_CFG(138, ALT_B) -#define GPIO138_U0_TXD PIN_CFG(138, ALT_C) - -#define GPIO139_GPIO PIN_CFG(139, GPIO) -#define GPIO139_KP_O5 PIN_CFG(139, ALT_A) -#define GPIO139_ETM_D8 PIN_CFG(139, ALT_B) -#define GPIO139_BUSMON_D11 PIN_CFG(139, ALT_C) - -#define GPIO140_GPIO PIN_CFG(140, GPIO) -#define GPIO140_KP_I6 PIN_CFG(140, ALT_A) -#define GPIO140_ETM_D7 PIN_CFG(140, ALT_B) -#define GPIO140_STMAPE_CLK PIN_CFG(140, ALT_C) - -#define GPIO141_GPIO PIN_CFG(141, GPIO) -#define GPIO141_KP_O6 PIN_CFG(141, ALT_A) -#define GPIO141_ETM_D6 PIN_CFG(141, ALT_B) -#define GPIO141_U0_RXD PIN_CFG(141, ALT_C) - -#define GPIO142_GPIO PIN_CFG(142, GPIO) -#define GPIO142_KP_I7 PIN_CFG(142, ALT_A) -#define GPIO142_ETM_D5 PIN_CFG(142, ALT_B) -#define GPIO142_STMAPE_DAT0 PIN_CFG(142, ALT_C) - -#define GPIO143_GPIO PIN_CFG(143, GPIO) -#define GPIO143_KP_O7 PIN_CFG(143, ALT_A) -#define GPIO143_ETM_D4 PIN_CFG(143, ALT_B) -#define GPIO143_STMAPE_DAT1 PIN_CFG(143, ALT_C) - -#define GPIO144_GPIO PIN_CFG(144, GPIO) -#define GPIO144_I2C3_SCL PIN_CFG(144, ALT_A) -#define GPIO144_ETM_D3 PIN_CFG(144, ALT_B) -#define GPIO144_STMAPE_DAT2 PIN_CFG(144, ALT_C) - -#define GPIO145_GPIO PIN_CFG(145, GPIO) -#define GPIO145_I2C3_SDA PIN_CFG(145, ALT_A) -#define GPIO145_ETM_D2 PIN_CFG(145, ALT_B) -#define GPIO145_STMAPE_DAT3 PIN_CFG(145, ALT_C) - -#define GPIO146_GPIO PIN_CFG(146, GPIO) -#define GPIO146_PWM_0 PIN_CFG(146, ALT_A) -#define GPIO146_ETM_D1 PIN_CFG(146, ALT_B) - -#define GPIO147_GPIO PIN_CFG(147, GPIO) -#define GPIO147_PWM_1 PIN_CFG(147, ALT_A) -#define GPIO147_ETM_D0 PIN_CFG(147, ALT_B) - -#define GPIO148_GPIO PIN_CFG(148, GPIO) -#define GPIO148_PWM_2 PIN_CFG(148, ALT_A) -#define GPIO148_ETM_CLK PIN_CFG(148, ALT_B) - -#define GPIO160_GPIO PIN_CFG(160, GPIO) -#define GPIO160_CLKOUT_REQn PIN_CFG(160, ALT_A) - -#define GPIO161_GPIO PIN_CFG(161, GPIO) -#define GPIO161_CLKOUT_0 PIN_CFG(161, ALT_A) - -#define GPIO162_GPIO PIN_CFG(162, GPIO) -#define GPIO162_CLKOUT_1 PIN_CFG(162, ALT_A) - -#define GPIO163_GPIO PIN_CFG(163, GPIO) - -#define GPIO164_GPIO PIN_CFG(164, GPIO) -#define GPIO164_GPS_START PIN_CFG(164, ALT_A) - -#define GPIO165_GPIO PIN_CFG(165, GPIO) -#define GPIO165_SPI1_CS2n PIN_CFG(165, ALT_A) -#define GPIO165_U3_RXD PIN_CFG(165, ALT_B) -#define GPIO165_BUSMON_D20 PIN_CFG(165, ALT_C) - -#define GPIO166_GPIO PIN_CFG(166, GPIO) -#define GPIO166_SPI1_CS1n PIN_CFG(166, ALT_A) -#define GPIO166_U3_TXD PIN_CFG(166, ALT_B) -#define GPIO166_BUSMON_D21 PIN_CFG(166, ALT_C) - -#define GPIO167_GPIO PIN_CFG(167, GPIO) -#define GPIO167_SPI1_CS0n PIN_CFG(167, ALT_A) -#define GPIO167_U3_RTSn PIN_CFG(167, ALT_B) -#define GPIO167_BUSMON_D22 PIN_CFG(167, ALT_C) - -#define GPIO168_GPIO PIN_CFG(168, GPIO) -#define GPIO168_SPI1_RXD PIN_CFG(168, ALT_A) -#define GPIO168_U3_CTSn PIN_CFG(168, ALT_B) -#define GPIO168_BUSMON_D23 PIN_CFG(168, ALT_C) - -#define GPIO169_GPIO PIN_CFG(169, GPIO) -#define GPIO169_SPI1_TXD PIN_CFG(169, ALT_A) -#define GPIO169_DDR_RC PIN_CFG(169, ALT_B) -#define GPIO169_BUSMON_D24 PIN_CFG(169, ALT_C) - -#define GPIO170_GPIO PIN_CFG(170, GPIO) -#define GPIO170_SPI1_CLK PIN_CFG(170, ALT_A) - -#define GPIO171_GPIO PIN_CFG(171, GPIO) -#define GPIO171_MC3_DAT0 PIN_CFG(171, ALT_A) -#define GPIO171_SPI3_RXD PIN_CFG(171, ALT_B) -#define GPIO171_BUSMON_D25 PIN_CFG(171, ALT_C) - -#define GPIO172_GPIO PIN_CFG(172, GPIO) -#define GPIO172_MC3_DAT1 PIN_CFG(172, ALT_A) -#define GPIO172_SPI3_CS1n PIN_CFG(172, ALT_B) -#define GPIO172_BUSMON_D26 PIN_CFG(172, ALT_C) - -#define GPIO173_GPIO PIN_CFG(173, GPIO) -#define GPIO173_MC3_DAT2 PIN_CFG(173, ALT_A) -#define GPIO173_SPI3_CS2n PIN_CFG(173, ALT_B) -#define GPIO173_BUSMON_D27 PIN_CFG(173, ALT_C) - -#define GPIO174_GPIO PIN_CFG(174, GPIO) -#define GPIO174_MC3_DAT3 PIN_CFG(174, ALT_A) -#define GPIO174_SPI3_CS0n PIN_CFG(174, ALT_B) -#define GPIO174_BUSMON_D28 PIN_CFG(174, ALT_C) - -#define GPIO175_GPIO PIN_CFG(175, GPIO) -#define GPIO175_MC3_CMD PIN_CFG(175, ALT_A) -#define GPIO175_SPI3_TXD PIN_CFG(175, ALT_B) -#define GPIO175_BUSMON_D29 PIN_CFG(175, ALT_C) - -#define GPIO176_GPIO PIN_CFG(176, GPIO) -#define GPIO176_MC3_CLK PIN_CFG(176, ALT_A) -#define GPIO176_SPI3_CLK PIN_CFG(176, ALT_B) - -#define GPIO177_GPIO PIN_CFG(177, GPIO) -#define GPIO177_U2_RXD PIN_CFG(177, ALT_A) -#define GPIO177_I2C3_SCL PIN_CFG(177, ALT_B) -#define GPIO177_BUSMON_D30 PIN_CFG(177, ALT_C) - -#define GPIO178_GPIO PIN_CFG(178, GPIO) -#define GPIO178_U2_TXD PIN_CFG(178, ALT_A) -#define GPIO178_I2C3_SDA PIN_CFG(178, ALT_B) -#define GPIO178_BUSMON_D31 PIN_CFG(178, ALT_C) - -#define GPIO179_GPIO PIN_CFG(179, GPIO) -#define GPIO179_U2_CTSn PIN_CFG(179, ALT_A) -#define GPIO179_U3_RXD PIN_CFG(179, ALT_B) -#define GPIO179_BUSMON_D32 PIN_CFG(179, ALT_C) - -#define GPIO180_GPIO PIN_CFG(180, GPIO) -#define GPIO180_U2_RTSn PIN_CFG(180, ALT_A) -#define GPIO180_U3_TXD PIN_CFG(180, ALT_B) -#define GPIO180_BUSMON_D33 PIN_CFG(180, ALT_C) - -#define GPIO185_GPIO PIN_CFG(185, GPIO) -#define GPIO185_SPI3_CS2n PIN_CFG(185, ALT_A) -#define GPIO185_MC4_DAT0 PIN_CFG(185, ALT_B) - -#define GPIO186_GPIO PIN_CFG(186, GPIO) -#define GPIO186_SPI3_CS1n PIN_CFG(186, ALT_A) -#define GPIO186_MC4_DAT1 PIN_CFG(186, ALT_B) - -#define GPIO187_GPIO PIN_CFG(187, GPIO) -#define GPIO187_SPI3_CS0n PIN_CFG(187, ALT_A) -#define GPIO187_MC4_DAT2 PIN_CFG(187, ALT_B) - -#define GPIO188_GPIO PIN_CFG(188, GPIO) -#define GPIO188_SPI3_RXD PIN_CFG(188, ALT_A) -#define GPIO188_MC4_DAT3 PIN_CFG(188, ALT_B) - -#define GPIO189_GPIO PIN_CFG(189, GPIO) -#define GPIO189_SPI3_TXD PIN_CFG(189, ALT_A) -#define GPIO189_MC4_CMD PIN_CFG(189, ALT_B) - -#define GPIO190_GPIO PIN_CFG(190, GPIO) -#define GPIO190_SPI3_CLK PIN_CFG(190, ALT_A) -#define GPIO190_MC4_CLK PIN_CFG(190, ALT_B) - -#define GPIO191_GPIO PIN_CFG(191, GPIO) -#define GPIO191_MC1_DAT0 PIN_CFG(191, ALT_A) -#define GPIO191_MC4_DAT4 PIN_CFG(191, ALT_B) -#define GPIO191_STMAPE_DAT0 PIN_CFG(191, ALT_C) - -#define GPIO192_GPIO PIN_CFG(192, GPIO) -#define GPIO192_MC1_DAT1 PIN_CFG(192, ALT_A) -#define GPIO192_MC4_DAT5 PIN_CFG(192, ALT_B) -#define GPIO192_STMAPE_DAT1 PIN_CFG(192, ALT_C) - -#define GPIO193_GPIO PIN_CFG(193, GPIO) -#define GPIO193_MC1_DAT2 PIN_CFG(193, ALT_A) -#define GPIO193_MC4_DAT6 PIN_CFG(193, ALT_B) -#define GPIO193_STMAPE_DAT2 PIN_CFG(193, ALT_C) - -#define GPIO194_GPIO PIN_CFG(194, GPIO) -#define GPIO194_MC1_DAT3 PIN_CFG(194, ALT_A) -#define GPIO194_MC4_DAT7 PIN_CFG(194, ALT_B) -#define GPIO194_STMAPE_DAT3 PIN_CFG(194, ALT_C) - -#define GPIO195_GPIO PIN_CFG(195, GPIO) -#define GPIO195_MC1_CLK PIN_CFG(195, ALT_A) -#define GPIO195_STMAPE_CLK PIN_CFG(195, ALT_B) -#define GPIO195_BUSMON_CLK PIN_CFG(195, ALT_C) - -#define GPIO196_GPIO PIN_CFG(196, GPIO) -#define GPIO196_MC1_CMD PIN_CFG(196, ALT_A) -#define GPIO196_U0_RXD PIN_CFG(196, ALT_B) -#define GPIO196_BUSMON_D38 PIN_CFG(196, ALT_C) - -#define GPIO197_GPIO PIN_CFG(197, GPIO) -#define GPIO197_MC1_CMDDIR PIN_CFG(197, ALT_A) -#define GPIO197_BUSMON_D39 PIN_CFG(197, ALT_B) - -#define GPIO198_GPIO PIN_CFG(198, GPIO) -#define GPIO198_MC1_FBCLK PIN_CFG(198, ALT_A) - -#define GPIO199_GPIO PIN_CFG(199, GPIO) -#define GPIO199_MC1_DAT0DIR PIN_CFG(199, ALT_A) -#define GPIO199_BUSMON_D40 PIN_CFG(199, ALT_B) - -#define GPIO200_GPIO PIN_CFG(200, GPIO) -#define GPIO200_U1_TXD PIN_CFG(200, ALT_A) -#define GPIO200_ACCU0_RTSn PIN_CFG(200, ALT_B) - -#define GPIO201_GPIO PIN_CFG(201, GPIO) -#define GPIO201_U1_RXD PIN_CFG(201, ALT_A) -#define GPIO201_ACCU0_CTSn PIN_CFG(201, ALT_B) - -#define GPIO202_GPIO PIN_CFG(202, GPIO) -#define GPIO202_U1_CTSn PIN_CFG(202, ALT_A) -#define GPIO202_ACCU0_RXD PIN_CFG(202, ALT_B) - -#define GPIO203_GPIO PIN_CFG(203, GPIO) -#define GPIO203_U1_RTSn PIN_CFG(203, ALT_A) -#define GPIO203_ACCU0_TXD PIN_CFG(203, ALT_B) - -#define GPIO204_GPIO PIN_CFG(204, GPIO) -#define GPIO204_SPI0_CS2n PIN_CFG(204, ALT_A) -#define GPIO204_ACCGPIO_000 PIN_CFG(204, ALT_B) -#define GPIO204_LCD_VSI1 PIN_CFG(204, ALT_C) - -#define GPIO205_GPIO PIN_CFG(205, GPIO) -#define GPIO205_SPI0_CS1n PIN_CFG(205, ALT_A) -#define GPIO205_ACCGPIO_001 PIN_CFG(205, ALT_B) -#define GPIO205_LCD_D3 PIN_CFG(205, ALT_C) - -#define GPIO206_GPIO PIN_CFG(206, GPIO) -#define GPIO206_SPI0_CS0n PIN_CFG(206, ALT_A) -#define GPIO206_ACCGPIO_002 PIN_CFG(206, ALT_B) -#define GPIO206_LCD_D2 PIN_CFG(206, ALT_C) - -#define GPIO207_GPIO PIN_CFG(207, GPIO) -#define GPIO207_SPI0_RXD PIN_CFG(207, ALT_A) -#define GPIO207_ACCGPIO_003 PIN_CFG(207, ALT_B) -#define GPIO207_LCD_D1 PIN_CFG(207, ALT_C) - -#define GPIO208_GPIO PIN_CFG(208, GPIO) -#define GPIO208_SPI0_TXD PIN_CFG(208, ALT_A) -#define GPIO208_ACCGPIO_004 PIN_CFG(208, ALT_B) -#define GPIO208_LCD_D0 PIN_CFG(208, ALT_C) - -#define GPIO209_GPIO PIN_CFG(209, GPIO) -#define GPIO209_SPI0_CLK PIN_CFG(209, ALT_A) -#define GPIO209_ACCGPIO_005 PIN_CFG(209, ALT_B) -#define GPIO209_LCD_CLK PIN_CFG(209, ALT_C) - -#define GPIO210_GPIO PIN_CFG(210, GPIO) -#define GPIO210_LCD_VSO PIN_CFG(210, ALT_A) -#define GPIO210_PRCMU_PWRCTRL1 PIN_CFG(210, ALT_B) - -#define GPIO211_GPIO PIN_CFG(211, GPIO) -#define GPIO211_LCD_VSI0 PIN_CFG(211, ALT_A) -#define GPIO211_PRCMU_PWRCTRL2 PIN_CFG(211, ALT_B) - -#define GPIO212_GPIO PIN_CFG(212, GPIO) -#define GPIO212_SPI2_CS2n PIN_CFG(212, ALT_A) -#define GPIO212_LCD_HSO PIN_CFG(212, ALT_B) - -#define GPIO213_GPIO PIN_CFG(213, GPIO) -#define GPIO213_SPI2_CS1n PIN_CFG(213, ALT_A) -#define GPIO213_LCD_DE PIN_CFG(213, ALT_B) -#define GPIO213_BUSMON_D16 PIN_CFG(213, ALT_C) - -#define GPIO214_GPIO PIN_CFG(214, GPIO) -#define GPIO214_SPI2_CS0n PIN_CFG(214, ALT_A) -#define GPIO214_LCD_D7 PIN_CFG(214, ALT_B) -#define GPIO214_BUSMON_D17 PIN_CFG(214, ALT_C) - -#define GPIO215_GPIO PIN_CFG(215, GPIO) -#define GPIO215_SPI2_RXD PIN_CFG(215, ALT_A) -#define GPIO215_LCD_D6 PIN_CFG(215, ALT_B) -#define GPIO215_BUSMON_D18 PIN_CFG(215, ALT_C) - -#define GPIO216_GPIO PIN_CFG(216, GPIO) -#define GPIO216_SPI2_CLK PIN_CFG(216, ALT_A) -#define GPIO216_LCD_D5 PIN_CFG(216, ALT_B) - -#define GPIO217_GPIO PIN_CFG(217, GPIO) -#define GPIO217_SPI2_TXD PIN_CFG(217, ALT_A) -#define GPIO217_LCD_D4 PIN_CFG(217, ALT_B) -#define GPIO217_BUSMON_D19 PIN_CFG(217, ALT_C) - -#define GPIO218_GPIO PIN_CFG(218, GPIO) -#define GPIO218_I2C2_SCL PIN_CFG(218, ALT_A) -#define GPIO218_LCD_VSO PIN_CFG(218, ALT_B) - -#define GPIO219_GPIO PIN_CFG(219, GPIO) -#define GPIO219_I2C2_SDA PIN_CFG(219, ALT_A) -#define GPIO219_LCD_D3 PIN_CFG(219, ALT_B) - -#define GPIO220_GPIO PIN_CFG(220, GPIO) -#define GPIO220_MSP2_TCK PIN_CFG(220, ALT_A) -#define GPIO220_LCD_D2 PIN_CFG(220, ALT_B) - -#define GPIO221_GPIO PIN_CFG(221, GPIO) -#define GPIO221_MSP2_TFS PIN_CFG(221, ALT_A) -#define GPIO221_LCD_D1 PIN_CFG(221, ALT_B) - -#define GPIO222_GPIO PIN_CFG(222, GPIO) -#define GPIO222_MSP2_TXD PIN_CFG(222, ALT_A) -#define GPIO222_LCD_D0 PIN_CFG(222, ALT_B) - -#define GPIO223_GPIO PIN_CFG(223, GPIO) -#define GPIO223_MSP2_RXD PIN_CFG(223, ALT_A) -#define GPIO223_LCD_CLK PIN_CFG(223, ALT_B) - -#define GPIO224_GPIO PIN_CFG(224, GPIO) -#define GPIO224_PRCMU_PWRCTRL0 PIN_CFG(224, ALT_A) -#define GPIO224_LCD_VSI1 PIN_CFG(224, ALT_B) - -#define GPIO225_GPIO PIN_CFG(225, GPIO) -#define GPIO225_PRCMU_PWRCTRL1 PIN_CFG(225, ALT_A) -#define GPIO225_IRDA_RXD PIN_CFG(225, ALT_B) - -#define GPIO226_GPIO PIN_CFG(226, GPIO) -#define GPIO226_PRCMU_PWRCTRL2 PIN_CFG(226, ALT_A) -#define GPIO226_IRRC_DAT PIN_CFG(226, ALT_B) - -#define GPIO227_GPIO PIN_CFG(227, GPIO) -#define GPIO227_IRRC_DAT PIN_CFG(227, ALT_A) -#define GPIO227_IRDA_TXD PIN_CFG(227, ALT_B) - -#endif diff --git a/trunk/arch/arm/mach-ux500/pins-db8500.h b/trunk/arch/arm/mach-ux500/pins-db8500.h index 66f8761cc823..9055d5d3233c 100644 --- a/trunk/arch/arm/mach-ux500/pins-db8500.h +++ b/trunk/arch/arm/mach-ux500/pins-db8500.h @@ -96,57 +96,57 @@ #define GPIO17_SLIM0_CLK PIN_CFG(17, ALT_C) #define GPIO18_GPIO PIN_CFG(18, GPIO) -#define GPIO18_MC0_CMDDIR PIN_CFG_PULL(18, ALT_A, UP) +#define GPIO18_MC0_CMDDIR PIN_CFG(18, ALT_A) #define GPIO18_U2_RXD PIN_CFG(18, ALT_B) #define GPIO18_MS_IEP PIN_CFG(18, ALT_C) #define GPIO19_GPIO PIN_CFG(19, GPIO) -#define GPIO19_MC0_DAT0DIR PIN_CFG_PULL(19, ALT_A, UP) +#define GPIO19_MC0_DAT0DIR PIN_CFG(19, ALT_A) #define GPIO19_U2_TXD PIN_CFG(19, ALT_B) #define GPIO19_MS_DAT0DIR PIN_CFG(19, ALT_C) #define GPIO20_GPIO PIN_CFG(20, GPIO) -#define GPIO20_MC0_DAT2DIR PIN_CFG_PULL(20, ALT_A, UP) +#define GPIO20_MC0_DAT2DIR PIN_CFG(20, ALT_A) #define GPIO20_UARTMOD_TXD PIN_CFG(20, ALT_B) #define GPIO20_IP_TRIGOUT PIN_CFG(20, ALT_C) #define GPIO21_GPIO PIN_CFG(21, GPIO) -#define GPIO21_MC0_DAT31DIR PIN_CFG_PULL(21, ALT_A, UP) +#define GPIO21_MC0_DAT31DIR PIN_CFG(21, ALT_A) #define GPIO21_MSP0_SCK PIN_CFG(21, ALT_B) #define GPIO21_MS_DAT31DIR PIN_CFG(21, ALT_C) #define GPIO22_GPIO PIN_CFG(22, GPIO) -#define GPIO22_MC0_FBCLK PIN_CFG_PULL(22, ALT_A, UP) +#define GPIO22_MC0_FBCLK PIN_CFG(22, ALT_A) #define GPIO22_UARTMOD_RXD PIN_CFG(22, ALT_B) #define GPIO22_MS_FBCLK PIN_CFG(22, ALT_C) #define GPIO23_GPIO PIN_CFG(23, GPIO) -#define GPIO23_MC0_CLK PIN_CFG_PULL(23, ALT_A, UP) +#define GPIO23_MC0_CLK PIN_CFG(23, ALT_A) #define GPIO23_STMMOD_CLK PIN_CFG(23, ALT_B) #define GPIO23_MS_CLK PIN_CFG(23, ALT_C) #define GPIO24_GPIO PIN_CFG(24, GPIO) -#define GPIO24_MC0_CMD PIN_CFG_PULL(24, ALT_A, UP) +#define GPIO24_MC0_CMD PIN_CFG(24, ALT_A) #define GPIO24_UARTMOD_RXD PIN_CFG(24, ALT_B) #define GPIO24_MS_BS PIN_CFG(24, ALT_C) #define GPIO25_GPIO PIN_CFG(25, GPIO) -#define GPIO25_MC0_DAT0 PIN_CFG_PULL(25, ALT_A, UP) +#define GPIO25_MC0_DAT0 PIN_CFG(25, ALT_A) #define GPIO25_STMMOD_DAT0 PIN_CFG(25, ALT_B) #define GPIO25_MS_DAT0 PIN_CFG(25, ALT_C) #define GPIO26_GPIO PIN_CFG(26, GPIO) -#define GPIO26_MC0_DAT1 PIN_CFG_PULL(26, ALT_A, UP) +#define GPIO26_MC0_DAT1 PIN_CFG(26, ALT_A) #define GPIO26_STMMOD_DAT1 PIN_CFG(26, ALT_B) #define GPIO26_MS_DAT1 PIN_CFG(26, ALT_C) #define GPIO27_GPIO PIN_CFG(27, GPIO) -#define GPIO27_MC0_DAT2 PIN_CFG_PULL(27, ALT_A, UP) +#define GPIO27_MC0_DAT2 PIN_CFG(27, ALT_A) #define GPIO27_STMMOD_DAT2 PIN_CFG(27, ALT_B) #define GPIO27_MS_DAT2 PIN_CFG(27, ALT_C) #define GPIO28_GPIO PIN_CFG(28, GPIO) -#define GPIO28_MC0_DAT3 PIN_CFG_PULL(28, ALT_A, UP) +#define GPIO28_MC0_DAT3 PIN_CFG(28, ALT_A) #define GPIO28_STMMOD_DAT3 PIN_CFG(28, ALT_B) #define GPIO28_MS_DAT3 PIN_CFG(28, ALT_C) @@ -357,48 +357,48 @@ #define GPIO97_MC5_DAT7 PIN_CFG(97, ALT_C) #define GPIO128_GPIO PIN_CFG(128, GPIO) -#define GPIO128_MC2_CLK PIN_CFG_PULL(128, ALT_A, UP) +#define GPIO128_MC2_CLK PIN_CFG(128, ALT_A) #define GPIO128_SM_CKO PIN_CFG(128, ALT_B) #define GPIO129_GPIO PIN_CFG(129, GPIO) -#define GPIO129_MC2_CMD PIN_CFG_PULL(129, ALT_A, UP) +#define GPIO129_MC2_CMD PIN_CFG(129, ALT_A) #define GPIO129_SM_WAIT0n PIN_CFG(129, ALT_B) #define GPIO130_GPIO PIN_CFG(130, GPIO) -#define GPIO130_MC2_FBCLK PIN_CFG_PULL(130, ALT_A, UP) +#define GPIO130_MC2_FBCLK PIN_CFG(130, ALT_A) #define GPIO130_SM_FBCLK PIN_CFG(130, ALT_B) #define GPIO130_MC2_RSTN PIN_CFG(130, ALT_C) #define GPIO131_GPIO PIN_CFG(131, GPIO) -#define GPIO131_MC2_DAT0 PIN_CFG_PULL(131, ALT_A, UP) +#define GPIO131_MC2_DAT0 PIN_CFG(131, ALT_A) #define GPIO131_SM_ADQ8 PIN_CFG(131, ALT_B) #define GPIO132_GPIO PIN_CFG(132, GPIO) -#define GPIO132_MC2_DAT1 PIN_CFG_PULL(132, ALT_A, UP) +#define GPIO132_MC2_DAT1 PIN_CFG(132, ALT_A) #define GPIO132_SM_ADQ9 PIN_CFG(132, ALT_B) #define GPIO133_GPIO PIN_CFG(133, GPIO) -#define GPIO133_MC2_DAT2 PIN_CFG_PULL(133, ALT_A, UP) +#define GPIO133_MC2_DAT2 PIN_CFG(133, ALT_A) #define GPIO133_SM_ADQ10 PIN_CFG(133, ALT_B) #define GPIO134_GPIO PIN_CFG(134, GPIO) -#define GPIO134_MC2_DAT3 PIN_CFG_PULL(134, ALT_A, UP) +#define GPIO134_MC2_DAT3 PIN_CFG(134, ALT_A) #define GPIO134_SM_ADQ11 PIN_CFG(134, ALT_B) #define GPIO135_GPIO PIN_CFG(135, GPIO) -#define GPIO135_MC2_DAT4 PIN_CFG_PULL(135, ALT_A, UP) +#define GPIO135_MC2_DAT4 PIN_CFG(135, ALT_A) #define GPIO135_SM_ADQ12 PIN_CFG(135, ALT_B) #define GPIO136_GPIO PIN_CFG(136, GPIO) -#define GPIO136_MC2_DAT5 PIN_CFG_PULL(136, ALT_A, UP) +#define GPIO136_MC2_DAT5 PIN_CFG(136, ALT_A) #define GPIO136_SM_ADQ13 PIN_CFG(136, ALT_B) #define GPIO137_GPIO PIN_CFG(137, GPIO) -#define GPIO137_MC2_DAT6 PIN_CFG_PULL(137, ALT_A, UP) +#define GPIO137_MC2_DAT6 PIN_CFG(137, ALT_A) #define GPIO137_SM_ADQ14 PIN_CFG(137, ALT_B) #define GPIO138_GPIO PIN_CFG(138, GPIO) -#define GPIO138_MC2_DAT7 PIN_CFG_PULL(138, ALT_A, UP) +#define GPIO138_MC2_DAT7 PIN_CFG(138, ALT_A) #define GPIO138_SM_ADQ15 PIN_CFG(138, ALT_B) #define GPIO139_GPIO PIN_CFG(139, GPIO) @@ -569,39 +569,39 @@ #define GPIO196_MSP2_RXD PIN_CFG(196, ALT_A) #define GPIO197_GPIO PIN_CFG(197, GPIO) -#define GPIO197_MC4_DAT3 PIN_CFG_PULL(197, ALT_A, UP) +#define GPIO197_MC4_DAT3 PIN_CFG(197, ALT_A) #define GPIO198_GPIO PIN_CFG(198, GPIO) -#define GPIO198_MC4_DAT2 PIN_CFG_PULL(198, ALT_A, UP) +#define GPIO198_MC4_DAT2 PIN_CFG(198, ALT_A) #define GPIO199_GPIO PIN_CFG(199, GPIO) -#define GPIO199_MC4_DAT1 PIN_CFG_PULL(199, ALT_A, UP) +#define GPIO199_MC4_DAT1 PIN_CFG(199, ALT_A) #define GPIO200_GPIO PIN_CFG(200, GPIO) -#define GPIO200_MC4_DAT0 PIN_CFG_PULL(200, ALT_A, UP) +#define GPIO200_MC4_DAT0 PIN_CFG(200, ALT_A) #define GPIO201_GPIO PIN_CFG(201, GPIO) -#define GPIO201_MC4_CMD PIN_CFG_PULL(201, ALT_A, UP) +#define GPIO201_MC4_CMD PIN_CFG(201, ALT_A) #define GPIO202_GPIO PIN_CFG(202, GPIO) -#define GPIO202_MC4_FBCLK PIN_CFG_PULL(202, ALT_A, UP) +#define GPIO202_MC4_FBCLK PIN_CFG(202, ALT_A) #define GPIO202_PWL PIN_CFG(202, ALT_B) #define GPIO202_MC4_RSTN PIN_CFG(202, ALT_C) #define GPIO203_GPIO PIN_CFG(203, GPIO) -#define GPIO203_MC4_CLK PIN_CFG_PULL(203, ALT_A, UP) +#define GPIO203_MC4_CLK PIN_CFG(203, ALT_A) #define GPIO204_GPIO PIN_CFG(204, GPIO) -#define GPIO204_MC4_DAT7 PIN_CFG_PULL(204, ALT_A, UP) +#define GPIO204_MC4_DAT7 PIN_CFG(204, ALT_A) #define GPIO205_GPIO PIN_CFG(205, GPIO) -#define GPIO205_MC4_DAT6 PIN_CFG_PULL(205, ALT_A, UP) +#define GPIO205_MC4_DAT6 PIN_CFG(205, ALT_A) #define GPIO206_GPIO PIN_CFG(206, GPIO) -#define GPIO206_MC4_DAT5 PIN_CFG_PULL(206, ALT_A, UP) +#define GPIO206_MC4_DAT5 PIN_CFG(206, ALT_A) #define GPIO207_GPIO PIN_CFG(207, GPIO) -#define GPIO207_MC4_DAT4 PIN_CFG_PULL(207, ALT_A, UP) +#define GPIO207_MC4_DAT4 PIN_CFG(207, ALT_A) #define GPIO208_GPIO PIN_CFG(208, GPIO) #define GPIO208_MC1_CLK PIN_CFG(208, ALT_A) diff --git a/trunk/arch/arm/mach-ux500/platsmp.c b/trunk/arch/arm/mach-ux500/platsmp.c index 9e4c678de785..438ef16aec90 100644 --- a/trunk/arch/arm/mach-ux500/platsmp.c +++ b/trunk/arch/arm/mach-ux500/platsmp.c @@ -78,8 +78,6 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); outer_clean_range(__pa(&pen_release), __pa(&pen_release) + 1); - smp_cross_call(cpumask_of(cpu)); - timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { if (pen_release == -1) diff --git a/trunk/arch/arm/mach-ux500/prcmu.c b/trunk/arch/arm/mach-ux500/prcmu.c deleted file mode 100644 index 293274d1342a..000000000000 --- a/trunk/arch/arm/mach-ux500/prcmu.c +++ /dev/null @@ -1,231 +0,0 @@ -/* - * Copyright (C) ST Ericsson SA 2010 - * - * License Terms: GNU General Public License v2 - * Author: Mattias Nilsson - * - * U8500 PRCMU driver. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define PRCMU_TCDM_BASE __io_address(U8500_PRCMU_TCDM_BASE) - -#define REQ_MB5 (PRCMU_TCDM_BASE + 0xE44) -#define ACK_MB5 (PRCMU_TCDM_BASE + 0xDF4) - -#define REQ_MB5_I2C_SLAVE_OP (REQ_MB5) -#define REQ_MB5_I2C_HW_BITS (REQ_MB5 + 1) -#define REQ_MB5_I2C_REG (REQ_MB5 + 2) -#define REQ_MB5_I2C_VAL (REQ_MB5 + 3) - -#define ACK_MB5_I2C_STATUS (ACK_MB5 + 1) -#define ACK_MB5_I2C_VAL (ACK_MB5 + 3) - -#define I2C_WRITE(slave) ((slave) << 1) -#define I2C_READ(slave) (((slave) << 1) | BIT(0)) -#define I2C_STOP_EN BIT(3) - -enum ack_mb5_status { - I2C_WR_OK = 0x01, - I2C_RD_OK = 0x02, -}; - -#define MBOX_BIT BIT -#define NUM_MBOX 8 - -static struct { - struct mutex lock; - struct completion work; - bool failed; - struct { - u8 status; - u8 value; - } ack; -} mb5_transfer; - -/** - * prcmu_abb_read() - Read register value(s) from the ABB. - * @slave: The I2C slave address. - * @reg: The (start) register address. - * @value: The read out value(s). - * @size: The number of registers to read. - * - * Reads register value(s) from the ABB. - * @size has to be 1 for the current firmware version. - */ -int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size) -{ - int r; - - if (size != 1) - return -EINVAL; - - r = mutex_lock_interruptible(&mb5_transfer.lock); - if (r) - return r; - - while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5)) - cpu_relax(); - - writeb(I2C_READ(slave), REQ_MB5_I2C_SLAVE_OP); - writeb(I2C_STOP_EN, REQ_MB5_I2C_HW_BITS); - writeb(reg, REQ_MB5_I2C_REG); - - writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET); - if (!wait_for_completion_timeout(&mb5_transfer.work, - msecs_to_jiffies(500))) { - pr_err("prcmu: prcmu_abb_read timed out.\n"); - r = -EIO; - goto unlock_and_return; - } - r = ((mb5_transfer.ack.status == I2C_RD_OK) ? 0 : -EIO); - if (!r) - *value = mb5_transfer.ack.value; - -unlock_and_return: - mutex_unlock(&mb5_transfer.lock); - return r; -} -EXPORT_SYMBOL(prcmu_abb_read); - -/** - * prcmu_abb_write() - Write register value(s) to the ABB. - * @slave: The I2C slave address. - * @reg: The (start) register address. - * @value: The value(s) to write. - * @size: The number of registers to write. - * - * Reads register value(s) from the ABB. - * @size has to be 1 for the current firmware version. - */ -int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size) -{ - int r; - - if (size != 1) - return -EINVAL; - - r = mutex_lock_interruptible(&mb5_transfer.lock); - if (r) - return r; - - - while (readl(PRCM_MBOX_CPU_VAL) & MBOX_BIT(5)) - cpu_relax(); - - writeb(I2C_WRITE(slave), REQ_MB5_I2C_SLAVE_OP); - writeb(I2C_STOP_EN, REQ_MB5_I2C_HW_BITS); - writeb(reg, REQ_MB5_I2C_REG); - writeb(*value, REQ_MB5_I2C_VAL); - - writel(MBOX_BIT(5), PRCM_MBOX_CPU_SET); - if (!wait_for_completion_timeout(&mb5_transfer.work, - msecs_to_jiffies(500))) { - pr_err("prcmu: prcmu_abb_write timed out.\n"); - r = -EIO; - goto unlock_and_return; - } - r = ((mb5_transfer.ack.status == I2C_WR_OK) ? 0 : -EIO); - -unlock_and_return: - mutex_unlock(&mb5_transfer.lock); - return r; -} -EXPORT_SYMBOL(prcmu_abb_write); - -static void read_mailbox_0(void) -{ - writel(MBOX_BIT(0), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_1(void) -{ - writel(MBOX_BIT(1), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_2(void) -{ - writel(MBOX_BIT(2), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_3(void) -{ - writel(MBOX_BIT(3), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_4(void) -{ - writel(MBOX_BIT(4), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_5(void) -{ - mb5_transfer.ack.status = readb(ACK_MB5_I2C_STATUS); - mb5_transfer.ack.value = readb(ACK_MB5_I2C_VAL); - complete(&mb5_transfer.work); - writel(MBOX_BIT(5), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_6(void) -{ - writel(MBOX_BIT(6), PRCM_ARM_IT1_CLEAR); -} - -static void read_mailbox_7(void) -{ - writel(MBOX_BIT(7), PRCM_ARM_IT1_CLEAR); -} - -static void (* const read_mailbox[NUM_MBOX])(void) = { - read_mailbox_0, - read_mailbox_1, - read_mailbox_2, - read_mailbox_3, - read_mailbox_4, - read_mailbox_5, - read_mailbox_6, - read_mailbox_7 -}; - -static irqreturn_t prcmu_irq_handler(int irq, void *data) -{ - u32 bits; - u8 n; - - bits = (readl(PRCM_ARM_IT1_VAL) & (MBOX_BIT(NUM_MBOX) - 1)); - if (unlikely(!bits)) - return IRQ_NONE; - - for (n = 0; bits; n++) { - if (bits & MBOX_BIT(n)) { - bits -= MBOX_BIT(n); - read_mailbox[n](); - } - } - return IRQ_HANDLED; -} - -static int __init prcmu_init(void) -{ - mutex_init(&mb5_transfer.lock); - init_completion(&mb5_transfer.work); - - /* Clean up the mailbox interrupts after pre-kernel code. */ - writel((MBOX_BIT(NUM_MBOX) - 1), PRCM_ARM_IT1_CLEAR); - - return request_irq(IRQ_PRCMU, prcmu_irq_handler, 0, "prcmu", NULL); -} - -arch_initcall(prcmu_init); diff --git a/trunk/arch/arm/mach-ux500/ste-dma40-db5500.h b/trunk/arch/arm/mach-ux500/ste-dma40-db5500.h deleted file mode 100644 index cb2110c32858..000000000000 --- a/trunk/arch/arm/mach-ux500/ste-dma40-db5500.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * Author: Rabin Vincent for ST-Ericsson - * License terms: GNU General Public License (GPL) version 2 - * - * DB5500-SoC-specific configuration for DMA40 - */ - -#ifndef STE_DMA40_DB5500_H -#define STE_DMA40_DB5500_H - -#define DB5500_DMA_NR_DEV 64 - -enum dma_src_dev_type { - DB5500_DMA_DEV0_SPI0_RX = 0, - DB5500_DMA_DEV1_SPI1_RX = 1, - DB5500_DMA_DEV2_SPI2_RX = 2, - DB5500_DMA_DEV3_SPI3_RX = 3, - DB5500_DMA_DEV4_USB_OTG_IEP_1_9 = 4, - DB5500_DMA_DEV5_USB_OTG_IEP_2_10 = 5, - DB5500_DMA_DEV6_USB_OTG_IEP_3_11 = 6, - DB5500_DMA_DEV7_IRDA_RFS = 7, - DB5500_DMA_DEV8_IRDA_FIFO_RX = 8, - DB5500_DMA_DEV9_MSP0_RX = 9, - DB5500_DMA_DEV10_MSP1_RX = 10, - DB5500_DMA_DEV11_MSP2_RX = 11, - DB5500_DMA_DEV12_UART0_RX = 12, - DB5500_DMA_DEV13_UART1_RX = 13, - DB5500_DMA_DEV14_UART2_RX = 14, - DB5500_DMA_DEV15_UART3_RX = 15, - DB5500_DMA_DEV16_USB_OTG_IEP_8 = 16, - DB5500_DMA_DEV17_USB_OTG_IEP_1_9 = 17, - DB5500_DMA_DEV18_USB_OTG_IEP_2_10 = 18, - DB5500_DMA_DEV19_USB_OTG_IEP_3_11 = 19, - DB5500_DMA_DEV20_USB_OTG_IEP_4_12 = 20, - DB5500_DMA_DEV21_USB_OTG_IEP_5_13 = 21, - DB5500_DMA_DEV22_USB_OTG_IEP_6_14 = 22, - DB5500_DMA_DEV23_USB_OTG_IEP_7_15 = 23, - DB5500_DMA_DEV24_SDMMC0_RX = 24, - DB5500_DMA_DEV25_SDMMC1_RX = 25, - DB5500_DMA_DEV26_SDMMC2_RX = 26, - DB5500_DMA_DEV27_SDMMC3_RX = 27, - DB5500_DMA_DEV28_SDMMC4_RX = 28, - /* 29 - 32 not used */ - DB5500_DMA_DEV33_SDMMC0_RX = 33, - DB5500_DMA_DEV34_SDMMC1_RX = 34, - DB5500_DMA_DEV35_SDMMC2_RX = 35, - DB5500_DMA_DEV36_SDMMC3_RX = 36, - DB5500_DMA_DEV37_SDMMC4_RX = 37, - DB5500_DMA_DEV38_USB_OTG_IEP_8 = 38, - DB5500_DMA_DEV39_USB_OTG_IEP_1_9 = 39, - DB5500_DMA_DEV40_USB_OTG_IEP_2_10 = 40, - DB5500_DMA_DEV41_USB_OTG_IEP_3_11 = 41, - DB5500_DMA_DEV42_USB_OTG_IEP_4_12 = 42, - DB5500_DMA_DEV43_USB_OTG_IEP_5_13 = 43, - DB5500_DMA_DEV44_USB_OTG_IEP_6_14 = 44, - DB5500_DMA_DEV45_USB_OTG_IEP_7_15 = 45, - /* 46 not used */ - DB5500_DMA_DEV47_MCDE_RX = 47, - DB5500_DMA_DEV48_CRYPTO1_RX = 48, - /* 49, 50 not used */ - DB5500_DMA_DEV49_I2C1_RX = 51, - DB5500_DMA_DEV50_I2C3_RX = 52, - DB5500_DMA_DEV51_I2C2_RX = 53, - /* 54 - 60 not used */ - DB5500_DMA_DEV61_CRYPTO0_RX = 61, - /* 62, 63 not used */ -}; - -enum dma_dest_dev_type { - DB5500_DMA_DEV0_SPI0_TX = 0, - DB5500_DMA_DEV1_SPI1_TX = 1, - DB5500_DMA_DEV2_SPI2_TX = 2, - DB5500_DMA_DEV3_SPI3_TX = 3, - DB5500_DMA_DEV4_USB_OTG_OEP_1_9 = 4, - DB5500_DMA_DEV5_USB_OTG_OEP_2_10 = 5, - DB5500_DMA_DEV6_USB_OTG_OEP_3_11 = 6, - DB5500_DMA_DEV7_IRRC_TX = 7, - DB5500_DMA_DEV8_IRDA_FIFO_TX = 8, - DB5500_DMA_DEV9_MSP0_TX = 9, - DB5500_DMA_DEV10_MSP1_TX = 10, - DB5500_DMA_DEV11_MSP2_TX = 11, - DB5500_DMA_DEV12_UART0_TX = 12, - DB5500_DMA_DEV13_UART1_TX = 13, - DB5500_DMA_DEV14_UART2_TX = 14, - DB5500_DMA_DEV15_UART3_TX = 15, - DB5500_DMA_DEV16_USB_OTG_OEP_8 = 16, - DB5500_DMA_DEV17_USB_OTG_OEP_1_9 = 17, - DB5500_DMA_DEV18_USB_OTG_OEP_2_10 = 18, - DB5500_DMA_DEV19_USB_OTG_OEP_3_11 = 19, - DB5500_DMA_DEV20_USB_OTG_OEP_4_12 = 20, - DB5500_DMA_DEV21_USB_OTG_OEP_5_13 = 21, - DB5500_DMA_DEV22_USB_OTG_OEP_6_14 = 22, - DB5500_DMA_DEV23_USB_OTG_OEP_7_15 = 23, - DB5500_DMA_DEV24_SDMMC0_TX = 24, - DB5500_DMA_DEV25_SDMMC1_TX = 25, - DB5500_DMA_DEV26_SDMMC2_TX = 26, - DB5500_DMA_DEV27_SDMMC3_TX = 27, - DB5500_DMA_DEV28_SDMMC4_TX = 28, - /* 29 - 31 not used */ - DB5500_DMA_DEV32_FSMC_TX = 32, - DB5500_DMA_DEV33_SDMMC0_TX = 33, - DB5500_DMA_DEV34_SDMMC1_TX = 34, - DB5500_DMA_DEV35_SDMMC2_TX = 35, - DB5500_DMA_DEV36_SDMMC3_TX = 36, - DB5500_DMA_DEV37_SDMMC4_TX = 37, - DB5500_DMA_DEV38_USB_OTG_OEP_8 = 38, - DB5500_DMA_DEV39_USB_OTG_OEP_1_9 = 39, - DB5500_DMA_DEV40_USB_OTG_OEP_2_10 = 40, - DB5500_DMA_DEV41_USB_OTG_OEP_3_11 = 41, - DB5500_DMA_DEV42_USB_OTG_OEP_4_12 = 42, - DB5500_DMA_DEV43_USB_OTG_OEP_5_13 = 43, - DB5500_DMA_DEV44_USB_OTG_OEP_6_14 = 44, - DB5500_DMA_DEV45_USB_OTG_OEP_7_15 = 45, - /* 46 not used */ - DB5500_DMA_DEV47_STM_TX = 47, - DB5500_DMA_DEV48_CRYPTO1_TX = 48, - DB5500_DMA_DEV49_CRYPTO1_TX_HASH1_TX = 49, - DB5500_DMA_DEV50_HASH1_TX = 50, - DB5500_DMA_DEV51_I2C1_TX = 51, - DB5500_DMA_DEV52_I2C3_TX = 52, - DB5500_DMA_DEV53_I2C2_TX = 53, - /* 54, 55 not used */ - DB5500_DMA_MEMCPY_TX_1 = 56, - DB5500_DMA_MEMCPY_TX_2 = 57, - DB5500_DMA_MEMCPY_TX_3 = 58, - DB5500_DMA_MEMCPY_TX_4 = 59, - DB5500_DMA_MEMCPY_TX_5 = 60, - DB5500_DMA_DEV61_CRYPTO0_TX = 61, - DB5500_DMA_DEV62_CRYPTO0_TX_HASH0_TX = 62, - DB5500_DMA_DEV63_HASH0_TX = 63, -}; - -#endif diff --git a/trunk/arch/arm/mach-ux500/ste-dma40-db8500.h b/trunk/arch/arm/mach-ux500/ste-dma40-db8500.h index a616419bea76..9d9d3797b3b0 100644 --- a/trunk/arch/arm/mach-ux500/ste-dma40-db8500.h +++ b/trunk/arch/arm/mach-ux500/ste-dma40-db8500.h @@ -10,135 +10,145 @@ #ifndef STE_DMA40_DB8500_H #define STE_DMA40_DB8500_H -#define DB8500_DMA_NR_DEV 64 +#define STEDMA40_NR_DEV 64 enum dma_src_dev_type { - DB8500_DMA_DEV0_SPI0_RX = 0, - DB8500_DMA_DEV1_SD_MMC0_RX = 1, - DB8500_DMA_DEV2_SD_MMC1_RX = 2, - DB8500_DMA_DEV3_SD_MMC2_RX = 3, - DB8500_DMA_DEV4_I2C1_RX = 4, - DB8500_DMA_DEV5_I2C3_RX = 5, - DB8500_DMA_DEV6_I2C2_RX = 6, - DB8500_DMA_DEV7_I2C4_RX = 7, /* Only on V1 and later */ - DB8500_DMA_DEV8_SSP0_RX = 8, - DB8500_DMA_DEV9_SSP1_RX = 9, - DB8500_DMA_DEV10_MCDE_RX = 10, - DB8500_DMA_DEV11_UART2_RX = 11, - DB8500_DMA_DEV12_UART1_RX = 12, - DB8500_DMA_DEV13_UART0_RX = 13, - DB8500_DMA_DEV14_MSP2_RX = 14, - DB8500_DMA_DEV15_I2C0_RX = 15, - DB8500_DMA_DEV16_USB_OTG_IEP_7_15 = 16, - DB8500_DMA_DEV17_USB_OTG_IEP_6_14 = 17, - DB8500_DMA_DEV18_USB_OTG_IEP_5_13 = 18, - DB8500_DMA_DEV19_USB_OTG_IEP_4_12 = 19, - DB8500_DMA_DEV20_SLIM0_CH0_RX_HSI_RX_CH0 = 20, - DB8500_DMA_DEV21_SLIM0_CH1_RX_HSI_RX_CH1 = 21, - DB8500_DMA_DEV22_SLIM0_CH2_RX_HSI_RX_CH2 = 22, - DB8500_DMA_DEV23_SLIM0_CH3_RX_HSI_RX_CH3 = 23, - DB8500_DMA_DEV24_SRC_SXA0_RX_TX = 24, - DB8500_DMA_DEV25_SRC_SXA1_RX_TX = 25, - DB8500_DMA_DEV26_SRC_SXA2_RX_TX = 26, - DB8500_DMA_DEV27_SRC_SXA3_RX_TX = 27, - DB8500_DMA_DEV28_SD_MM2_RX = 28, - DB8500_DMA_DEV29_SD_MM0_RX = 29, - DB8500_DMA_DEV30_MSP1_RX = 30, - /* On DB8500v2, MSP3 RX replaces MSP1 RX */ - DB8500_DMA_DEV30_MSP3_RX = 30, - DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX = 31, - DB8500_DMA_DEV32_SD_MM1_RX = 32, - DB8500_DMA_DEV33_SPI2_RX = 33, - DB8500_DMA_DEV34_I2C3_RX2 = 34, - DB8500_DMA_DEV35_SPI1_RX = 35, - DB8500_DMA_DEV36_USB_OTG_IEP_3_11 = 36, - DB8500_DMA_DEV37_USB_OTG_IEP_2_10 = 37, - DB8500_DMA_DEV38_USB_OTG_IEP_1_9 = 38, - DB8500_DMA_DEV39_USB_OTG_IEP_8 = 39, - DB8500_DMA_DEV40_SPI3_RX = 40, - DB8500_DMA_DEV41_SD_MM3_RX = 41, - DB8500_DMA_DEV42_SD_MM4_RX = 42, - DB8500_DMA_DEV43_SD_MM5_RX = 43, - DB8500_DMA_DEV44_SRC_SXA4_RX_TX = 44, - DB8500_DMA_DEV45_SRC_SXA5_RX_TX = 45, - DB8500_DMA_DEV46_SLIM0_CH8_RX_SRC_SXA6_RX_TX = 46, - DB8500_DMA_DEV47_SLIM0_CH9_RX_SRC_SXA7_RX_TX = 47, - DB8500_DMA_DEV48_CAC1_RX = 48, - /* 49, 50 and 51 are not used */ - DB8500_DMA_DEV52_SLIM0_CH4_RX_HSI_RX_CH4 = 52, - DB8500_DMA_DEV53_SLIM0_CH5_RX_HSI_RX_CH5 = 53, - DB8500_DMA_DEV54_SLIM0_CH6_RX_HSI_RX_CH6 = 54, - DB8500_DMA_DEV55_SLIM0_CH7_RX_HSI_RX_CH7 = 55, - /* 56, 57, 58, 59 and 60 are not used */ - DB8500_DMA_DEV61_CAC0_RX = 61, - /* 62 and 63 are not used */ + STEDMA40_DEV_SPI0_RX = 0, + STEDMA40_DEV_SD_MMC0_RX = 1, + STEDMA40_DEV_SD_MMC1_RX = 2, + STEDMA40_DEV_SD_MMC2_RX = 3, + STEDMA40_DEV_I2C1_RX = 4, + STEDMA40_DEV_I2C3_RX = 5, + STEDMA40_DEV_I2C2_RX = 6, + STEDMA40_DEV_I2C4_RX = 7, /* Only on V1 */ + STEDMA40_DEV_SSP0_RX = 8, + STEDMA40_DEV_SSP1_RX = 9, + STEDMA40_DEV_MCDE_RX = 10, + STEDMA40_DEV_UART2_RX = 11, + STEDMA40_DEV_UART1_RX = 12, + STEDMA40_DEV_UART0_RX = 13, + STEDMA40_DEV_MSP2_RX = 14, + STEDMA40_DEV_I2C0_RX = 15, + STEDMA40_DEV_USB_OTG_IEP_8 = 16, + STEDMA40_DEV_USB_OTG_IEP_1_9 = 17, + STEDMA40_DEV_USB_OTG_IEP_2_10 = 18, + STEDMA40_DEV_USB_OTG_IEP_3_11 = 19, + STEDMA40_DEV_SLIM0_CH0_RX_HSI_RX_CH0 = 20, + STEDMA40_DEV_SLIM0_CH1_RX_HSI_RX_CH1 = 21, + STEDMA40_DEV_SLIM0_CH2_RX_HSI_RX_CH2 = 22, + STEDMA40_DEV_SLIM0_CH3_RX_HSI_RX_CH3 = 23, + STEDMA40_DEV_SRC_SXA0_RX_TX = 24, + STEDMA40_DEV_SRC_SXA1_RX_TX = 25, + STEDMA40_DEV_SRC_SXA2_RX_TX = 26, + STEDMA40_DEV_SRC_SXA3_RX_TX = 27, + STEDMA40_DEV_SD_MM2_RX = 28, + STEDMA40_DEV_SD_MM0_RX = 29, + STEDMA40_DEV_MSP1_RX = 30, + /* + * This channel is either SlimBus or MSP, + * never both at the same time. + */ + STEDMA40_SLIM0_CH0_RX = 31, + STEDMA40_DEV_MSP0_RX = 31, + STEDMA40_DEV_SD_MM1_RX = 32, + STEDMA40_DEV_SPI2_RX = 33, + STEDMA40_DEV_I2C3_RX2 = 34, + STEDMA40_DEV_SPI1_RX = 35, + STEDMA40_DEV_USB_OTG_IEP_4_12 = 36, + STEDMA40_DEV_USB_OTG_IEP_5_13 = 37, + STEDMA40_DEV_USB_OTG_IEP_6_14 = 38, + STEDMA40_DEV_USB_OTG_IEP_7_15 = 39, + STEDMA40_DEV_SPI3_RX = 40, + STEDMA40_DEV_SD_MM3_RX = 41, + STEDMA40_DEV_SD_MM4_RX = 42, + STEDMA40_DEV_SD_MM5_RX = 43, + STEDMA40_DEV_SRC_SXA4_RX_TX = 44, + STEDMA40_DEV_SRC_SXA5_RX_TX = 45, + STEDMA40_DEV_SRC_SXA6_RX_TX = 46, + STEDMA40_DEV_SRC_SXA7_RX_TX = 47, + STEDMA40_DEV_CAC1_RX = 48, + /* RX channels 49 and 50 are unused */ + STEDMA40_DEV_MSHC_RX = 51, + STEDMA40_DEV_SLIM1_CH0_RX_HSI_RX_CH4 = 52, + STEDMA40_DEV_SLIM1_CH1_RX_HSI_RX_CH5 = 53, + STEDMA40_DEV_SLIM1_CH2_RX_HSI_RX_CH6 = 54, + STEDMA40_DEV_SLIM1_CH3_RX_HSI_RX_CH7 = 55, + /* RX channels 56 thru 60 are unused */ + STEDMA40_DEV_CAC0_RX = 61, + /* RX channels 62 and 63 are unused */ }; enum dma_dest_dev_type { - DB8500_DMA_DEV0_SPI0_TX = 0, - DB8500_DMA_DEV1_SD_MMC0_TX = 1, - DB8500_DMA_DEV2_SD_MMC1_TX = 2, - DB8500_DMA_DEV3_SD_MMC2_TX = 3, - DB8500_DMA_DEV4_I2C1_TX = 4, - DB8500_DMA_DEV5_I2C3_TX = 5, - DB8500_DMA_DEV6_I2C2_TX = 6, - DB8500_DMA_DEV7_I2C4_TX = 7, /* Only on V1 and later */ - DB8500_DMA_DEV8_SSP0_TX = 8, - DB8500_DMA_DEV9_SSP1_TX = 9, - /* 10 is not used*/ - DB8500_DMA_DEV11_UART2_TX = 11, - DB8500_DMA_DEV12_UART1_TX = 12, - DB8500_DMA_DEV13_UART0_TX = 13, - DB8500_DMA_DEV14_MSP2_TX = 14, - DB8500_DMA_DEV15_I2C0_TX = 15, - DB8500_DMA_DEV16_USB_OTG_OEP_7_15 = 16, - DB8500_DMA_DEV17_USB_OTG_OEP_6_14 = 17, - DB8500_DMA_DEV18_USB_OTG_OEP_5_13 = 18, - DB8500_DMA_DEV19_USB_OTG_OEP_4_12 = 19, - DB8500_DMA_DEV20_SLIM0_CH0_TX_HSI_TX_CH0 = 20, - DB8500_DMA_DEV21_SLIM0_CH1_TX_HSI_TX_CH1 = 21, - DB8500_DMA_DEV22_SLIM0_CH2_TX_HSI_TX_CH2 = 22, - DB8500_DMA_DEV23_SLIM0_CH3_TX_HSI_TX_CH3 = 23, - DB8500_DMA_DEV24_DST_SXA0_RX_TX = 24, - DB8500_DMA_DEV25_DST_SXA1_RX_TX = 25, - DB8500_DMA_DEV26_DST_SXA2_RX_TX = 26, - DB8500_DMA_DEV27_DST_SXA3_RX_TX = 27, - DB8500_DMA_DEV28_SD_MM2_TX = 28, - DB8500_DMA_DEV29_SD_MM0_TX = 29, - DB8500_DMA_DEV30_MSP1_TX = 30, - DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX = 31, - DB8500_DMA_DEV32_SD_MM1_TX = 32, - DB8500_DMA_DEV33_SPI2_TX = 33, - DB8500_DMA_DEV34_I2C3_TX2 = 34, - DB8500_DMA_DEV35_SPI1_TX = 35, - DB8500_DMA_DEV36_USB_OTG_OEP_3_11 = 36, - DB8500_DMA_DEV37_USB_OTG_OEP_2_10 = 37, - DB8500_DMA_DEV38_USB_OTG_OEP_1_9 = 38, - DB8500_DMA_DEV39_USB_OTG_OEP_8 = 39, - DB8500_DMA_DEV40_SPI3_TX = 40, - DB8500_DMA_DEV41_SD_MM3_TX = 41, - DB8500_DMA_DEV42_SD_MM4_TX = 42, - DB8500_DMA_DEV43_SD_MM5_TX = 43, - DB8500_DMA_DEV44_DST_SXA4_RX_TX = 44, - DB8500_DMA_DEV45_DST_SXA5_RX_TX = 45, - DB8500_DMA_DEV46_SLIM0_CH8_TX_DST_SXA6_RX_TX = 46, - DB8500_DMA_DEV47_SLIM0_CH9_TX_DST_SXA7_RX_TX = 47, - DB8500_DMA_DEV48_CAC1_TX = 48, - DB8500_DMA_DEV49_CAC1_TX_HAC1_TX = 49, - DB8500_DMA_DEV50_HAC1_TX = 50, - DB8500_DMA_MEMCPY_TX_0 = 51, - DB8500_DMA_DEV52_SLIM1_CH4_TX_HSI_TX_CH4 = 52, - DB8500_DMA_DEV53_SLIM1_CH5_TX_HSI_TX_CH5 = 53, - DB8500_DMA_DEV54_SLIM1_CH6_TX_HSI_TX_CH6 = 54, - DB8500_DMA_DEV55_SLIM1_CH7_TX_HSI_TX_CH7 = 55, - DB8500_DMA_MEMCPY_TX_1 = 56, - DB8500_DMA_MEMCPY_TX_2 = 57, - DB8500_DMA_MEMCPY_TX_3 = 58, - DB8500_DMA_MEMCPY_TX_4 = 59, - DB8500_DMA_MEMCPY_TX_5 = 60, - DB8500_DMA_DEV61_CAC0_TX = 61, - DB8500_DMA_DEV62_CAC0_TX_HAC0_TX = 62, - DB8500_DMA_DEV63_HAC0_TX = 63, + STEDMA40_DEV_SPI0_TX = 0, + STEDMA40_DEV_SD_MMC0_TX = 1, + STEDMA40_DEV_SD_MMC1_TX = 2, + STEDMA40_DEV_SD_MMC2_TX = 3, + STEDMA40_DEV_I2C1_TX = 4, + STEDMA40_DEV_I2C3_TX = 5, + STEDMA40_DEV_I2C2_TX = 6, + STEDMA50_DEV_I2C4_TX = 7, /* Only on V1 */ + STEDMA40_DEV_SSP0_TX = 8, + STEDMA40_DEV_SSP1_TX = 9, + /* TX channel 10 is unused */ + STEDMA40_DEV_UART2_TX = 11, + STEDMA40_DEV_UART1_TX = 12, + STEDMA40_DEV_UART0_TX= 13, + STEDMA40_DEV_MSP2_TX = 14, + STEDMA40_DEV_I2C0_TX = 15, + STEDMA40_DEV_USB_OTG_OEP_8 = 16, + STEDMA40_DEV_USB_OTG_OEP_1_9 = 17, + STEDMA40_DEV_USB_OTG_OEP_2_10= 18, + STEDMA40_DEV_USB_OTG_OEP_3_11 = 19, + STEDMA40_DEV_SLIM0_CH0_TX_HSI_TX_CH0 = 20, + STEDMA40_DEV_SLIM0_CH1_TX_HSI_TX_CH1 = 21, + STEDMA40_DEV_SLIM0_CH2_TX_HSI_TX_CH2 = 22, + STEDMA40_DEV_SLIM0_CH3_TX_HSI_TX_CH3 = 23, + STEDMA40_DEV_DST_SXA0_RX_TX = 24, + STEDMA40_DEV_DST_SXA1_RX_TX = 25, + STEDMA40_DEV_DST_SXA2_RX_TX = 26, + STEDMA40_DEV_DST_SXA3_RX_TX = 27, + STEDMA40_DEV_SD_MM2_TX = 28, + STEDMA40_DEV_SD_MM0_TX = 29, + STEDMA40_DEV_MSP1_TX = 30, + /* + * This channel is either SlimBus or MSP, + * never both at the same time. + */ + STEDMA40_SLIM0_CH0_TX = 31, + STEDMA40_DEV_MSP0_TX = 31, + STEDMA40_DEV_SD_MM1_TX = 32, + STEDMA40_DEV_SPI2_TX = 33, + /* Secondary I2C3 channel */ + STEDMA40_DEV_I2C3_TX2 = 34, + STEDMA40_DEV_SPI1_TX = 35, + STEDMA40_DEV_USB_OTG_OEP_4_12 = 36, + STEDMA40_DEV_USB_OTG_OEP_5_13 = 37, + STEDMA40_DEV_USB_OTG_OEP_6_14 = 38, + STEDMA40_DEV_USB_OTG_OEP_7_15 = 39, + STEDMA40_DEV_SPI3_TX = 40, + STEDMA40_DEV_SD_MM3_TX = 41, + STEDMA40_DEV_SD_MM4_TX = 42, + STEDMA40_DEV_SD_MM5_TX = 43, + STEDMA40_DEV_DST_SXA4_RX_TX = 44, + STEDMA40_DEV_DST_SXA5_RX_TX = 45, + STEDMA40_DEV_DST_SXA6_RX_TX = 46, + STEDMA40_DEV_DST_SXA7_RX_TX = 47, + STEDMA40_DEV_CAC1_TX = 48, + STEDMA40_DEV_CAC1_TX_HAC1_TX = 49, + STEDMA40_DEV_HAC1_TX = 50, + STEDMA40_MEMCPY_TX_0 = 51, + STEDMA40_DEV_SLIM1_CH0_TX_HSI_TX_CH4 = 52, + STEDMA40_DEV_SLIM1_CH1_TX_HSI_TX_CH5 = 53, + STEDMA40_DEV_SLIM1_CH2_TX_HSI_TX_CH6 = 54, + STEDMA40_DEV_SLIM1_CH3_TX_HSI_TX_CH7 = 55, + STEDMA40_MEMCPY_TX_1 = 56, + STEDMA40_MEMCPY_TX_2 = 57, + STEDMA40_MEMCPY_TX_3 = 58, + STEDMA40_MEMCPY_TX_4 = 59, + STEDMA40_MEMCPY_TX_5 = 60, + STEDMA40_DEV_CAC0_TX = 61, + STEDMA40_DEV_CAC0_TX_HAC0_TX = 62, + STEDMA40_DEV_HAC0_TX = 63, }; #endif diff --git a/trunk/arch/arm/mach-vexpress/ct-ca9x4.c b/trunk/arch/arm/mach-vexpress/ct-ca9x4.c index efb127022d42..577df6cccb08 100644 --- a/trunk/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/trunk/arch/arm/mach-vexpress/ct-ca9x4.c @@ -227,13 +227,7 @@ static void ct_ca9x4_init(void) int i; #ifdef CONFIG_CACHE_L2X0 - void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC); - - /* set RAM latencies to 1 cycle for this core tile. */ - writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL); - writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL); - - l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); + l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff); #endif clkdev_add_table(lookups, ARRAY_SIZE(lookups)); diff --git a/trunk/arch/arm/mach-vexpress/include/mach/smp.h b/trunk/arch/arm/mach-vexpress/include/mach/smp.h index 5a6da4fd247e..72a9621ed087 100644 --- a/trunk/arch/arm/mach-vexpress/include/mach/smp.h +++ b/trunk/arch/arm/mach-vexpress/include/mach/smp.h @@ -2,7 +2,14 @@ #define __MACH_SMP_H #include -#include + +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) /* * We use IRQ1 as the IPI diff --git a/trunk/arch/arm/mm/alignment.c b/trunk/arch/arm/mm/alignment.c index 724ba3bce72c..d073b64ae87e 100644 --- a/trunk/arch/arm/mm/alignment.c +++ b/trunk/arch/arm/mm/alignment.c @@ -885,23 +885,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) if (ai_usermode & UM_SIGNAL) force_sig(SIGBUS, current); - else { - /* - * We're about to disable the alignment trap and return to - * user space. But if an interrupt occurs before actually - * reaching user space, then the IRQ vector entry code will - * notice that we were still in kernel space and therefore - * the alignment trap won't be re-enabled in that case as it - * is presumed to be always on from kernel space. - * Let's prevent that race by disabling interrupts here (they - * are disabled on the way back to user space anyway in - * entry-common.S) and disable the alignment trap only if - * there is no work pending for this thread. - */ - raw_local_irq_disable(); - if (!(current_thread_info()->flags & _TIF_WORK_MASK)) - set_cr(cr_no_alignment); - } + else + set_cr(cr_no_alignment); return 0; } diff --git a/trunk/arch/arm/mm/cache-v6.S b/trunk/arch/arm/mm/cache-v6.S index 99fa688dfadd..86aa689ef1aa 100644 --- a/trunk/arch/arm/mm/cache-v6.S +++ b/trunk/arch/arm/mm/cache-v6.S @@ -21,22 +21,18 @@ #define D_CACHE_LINE_SIZE 32 #define BTB_FLUSH_SIZE 8 +#ifdef CONFIG_ARM_ERRATA_411920 /* - * v6_flush_icache_all() - * - * Flush the whole I-cache. + * Invalidate the entire I cache (this code is a workaround for the ARM1136 + * erratum 411920 - Invalidate Instruction Cache operation can fail. This + * erratum is present in 1136, 1156 and 1176. It does not affect the MPCore. * - * ARM1136 erratum 411920 - Invalidate Instruction Cache operation can fail. - * This erratum is present in 1136, 1156 and 1176. It does not affect the - * MPCore. - * - * Registers: - * r0 - set to 0 - * r1 - corrupted + * Registers: + * r0 - set to 0 + * r1 - corrupted */ -ENTRY(v6_flush_icache_all) +ENTRY(v6_icache_inval_all) mov r0, #0 -#ifdef CONFIG_ARM_ERRATA_411920 mrs r1, cpsr cpsid ifa @ disable interrupts mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache @@ -47,11 +43,8 @@ ENTRY(v6_flush_icache_all) .rept 11 @ ARM Ltd recommends at least nop @ 11 NOPs .endr -#else - mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache -#endif mov pc, lr -ENDPROC(v6_flush_icache_all) +#endif /* * v6_flush_cache_all() @@ -67,7 +60,7 @@ ENTRY(v6_flush_kern_cache_all) #ifndef CONFIG_ARM_ERRATA_411920 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate #else - b v6_flush_icache_all + b v6_icache_inval_all #endif #else mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate @@ -145,7 +138,7 @@ ENTRY(v6_coherent_user_range) #ifndef CONFIG_ARM_ERRATA_411920 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate #else - b v6_flush_icache_all + b v6_icache_inval_all #endif #else mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB @@ -319,7 +312,6 @@ ENDPROC(v6_dma_unmap_area) .type v6_cache_fns, #object ENTRY(v6_cache_fns) - .long v6_flush_icache_all .long v6_flush_kern_cache_all .long v6_flush_user_cache_all .long v6_flush_user_cache_range diff --git a/trunk/arch/arm/mm/cache-v7.S b/trunk/arch/arm/mm/cache-v7.S index a3ebf7a4f49b..37c8157e116e 100644 --- a/trunk/arch/arm/mm/cache-v7.S +++ b/trunk/arch/arm/mm/cache-v7.S @@ -17,21 +17,6 @@ #include "proc-macros.S" -/* - * v7_flush_icache_all() - * - * Flush the whole I-cache. - * - * Registers: - * r0 - set to 0 - */ -ENTRY(v7_flush_icache_all) - mov r0, #0 - ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable - ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate - mov pc, lr -ENDPROC(v7_flush_icache_all) - /* * v7_flush_dcache_all() * @@ -106,8 +91,11 @@ ENTRY(v7_flush_kern_cache_all) THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) bl v7_flush_dcache_all mov r0, #0 - ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable - ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate +#ifdef CONFIG_SMP + mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable +#else + mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate +#endif ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) mov pc, lr @@ -183,8 +171,11 @@ ENTRY(v7_coherent_user_range) cmp r0, r1 blo 1b mov r0, #0 - ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable - ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB +#ifdef CONFIG_SMP + mcr p15, 0, r0, c7, c1, 6 @ invalidate BTB Inner Shareable +#else + mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB +#endif dsb isb mov pc, lr @@ -318,7 +309,6 @@ ENDPROC(v7_dma_unmap_area) .type v7_cache_fns, #object ENTRY(v7_cache_fns) - .long v7_flush_icache_all .long v7_flush_kern_cache_all .long v7_flush_user_cache_all .long v7_flush_user_cache_range diff --git a/trunk/arch/arm/mm/copypage-v4mc.c b/trunk/arch/arm/mm/copypage-v4mc.c index b8061519ce77..598c51ad5071 100644 --- a/trunk/arch/arm/mm/copypage-v4mc.c +++ b/trunk/arch/arm/mm/copypage-v4mc.c @@ -73,7 +73,7 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from, { void *kto = kmap_atomic(to, KM_USER1); - if (!test_and_set_bit(PG_dcache_clean, &from->flags)) + if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) __flush_dcache_page(page_mapping(from), from); spin_lock(&minicache_lock); diff --git a/trunk/arch/arm/mm/copypage-v6.c b/trunk/arch/arm/mm/copypage-v6.c index bdba6c65c901..f55fa1044f72 100644 --- a/trunk/arch/arm/mm/copypage-v6.c +++ b/trunk/arch/arm/mm/copypage-v6.c @@ -79,7 +79,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to, unsigned int offset = CACHE_COLOUR(vaddr); unsigned long kfrom, kto; - if (!test_and_set_bit(PG_dcache_clean, &from->flags)) + if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) __flush_dcache_page(page_mapping(from), from); /* FIXME: not highmem safe */ diff --git a/trunk/arch/arm/mm/copypage-xscale.c b/trunk/arch/arm/mm/copypage-xscale.c index 649bbcd325bf..9920c0ae2096 100644 --- a/trunk/arch/arm/mm/copypage-xscale.c +++ b/trunk/arch/arm/mm/copypage-xscale.c @@ -95,7 +95,7 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, { void *kto = kmap_atomic(to, KM_USER1); - if (!test_and_set_bit(PG_dcache_clean, &from->flags)) + if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) __flush_dcache_page(page_mapping(from), from); spin_lock(&minicache_lock); diff --git a/trunk/arch/arm/mm/dma-mapping.c b/trunk/arch/arm/mm/dma-mapping.c index e4dd0646e859..4bc43e535d3b 100644 --- a/trunk/arch/arm/mm/dma-mapping.c +++ b/trunk/arch/arm/mm/dma-mapping.c @@ -523,12 +523,6 @@ void ___dma_page_dev_to_cpu(struct page *page, unsigned long off, outer_inv_range(paddr, paddr + size); dma_cache_maint_page(page, off, size, dir, dmac_unmap_area); - - /* - * Mark the D-cache clean for this page to avoid extra flushing. - */ - if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE) - set_bit(PG_dcache_clean, &page->flags); } EXPORT_SYMBOL(___dma_page_dev_to_cpu); diff --git a/trunk/arch/arm/mm/fault-armv.c b/trunk/arch/arm/mm/fault-armv.c index 8440d952ba6d..9b906dec1ca1 100644 --- a/trunk/arch/arm/mm/fault-armv.c +++ b/trunk/arch/arm/mm/fault-armv.c @@ -28,7 +28,6 @@ static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE; -#if __LINUX_ARM_ARCH__ < 6 /* * We take the easy way out of this problem - we make the * PTE uncacheable. However, we leave the write buffer on. @@ -142,7 +141,7 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma, * a page table, or changing an existing PTE. Basically, there are two * things that we need to take care of: * - * 1. If PG_dcache_clean is not set for the page, we need to ensure + * 1. If PG_dcache_dirty is set for the page, we need to ensure * that any cache entries for the kernels virtual memory * range are written back to the page. * 2. If we have multiple shared mappings of the same space in @@ -169,8 +168,10 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, return; mapping = page_mapping(page); - if (!test_and_set_bit(PG_dcache_clean, &page->flags)) +#ifndef CONFIG_SMP + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) __flush_dcache_page(mapping, page); +#endif if (mapping) { if (cache_is_vivt()) make_coherent(mapping, vma, addr, ptep, pfn); @@ -178,7 +179,6 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, __flush_icache_all(); } } -#endif /* __LINUX_ARM_ARCH__ < 6 */ /* * Check whether the write buffer has physical address aliasing diff --git a/trunk/arch/arm/mm/fault.c b/trunk/arch/arm/mm/fault.c index 1e21e125fe3a..23b0b03af5ea 100644 --- a/trunk/arch/arm/mm/fault.c +++ b/trunk/arch/arm/mm/fault.c @@ -581,19 +581,6 @@ static struct fsr_info ifsr_info[] = { { do_bad, SIGBUS, 0, "unknown 31" }, }; -void __init -hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), - int sig, int code, const char *name) -{ - if (nr < 0 || nr >= ARRAY_SIZE(ifsr_info)) - BUG(); - - ifsr_info[nr].fn = fn; - ifsr_info[nr].sig = sig; - ifsr_info[nr].code = code; - ifsr_info[nr].name = name; -} - asmlinkage void __exception do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs) { diff --git a/trunk/arch/arm/mm/flush.c b/trunk/arch/arm/mm/flush.c index 391ffae75098..c6844cb9b508 100644 --- a/trunk/arch/arm/mm/flush.c +++ b/trunk/arch/arm/mm/flush.c @@ -17,7 +17,6 @@ #include #include #include -#include #include "mm.h" @@ -40,18 +39,6 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) : "cc"); } -static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len) -{ - unsigned long colour = CACHE_COLOUR(vaddr); - unsigned long offset = vaddr & (PAGE_SIZE - 1); - unsigned long to; - - set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0); - to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset; - flush_tlb_kernel_page(to); - flush_icache_range(to, to + len); -} - void flush_cache_mm(struct mm_struct *mm) { if (cache_is_vivt()) { @@ -102,16 +89,16 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged()) __flush_icache_all(); } - #else -#define flush_pfn_alias(pfn,vaddr) do { } while (0) -#define flush_icache_alias(pfn,vaddr,len) do { } while (0) +#define flush_pfn_alias(pfn,vaddr) do { } while (0) #endif +#ifdef CONFIG_SMP static void flush_ptrace_access_other(void *args) { __flush_icache_all(); } +#endif static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, @@ -131,16 +118,15 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, return; } - /* VIPT non-aliasing D-cache */ + /* VIPT non-aliasing cache */ if (vma->vm_flags & VM_EXEC) { unsigned long addr = (unsigned long)kaddr; - if (icache_is_vipt_aliasing()) - flush_icache_alias(page_to_pfn(page), uaddr, len); - else - __cpuc_coherent_kern_range(addr, addr + len); + __cpuc_coherent_kern_range(addr, addr + len); +#ifdef CONFIG_SMP if (cache_ops_need_broadcast()) smp_call_function(flush_ptrace_access_other, NULL, 1); +#endif } } @@ -229,36 +215,6 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p flush_dcache_mmap_unlock(mapping); } -#if __LINUX_ARM_ARCH__ >= 6 -void __sync_icache_dcache(pte_t pteval) -{ - unsigned long pfn; - struct page *page; - struct address_space *mapping; - - if (!pte_present_user(pteval)) - return; - if (cache_is_vipt_nonaliasing() && !pte_exec(pteval)) - /* only flush non-aliasing VIPT caches for exec mappings */ - return; - pfn = pte_pfn(pteval); - if (!pfn_valid(pfn)) - return; - - page = pfn_to_page(pfn); - if (cache_is_vipt_aliasing()) - mapping = page_mapping(page); - else - mapping = NULL; - - if (!test_and_set_bit(PG_dcache_clean, &page->flags)) - __flush_dcache_page(mapping, page); - /* pte_exec() already checked above for non-aliasing VIPT cache */ - if (cache_is_vipt_nonaliasing() || pte_exec(pteval)) - __flush_icache_all(); -} -#endif - /* * Ensure cache coherency between kernel mapping and userspace mapping * of this page. @@ -290,16 +246,17 @@ void flush_dcache_page(struct page *page) mapping = page_mapping(page); - if (!cache_ops_need_broadcast() && - mapping && !mapping_mapped(mapping)) - clear_bit(PG_dcache_clean, &page->flags); - else { +#ifndef CONFIG_SMP + if (!PageHighMem(page) && mapping && !mapping_mapped(mapping)) + set_bit(PG_dcache_dirty, &page->flags); + else +#endif + { __flush_dcache_page(mapping, page); if (mapping && cache_is_vivt()) __flush_dcache_aliases(mapping, page); else if (mapping) __flush_icache_all(); - set_bit(PG_dcache_clean, &page->flags); } } EXPORT_SYMBOL(flush_dcache_page); diff --git a/trunk/arch/arm/mm/init.c b/trunk/arch/arm/mm/init.c index 36c4553ffcce..7185b00650fe 100644 --- a/trunk/arch/arm/mm/init.c +++ b/trunk/arch/arm/mm/init.c @@ -277,7 +277,7 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) /* Register the kernel text, kernel data and initrd with memblock. */ #ifdef CONFIG_XIP_KERNEL - memblock_reserve(__pa(_sdata), _end - _sdata); + memblock_reserve(__pa(_data), _end - _data); #else memblock_reserve(__pa(_stext), _end - _stext); #endif @@ -545,7 +545,7 @@ void __init mem_init(void) MLK_ROUNDUP(__init_begin, __init_end), MLK_ROUNDUP(_text, _etext), - MLK_ROUNDUP(_sdata, _edata)); + MLK_ROUNDUP(_data, _edata)); #undef MLK #undef MLM diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index e2335811c02e..6e1c4f6a2b3f 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include @@ -247,9 +246,6 @@ static struct mem_type mem_types[] = { .domain = DOMAIN_USER, }, [MT_MEMORY] = { - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_USER | L_PTE_EXEC, - .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, .domain = DOMAIN_KERNEL, }, @@ -258,9 +254,6 @@ static struct mem_type mem_types[] = { .domain = DOMAIN_KERNEL, }, [MT_MEMORY_NONCACHED] = { - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE, - .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE, .domain = DOMAIN_KERNEL, }, @@ -310,8 +303,9 @@ static void __init build_mem_type_table(void) cachepolicy = CPOLICY_WRITEBACK; ecc_mask = 0; } - if (is_smp()) - cachepolicy = CPOLICY_WRITEALLOC; +#ifdef CONFIG_SMP + cachepolicy = CPOLICY_WRITEALLOC; +#endif /* * Strip out features not present on earlier architectures. @@ -405,22 +399,21 @@ static void __init build_mem_type_table(void) cp = &cache_policies[cachepolicy]; vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; +#ifndef CONFIG_SMP /* * Only use write-through for non-SMP systems */ - if (!is_smp() && cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH) + if (cpu_arch >= CPU_ARCH_ARMv5 && cachepolicy > CPOLICY_WRITETHROUGH) vecs_pgprot = cache_policies[CPOLICY_WRITETHROUGH].pte; +#endif /* * Enable CPU-specific coherency if supported. * (Only available on XSC3 at the moment.) */ - if (arch_is_coherent() && cpu_is_xsc3()) { + if (arch_is_coherent() && cpu_is_xsc3()) mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; - mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED; - mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; - mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED; - } + /* * ARMv6 and above have extended page tables. */ @@ -433,23 +426,20 @@ static void __init build_mem_type_table(void) mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; - if (is_smp()) { - /* - * Mark memory with the "shared" attribute - * for SMP systems - */ - user_pgprot |= L_PTE_SHARED; - kern_pgprot |= L_PTE_SHARED; - vecs_pgprot |= L_PTE_SHARED; - mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S; - mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED; - mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S; - mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED; - mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; - mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED; - mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; - mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED; - } +#ifdef CONFIG_SMP + /* + * Mark memory with the "shared" attribute for SMP systems + */ + user_pgprot |= L_PTE_SHARED; + kern_pgprot |= L_PTE_SHARED; + vecs_pgprot |= L_PTE_SHARED; + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S; + mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED; + mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S; + mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED; + mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; + mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; +#endif } /* @@ -485,8 +475,6 @@ static void __init build_mem_type_table(void) mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask; mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask; mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd; - mem_types[MT_MEMORY].prot_pte |= kern_pgprot; - mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask; mem_types[MT_ROM].prot_sect |= cp->pmd; switch (cp->pmd) { @@ -510,19 +498,6 @@ static void __init build_mem_type_table(void) } } -#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE -pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot) -{ - if (!pfn_valid(pfn)) - return pgprot_noncached(vma_prot); - else if (file->f_flags & O_SYNC) - return pgprot_writecombine(vma_prot); - return vma_prot; -} -EXPORT_SYMBOL(phys_mem_access_prot); -#endif - #define vectors_base() (vectors_high() ? 0xffff0000 : 0) static void __init *early_alloc(unsigned long sz) @@ -827,7 +802,8 @@ static void __init sanity_check_meminfo(void) * rather difficult. */ reason = "with VIPT aliasing cache"; - } else if (is_smp() && tlb_ops_need_broadcast()) { +#ifdef CONFIG_SMP + } else if (tlb_ops_need_broadcast()) { /* * kmap_high needs to occasionally flush TLB entries, * however, if the TLB entries need to be broadcast @@ -837,6 +813,7 @@ static void __init sanity_check_meminfo(void) * (must not be called with irqs off) */ reason = "without hardware TLB ops broadcasting"; +#endif } if (reason) { printk(KERN_CRIT "HIGHMEM is not supported %s, ignoring high memory\n", diff --git a/trunk/arch/arm/mm/proc-arm1020.S b/trunk/arch/arm/mm/proc-arm1020.S index a6f5f8475b96..203a4e944d9e 100644 --- a/trunk/arch/arm/mm/proc-arm1020.S +++ b/trunk/arch/arm/mm/proc-arm1020.S @@ -430,7 +430,7 @@ ENTRY(cpu_arm1020_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT + __INIT .type __arm1020_setup, #function __arm1020_setup: diff --git a/trunk/arch/arm/mm/proc-arm1020e.S b/trunk/arch/arm/mm/proc-arm1020e.S index afc06b9c3133..1a511e765909 100644 --- a/trunk/arch/arm/mm/proc-arm1020e.S +++ b/trunk/arch/arm/mm/proc-arm1020e.S @@ -412,7 +412,7 @@ ENTRY(cpu_arm1020e_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT + __INIT .type __arm1020e_setup, #function __arm1020e_setup: diff --git a/trunk/arch/arm/mm/proc-arm1022.S b/trunk/arch/arm/mm/proc-arm1022.S index 8915e0ba3fe5..1ffa4eb9c34f 100644 --- a/trunk/arch/arm/mm/proc-arm1022.S +++ b/trunk/arch/arm/mm/proc-arm1022.S @@ -394,7 +394,7 @@ ENTRY(cpu_arm1022_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT + __INIT .type __arm1022_setup, #function __arm1022_setup: diff --git a/trunk/arch/arm/mm/proc-arm1026.S b/trunk/arch/arm/mm/proc-arm1026.S index ff446c5d476f..5697c34b95b0 100644 --- a/trunk/arch/arm/mm/proc-arm1026.S +++ b/trunk/arch/arm/mm/proc-arm1026.S @@ -384,7 +384,7 @@ ENTRY(cpu_arm1026_set_pte_ext) mov pc, lr - __CPUINIT + __INIT .type __arm1026_setup, #function __arm1026_setup: diff --git a/trunk/arch/arm/mm/proc-arm6_7.S b/trunk/arch/arm/mm/proc-arm6_7.S index 6a7be1863edd..64e0b327c7c5 100644 --- a/trunk/arch/arm/mm/proc-arm6_7.S +++ b/trunk/arch/arm/mm/proc-arm6_7.S @@ -238,7 +238,7 @@ ENTRY(cpu_arm7_reset) mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc mov pc, r0 - __CPUINIT + __INIT .type __arm6_setup, #function __arm6_setup: mov r0, #0 diff --git a/trunk/arch/arm/mm/proc-arm720.S b/trunk/arch/arm/mm/proc-arm720.S index c285395f44b2..9d96824134fc 100644 --- a/trunk/arch/arm/mm/proc-arm720.S +++ b/trunk/arch/arm/mm/proc-arm720.S @@ -113,7 +113,7 @@ ENTRY(cpu_arm720_reset) mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 - __CPUINIT + __INIT .type __arm710_setup, #function __arm710_setup: diff --git a/trunk/arch/arm/mm/proc-arm740.S b/trunk/arch/arm/mm/proc-arm740.S index 38b27dcba727..6c1a9ab059ae 100644 --- a/trunk/arch/arm/mm/proc-arm740.S +++ b/trunk/arch/arm/mm/proc-arm740.S @@ -55,7 +55,7 @@ ENTRY(cpu_arm740_reset) mcr p15, 0, ip, c1, c0, 0 @ ctrl register mov pc, r0 - __CPUINIT + __INIT .type __arm740_setup, #function __arm740_setup: diff --git a/trunk/arch/arm/mm/proc-arm7tdmi.S b/trunk/arch/arm/mm/proc-arm7tdmi.S index 0c9786de20af..6a850dbba22e 100644 --- a/trunk/arch/arm/mm/proc-arm7tdmi.S +++ b/trunk/arch/arm/mm/proc-arm7tdmi.S @@ -46,7 +46,7 @@ ENTRY(cpu_arm7tdmi_proc_fin) ENTRY(cpu_arm7tdmi_reset) mov pc, r0 - __CPUINIT + __INIT .type __arm7tdmi_setup, #function __arm7tdmi_setup: diff --git a/trunk/arch/arm/mm/proc-arm920.S b/trunk/arch/arm/mm/proc-arm920.S index fecf570939f3..86f80aa56216 100644 --- a/trunk/arch/arm/mm/proc-arm920.S +++ b/trunk/arch/arm/mm/proc-arm920.S @@ -375,7 +375,7 @@ ENTRY(cpu_arm920_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __arm920_setup, #function __arm920_setup: diff --git a/trunk/arch/arm/mm/proc-arm922.S b/trunk/arch/arm/mm/proc-arm922.S index e3cbf87c9480..f76ce9b62883 100644 --- a/trunk/arch/arm/mm/proc-arm922.S +++ b/trunk/arch/arm/mm/proc-arm922.S @@ -379,7 +379,7 @@ ENTRY(cpu_arm922_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT + __INIT .type __arm922_setup, #function __arm922_setup: diff --git a/trunk/arch/arm/mm/proc-arm925.S b/trunk/arch/arm/mm/proc-arm925.S index 572424c867b5..657bd3f7c153 100644 --- a/trunk/arch/arm/mm/proc-arm925.S +++ b/trunk/arch/arm/mm/proc-arm925.S @@ -428,7 +428,7 @@ ENTRY(cpu_arm925_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT + __INIT .type __arm925_setup, #function __arm925_setup: diff --git a/trunk/arch/arm/mm/proc-arm926.S b/trunk/arch/arm/mm/proc-arm926.S index 63d168b4ebe6..73f1f3c68910 100644 --- a/trunk/arch/arm/mm/proc-arm926.S +++ b/trunk/arch/arm/mm/proc-arm926.S @@ -389,7 +389,7 @@ ENTRY(cpu_arm926_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __arm926_setup, #function __arm926_setup: diff --git a/trunk/arch/arm/mm/proc-arm940.S b/trunk/arch/arm/mm/proc-arm940.S index f6a62822418e..fffb061a45a5 100644 --- a/trunk/arch/arm/mm/proc-arm940.S +++ b/trunk/arch/arm/mm/proc-arm940.S @@ -264,7 +264,7 @@ ENTRY(arm940_cache_fns) .long arm940_dma_unmap_area .long arm940_dma_flush_range - __CPUINIT + __INIT .type __arm940_setup, #function __arm940_setup: diff --git a/trunk/arch/arm/mm/proc-arm946.S b/trunk/arch/arm/mm/proc-arm946.S index ea2e7f2eb95b..249a6053760a 100644 --- a/trunk/arch/arm/mm/proc-arm946.S +++ b/trunk/arch/arm/mm/proc-arm946.S @@ -317,7 +317,7 @@ ENTRY(cpu_arm946_dcache_clean_area) mcr p15, 0, r0, c7, c10, 4 @ drain WB mov pc, lr - __CPUINIT + __INIT .type __arm946_setup, #function __arm946_setup: diff --git a/trunk/arch/arm/mm/proc-arm9tdmi.S b/trunk/arch/arm/mm/proc-arm9tdmi.S index db67e3134d7a..db475667fac2 100644 --- a/trunk/arch/arm/mm/proc-arm9tdmi.S +++ b/trunk/arch/arm/mm/proc-arm9tdmi.S @@ -46,7 +46,7 @@ ENTRY(cpu_arm9tdmi_proc_fin) ENTRY(cpu_arm9tdmi_reset) mov pc, r0 - __CPUINIT + __INIT .type __arm9tdmi_setup, #function __arm9tdmi_setup: diff --git a/trunk/arch/arm/mm/proc-fa526.S b/trunk/arch/arm/mm/proc-fa526.S index 7c9ad621f0e6..7803fdf70029 100644 --- a/trunk/arch/arm/mm/proc-fa526.S +++ b/trunk/arch/arm/mm/proc-fa526.S @@ -134,7 +134,7 @@ ENTRY(cpu_fa526_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __fa526_setup, #function __fa526_setup: diff --git a/trunk/arch/arm/mm/proc-feroceon.S b/trunk/arch/arm/mm/proc-feroceon.S index 578da69200cf..b304d0104a4e 100644 --- a/trunk/arch/arm/mm/proc-feroceon.S +++ b/trunk/arch/arm/mm/proc-feroceon.S @@ -494,7 +494,7 @@ ENTRY(cpu_feroceon_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __feroceon_setup, #function __feroceon_setup: diff --git a/trunk/arch/arm/mm/proc-mohawk.S b/trunk/arch/arm/mm/proc-mohawk.S index 4458ee6aa713..5f6892fcc167 100644 --- a/trunk/arch/arm/mm/proc-mohawk.S +++ b/trunk/arch/arm/mm/proc-mohawk.S @@ -338,7 +338,7 @@ ENTRY(cpu_mohawk_set_pte_ext) mcr p15, 0, r0, c7, c10, 4 @ drain WB mov pc, lr - __CPUINIT + __INIT .type __mohawk_setup, #function __mohawk_setup: diff --git a/trunk/arch/arm/mm/proc-sa110.S b/trunk/arch/arm/mm/proc-sa110.S index 5aa8d59c2e85..a201eb04b5e1 100644 --- a/trunk/arch/arm/mm/proc-sa110.S +++ b/trunk/arch/arm/mm/proc-sa110.S @@ -156,7 +156,7 @@ ENTRY(cpu_sa110_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __sa110_setup, #function __sa110_setup: diff --git a/trunk/arch/arm/mm/proc-sa1100.S b/trunk/arch/arm/mm/proc-sa1100.S index 2ac4e6f10713..7ddc4805bf97 100644 --- a/trunk/arch/arm/mm/proc-sa1100.S +++ b/trunk/arch/arm/mm/proc-sa1100.S @@ -169,7 +169,7 @@ ENTRY(cpu_sa1100_set_pte_ext) #endif mov pc, lr - __CPUINIT + __INIT .type __sa1100_setup, #function __sa1100_setup: diff --git a/trunk/arch/arm/mm/proc-v6.S b/trunk/arch/arm/mm/proc-v6.S index 59a7e1ffe7bc..22aac8515196 100644 --- a/trunk/arch/arm/mm/proc-v6.S +++ b/trunk/arch/arm/mm/proc-v6.S @@ -30,10 +30,13 @@ #define TTB_RGN_WT (2 << 3) #define TTB_RGN_WB (3 << 3) -#define TTB_FLAGS_UP TTB_RGN_WBWA -#define PMD_FLAGS_UP PMD_SECT_WB -#define TTB_FLAGS_SMP TTB_RGN_WBWA|TTB_S -#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S +#ifndef CONFIG_SMP +#define TTB_FLAGS TTB_RGN_WBWA +#define PMD_FLAGS PMD_SECT_WB +#else +#define TTB_FLAGS TTB_RGN_WBWA|TTB_S +#define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S +#endif ENTRY(cpu_v6_proc_init) mov pc, lr @@ -94,8 +97,7 @@ ENTRY(cpu_v6_switch_mm) #ifdef CONFIG_MMU mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) - ALT_UP(orr r0, r0, #TTB_FLAGS_UP) + orr r0, r0, #TTB_FLAGS mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB mcr p15, 0, r2, c7, c10, 4 @ drain write buffer mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 @@ -135,7 +137,7 @@ cpu_pj4_name: .align - __CPUINIT + __INIT /* * __v6_setup @@ -154,11 +156,9 @@ cpu_pj4_name: */ __v6_setup: #ifdef CONFIG_SMP - ALT_SMP(mrc p15, 0, r0, c1, c0, 1) @ Enable SMP/nAMP mode - ALT_UP(nop) + mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode orr r0, r0, #0x20 - ALT_SMP(mcr p15, 0, r0, c1, c0, 1) - ALT_UP(nop) + mcr p15, 0, r0, c1, c0, 1 #endif mov r0, #0 @@ -169,8 +169,7 @@ __v6_setup: #ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r0, c2, c0, 2 @ TTB control register - ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) - ALT_UP(orr r4, r4, #TTB_FLAGS_UP) + orr r4, r4, #TTB_FLAGS mcr p15, 0, r4, c2, c0, 1 @ load TTB1 #endif /* CONFIG_MMU */ adr r5, v6_crval @@ -193,8 +192,6 @@ __v6_setup: v6_crval: crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c - __INITDATA - .type v6_processor_functions, #object ENTRY(v6_processor_functions) .word v6_early_abort @@ -208,8 +205,6 @@ ENTRY(v6_processor_functions) .word cpu_v6_set_pte_ext .size v6_processor_functions, . - v6_processor_functions - .section ".rodata" - .type cpu_arch_name, #object cpu_arch_name: .asciz "armv6" @@ -230,16 +225,10 @@ cpu_elf_name: __v6_proc_info: .long 0x0007b000 .long 0x0007f000 - ALT_SMP(.long \ - PMD_TYPE_SECT | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ - PMD_TYPE_SECT | \ + .long PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) + PMD_FLAGS .long PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ @@ -260,16 +249,10 @@ __v6_proc_info: __pj4_v6_proc_info: .long 0x560f5810 .long 0xff0ffff0 - ALT_SMP(.long \ - PMD_TYPE_SECT | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ - PMD_TYPE_SECT | \ + .long PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) + PMD_FLAGS .long PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ diff --git a/trunk/arch/arm/mm/proc-v7.S b/trunk/arch/arm/mm/proc-v7.S index 055e9d50d015..6a8506d99ee9 100644 --- a/trunk/arch/arm/mm/proc-v7.S +++ b/trunk/arch/arm/mm/proc-v7.S @@ -30,13 +30,15 @@ #define TTB_IRGN_WT ((1 << 0) | (0 << 6)) #define TTB_IRGN_WB ((1 << 0) | (1 << 6)) +#ifndef CONFIG_SMP /* PTWs cacheable, inner WB not shareable, outer WB not shareable */ -#define TTB_FLAGS_UP TTB_IRGN_WB|TTB_RGN_OC_WB -#define PMD_FLAGS_UP PMD_SECT_WB - +#define TTB_FLAGS TTB_IRGN_WB|TTB_RGN_OC_WB +#define PMD_FLAGS PMD_SECT_WB +#else /* PTWs cacheable, inner WBWA shareable, outer WBWA not shareable */ -#define TTB_FLAGS_SMP TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA -#define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S +#define TTB_FLAGS TTB_IRGN_WBWA|TTB_S|TTB_NOS|TTB_RGN_OC_WBWA +#define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S +#endif ENTRY(cpu_v7_proc_init) mov pc, lr @@ -103,8 +105,7 @@ ENTRY(cpu_v7_switch_mm) #ifdef CONFIG_MMU mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) - ALT_UP(orr r0, r0, #TTB_FLAGS_UP) + orr r0, r0, #TTB_FLAGS #ifdef CONFIG_ARM_ERRATA_430973 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB #endif @@ -168,7 +169,7 @@ cpu_v7_name: .ascii "ARMv7 Processor" .align - __CPUINIT + __INIT /* * __v7_setup @@ -185,15 +186,13 @@ cpu_v7_name: * It is assumed that: * - cache type register is implemented */ -__v7_ca9mp_setup: +__v7_setup: #ifdef CONFIG_SMP - ALT_SMP(mrc p15, 0, r0, c1, c0, 1) - ALT_UP(mov r0, #(1 << 6)) @ fake it for UP + mrc p15, 0, r0, c1, c0, 1 tst r0, #(1 << 6) @ SMP/nAMP mode enabled? orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting #endif -__v7_setup: adr r12, __v7_setup_stack @ the local stack stmia r12, {r0-r5, r7, r9, r11, lr} bl v7_flush_dcache_all @@ -202,16 +201,11 @@ __v7_setup: mrc p15, 0, r0, c0, c0, 0 @ read main ID register and r10, r0, #0xff000000 @ ARM? teq r10, #0x41000000 - bne 3f + bne 2f and r5, r0, #0x00f00000 @ variant and r6, r0, #0x0000000f @ revision - orr r6, r6, r5, lsr #20-4 @ combine variant and revision - ubfx r0, r0, #4, #12 @ primary part number + orr r0, r6, r5, lsr #20-4 @ combine variant and revision - /* Cortex-A8 Errata */ - ldr r10, =0x00000c08 @ Cortex-A8 primary part number - teq r0, r10 - bne 2f #ifdef CONFIG_ARM_ERRATA_430973 teq r5, #0x00100000 @ only present in r1p* mrceq p15, 0, r10, c1, c0, 1 @ read aux control register @@ -219,42 +213,21 @@ __v7_setup: mcreq p15, 0, r10, c1, c0, 1 @ write aux control register #endif #ifdef CONFIG_ARM_ERRATA_458693 - teq r6, #0x20 @ only present in r2p0 + teq r0, #0x20 @ only present in r2p0 mrceq p15, 0, r10, c1, c0, 1 @ read aux control register orreq r10, r10, #(1 << 5) @ set L1NEON to 1 orreq r10, r10, #(1 << 9) @ set PLDNOP to 1 mcreq p15, 0, r10, c1, c0, 1 @ write aux control register #endif #ifdef CONFIG_ARM_ERRATA_460075 - teq r6, #0x20 @ only present in r2p0 + teq r0, #0x20 @ only present in r2p0 mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register tsteq r10, #1 << 22 orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register #endif - b 3f - /* Cortex-A9 Errata */ -2: ldr r10, =0x00000c09 @ Cortex-A9 primary part number - teq r0, r10 - bne 3f -#ifdef CONFIG_ARM_ERRATA_742230 - cmp r6, #0x22 @ only present up to r2p2 - mrcle p15, 0, r10, c15, c0, 1 @ read diagnostic register - orrle r10, r10, #1 << 4 @ set bit #4 - mcrle p15, 0, r10, c15, c0, 1 @ write diagnostic register -#endif -#ifdef CONFIG_ARM_ERRATA_742231 - teq r6, #0x20 @ present in r2p0 - teqne r6, #0x21 @ present in r2p1 - teqne r6, #0x22 @ present in r2p2 - mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register - orreq r10, r10, #1 << 12 @ set bit #12 - orreq r10, r10, #1 << 22 @ set bit #22 - mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register -#endif - -3: mov r10, #0 +2: mov r10, #0 #ifdef HARVARD_CACHE mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate #endif @@ -262,8 +235,7 @@ __v7_setup: #ifdef CONFIG_MMU mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r10, c2, c0, 2 @ TTB control register - ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) - ALT_UP(orr r4, r4, #TTB_FLAGS_UP) + orr r4, r4, #TTB_FLAGS mcr p15, 0, r4, c2, c0, 1 @ load TTB1 mov r10, #0x1f @ domains 0, 1 = manager mcr p15, 0, r10, c3, c0, 0 @ load domain access register @@ -325,8 +297,6 @@ v7_crval: __v7_setup_stack: .space 4 * 11 @ 11 registers - __INITDATA - .type v7_processor_functions, #object ENTRY(v7_processor_functions) .word v7_early_abort @@ -340,8 +310,6 @@ ENTRY(v7_processor_functions) .word cpu_v7_set_pte_ext .size v7_processor_functions, . - v7_processor_functions - .section ".rodata" - .type cpu_arch_name, #object cpu_arch_name: .asciz "armv7" @@ -355,35 +323,6 @@ cpu_elf_name: .section ".proc.info.init", #alloc, #execinstr - .type __v7_ca9mp_proc_info, #object -__v7_ca9mp_proc_info: - .long 0x410fc090 @ Required ID value - .long 0xff0ffff0 @ Mask for ID - ALT_SMP(.long \ - PMD_TYPE_SECT | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ - PMD_TYPE_SECT | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) - .long PMD_TYPE_SECT | \ - PMD_SECT_XN | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ - b __v7_ca9mp_setup - .long cpu_arch_name - .long cpu_elf_name - .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP - .long cpu_v7_name - .long v7_processor_functions - .long v7wbi_tlb_fns - .long v6_user_fns - .long v7_cache_fns - .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info - /* * Match any ARMv7 processor core. */ @@ -391,16 +330,10 @@ __v7_ca9mp_proc_info: __v7_proc_info: .long 0x000f0000 @ Required ID value .long 0x000f0000 @ Mask for ID - ALT_SMP(.long \ - PMD_TYPE_SECT | \ - PMD_SECT_AP_WRITE | \ - PMD_SECT_AP_READ | \ - PMD_FLAGS_SMP) - ALT_UP(.long \ - PMD_TYPE_SECT | \ + .long PMD_TYPE_SECT | \ PMD_SECT_AP_WRITE | \ PMD_SECT_AP_READ | \ - PMD_FLAGS_UP) + PMD_FLAGS .long PMD_TYPE_SECT | \ PMD_SECT_XN | \ PMD_SECT_AP_WRITE | \ diff --git a/trunk/arch/arm/mm/proc-xsc3.S b/trunk/arch/arm/mm/proc-xsc3.S index cad07e403044..361a51e49030 100644 --- a/trunk/arch/arm/mm/proc-xsc3.S +++ b/trunk/arch/arm/mm/proc-xsc3.S @@ -404,7 +404,7 @@ ENTRY(cpu_xsc3_set_pte_ext) .align - __CPUINIT + __INIT .type __xsc3_setup, #function __xsc3_setup: diff --git a/trunk/arch/arm/mm/proc-xscale.S b/trunk/arch/arm/mm/proc-xscale.S index cb245edb2c2b..14075979bcba 100644 --- a/trunk/arch/arm/mm/proc-xscale.S +++ b/trunk/arch/arm/mm/proc-xscale.S @@ -506,7 +506,7 @@ ENTRY(cpu_xscale_set_pte_ext) .align - __CPUINIT + __INIT .type __xscale_setup, #function __xscale_setup: diff --git a/trunk/arch/arm/mm/tlb-v7.S b/trunk/arch/arm/mm/tlb-v7.S index 53cd5b454673..f3f288a9546d 100644 --- a/trunk/arch/arm/mm/tlb-v7.S +++ b/trunk/arch/arm/mm/tlb-v7.S @@ -13,7 +13,6 @@ */ #include #include -#include #include #include #include @@ -42,15 +41,20 @@ ENTRY(v7wbi_flush_user_tlb_range) orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA mov r1, r1, lsl #PAGE_SHIFT 1: - ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) - ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA - +#ifdef CONFIG_SMP + mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) +#else + mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate U MVA +#endif add r0, r0, #PAGE_SZ cmp r0, r1 blo 1b mov ip, #0 - ALT_SMP(mcr p15, 0, ip, c7, c1, 6) @ flush BTAC/BTB Inner Shareable - ALT_UP(mcr p15, 0, ip, c7, c5, 6) @ flush BTAC/BTB +#ifdef CONFIG_SMP + mcr p15, 0, ip, c7, c1, 6 @ flush BTAC/BTB Inner Shareable +#else + mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB +#endif dsb mov pc, lr ENDPROC(v7wbi_flush_user_tlb_range) @@ -70,14 +74,20 @@ ENTRY(v7wbi_flush_kern_tlb_range) mov r0, r0, lsl #PAGE_SHIFT mov r1, r1, lsl #PAGE_SHIFT 1: - ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) - ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA +#ifdef CONFIG_SMP + mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable) +#else + mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate U MVA +#endif add r0, r0, #PAGE_SZ cmp r0, r1 blo 1b mov r2, #0 - ALT_SMP(mcr p15, 0, r2, c7, c1, 6) @ flush BTAC/BTB Inner Shareable - ALT_UP(mcr p15, 0, r2, c7, c5, 6) @ flush BTAC/BTB +#ifdef CONFIG_SMP + mcr p15, 0, r2, c7, c1, 6 @ flush BTAC/BTB Inner Shareable +#else + mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB +#endif dsb isb mov pc, lr @@ -89,6 +99,5 @@ ENDPROC(v7wbi_flush_kern_tlb_range) ENTRY(v7wbi_tlb_fns) .long v7wbi_flush_user_tlb_range .long v7wbi_flush_kern_tlb_range - ALT_SMP(.long v7wbi_tlb_flags_smp) - ALT_UP(.long v7wbi_tlb_flags_up) + .long v7wbi_tlb_flags .size v7wbi_tlb_fns, . - v7wbi_tlb_fns diff --git a/trunk/arch/arm/plat-nomadik/gpio.c b/trunk/arch/arm/plat-nomadik/gpio.c index 85e6fd212a41..977c8f9a07a2 100644 --- a/trunk/arch/arm/plat-nomadik/gpio.c +++ b/trunk/arch/arm/plat-nomadik/gpio.c @@ -102,22 +102,6 @@ static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip, writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC); } -static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - if (val) - writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS); - else - writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC); -} - -static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, - unsigned offset, int val) -{ - writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS); - __nmk_gpio_set_output(nmk_chip, offset, val); -} - static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset, pin_cfg_t cfg) { @@ -134,29 +118,20 @@ static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset, [3] /* illegal */ = "??" }; static const char *slpmnames[] = { - [NMK_GPIO_SLPM_INPUT] = "input/wakeup", - [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup", + [NMK_GPIO_SLPM_INPUT] = "input", + [NMK_GPIO_SLPM_NOCHANGE] = "no-change", }; int pin = PIN_NUM(cfg); int pull = PIN_PULL(cfg); int af = PIN_ALT(cfg); int slpm = PIN_SLPM(cfg); - int output = PIN_DIR(cfg); - int val = PIN_VAL(cfg); - dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s (%s%s)\n", - pin, afnames[af], pullnames[pull], slpmnames[slpm], - output ? "output " : "input", - output ? (val ? "high" : "low") : ""); - - if (output) - __nmk_gpio_make_output(nmk_chip, offset, val); - else { - __nmk_gpio_make_input(nmk_chip, offset); - __nmk_gpio_set_pull(nmk_chip, offset, pull); - } + dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n", + pin, afnames[af], pullnames[pull], slpmnames[slpm]); + __nmk_gpio_make_input(nmk_chip, offset); + __nmk_gpio_set_pull(nmk_chip, offset, pull); __nmk_gpio_set_slpm(nmk_chip, offset, slpm); __nmk_gpio_set_mode(nmk_chip, offset, af); } @@ -225,10 +200,6 @@ EXPORT_SYMBOL(nmk_config_pins); * changed to an input (with pullup/down enabled) in sleep and deep sleep. If * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was * configured even when in sleep and deep sleep. - * - * On DB8500v2 onwards, this setting loses the previous meaning and instead - * indicates if wakeup detection is enabled on the pin. Note that - * enable_irq_wake() will automatically enable wakeup detection. */ int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode) { @@ -396,27 +367,7 @@ static void nmk_gpio_irq_unmask(unsigned int irq) static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on) { - struct nmk_gpio_chip *nmk_chip; - unsigned long flags; - int gpio; - - gpio = NOMADIK_IRQ_TO_GPIO(irq); - nmk_chip = get_irq_chip_data(irq); - if (!nmk_chip) - return -EINVAL; - - spin_lock_irqsave(&nmk_chip->lock, flags); -#ifdef CONFIG_ARCH_U8500 - if (cpu_is_u8500v2()) { - __nmk_gpio_set_slpm(nmk_chip, gpio, - on ? NMK_GPIO_SLPM_WAKEUP_ENABLE - : NMK_GPIO_SLPM_WAKEUP_DISABLE); - } -#endif - __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on); - spin_unlock_irqrestore(&nmk_chip->lock, flags); - - return 0; + return nmk_gpio_irq_modify(irq, WAKE, on); } static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) @@ -544,8 +495,12 @@ static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, { struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); + u32 bit = 1 << offset; - __nmk_gpio_set_output(nmk_chip, offset, val); + if (val) + writel(bit, nmk_chip->addr + NMK_GPIO_DATS); + else + writel(bit, nmk_chip->addr + NMK_GPIO_DATC); } static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, @@ -554,7 +509,8 @@ static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, struct nmk_gpio_chip *nmk_chip = container_of(chip, struct nmk_gpio_chip, chip); - __nmk_gpio_make_output(nmk_chip, offset, val); + writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS); + nmk_gpio_set_output(chip, offset, val); return 0; } @@ -578,7 +534,7 @@ static struct gpio_chip nmk_gpio_template = { .can_sleep = 0, }; -static int __devinit nmk_gpio_probe(struct platform_device *dev) +static int __init nmk_gpio_probe(struct platform_device *dev) { struct nmk_gpio_platform_data *pdata = dev->dev.platform_data; struct nmk_gpio_chip *nmk_chip; diff --git a/trunk/arch/arm/plat-nomadik/include/plat/gpio.h b/trunk/arch/arm/plat-nomadik/include/plat/gpio.h index 67b113d639d8..aba355101f49 100644 --- a/trunk/arch/arm/plat-nomadik/include/plat/gpio.h +++ b/trunk/arch/arm/plat-nomadik/include/plat/gpio.h @@ -65,9 +65,7 @@ enum nmk_gpio_pull { /* Sleep mode */ enum nmk_gpio_slpm { NMK_GPIO_SLPM_INPUT, - NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, NMK_GPIO_SLPM_NOCHANGE, - NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, }; extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode); diff --git a/trunk/arch/arm/plat-nomadik/include/plat/pincfg.h b/trunk/arch/arm/plat-nomadik/include/plat/pincfg.h index 8c5ae3f2acf8..7eed11c1038d 100644 --- a/trunk/arch/arm/plat-nomadik/include/plat/pincfg.h +++ b/trunk/arch/arm/plat-nomadik/include/plat/pincfg.h @@ -19,16 +19,12 @@ * bit 9..10 - Alternate Function Selection * bit 11..12 - Pull up/down state * bit 13 - Sleep mode behaviour - * bit 14 - (sleep mode) Direction - * bit 15 - (sleep mode) Value (if output) * * to facilitate the definition, the following macros are provided * * PIN_CFG_DEFAULT - default config (0): * pull up/down = disabled - * sleep mode = input/wakeup - * (sleep mode) direction = input - * (sleep mode) value = low + * sleep mode = input * * PIN_CFG - default config with alternate function * PIN_CFG_PULL - default config with alternate function and pull up/down @@ -57,36 +53,8 @@ typedef unsigned long pin_cfg_t; #define PIN_SLPM_SHIFT 13 #define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT) #define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT) -#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT) +#define PIN_SLPM_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT) #define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT) -/* These two replace the above in DB8500v2+ */ -#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT) -#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT) - -#define PIN_DIR_SHIFT 14 -#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT) -#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT) -#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT) -#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT) - -#define PIN_VAL_SHIFT 15 -#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT) -#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT) -#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT) -#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT) - -/* Shortcuts. Use these instead of separate DIR and VAL. */ -#define PIN_INPUT PIN_DIR_INPUT -#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW) -#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH) - -/* - * These are the same as the ones above, but should make more sense to the - * reader when seen along with a setting a pin to AF mode. - */ -#define PIN_SLPM_INPUT PIN_INPUT -#define PIN_SLPM_OUTPUT_LOW PIN_OUTPUT_LOW -#define PIN_SLPM_OUTPUT_HIGH PIN_OUTPUT_HIGH #define PIN_CFG_DEFAULT (PIN_PULL_NONE | PIN_SLPM_INPUT) diff --git a/trunk/arch/arm/plat-nomadik/timer.c b/trunk/arch/arm/plat-nomadik/timer.c index aedf9c1d645e..ea3ca86c5283 100644 --- a/trunk/arch/arm/plat-nomadik/timer.c +++ b/trunk/arch/arm/plat-nomadik/timer.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/plat-nomadik/timer.c + * linux/arch/arm/mach-nomadik/timer.c * * Copyright (C) 2008 STMicroelectronics * Copyright (C) 2010 Alessandro Rubini @@ -75,7 +75,7 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode, cr = readl(mtu_base + MTU_CR(1)); writel(0, mtu_base + MTU_LR(1)); writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(1)); - writel(1 << 1, mtu_base + MTU_IMSC); + writel(0x2, mtu_base + MTU_IMSC); break; case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: @@ -131,23 +131,25 @@ void __init nmdk_timer_init(void) { unsigned long rate; struct clk *clk0; - u32 cr = MTU_CRn_32BITS; + struct clk *clk1; + u32 cr; clk0 = clk_get_sys("mtu0", NULL); BUG_ON(IS_ERR(clk0)); + clk1 = clk_get_sys("mtu1", NULL); + BUG_ON(IS_ERR(clk1)); + clk_enable(clk0); + clk_enable(clk1); /* - * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz - * for ux500. - * Use a divide-by-16 counter if the tick rate is more than 32MHz. - * At 32 MHz, the timer (with 32 bit counter) can be programmed - * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer - * with 16 gives too low timer resolution. + * Tick rate is 2.4MHz for Nomadik and 110MHz for ux500: + * use a divide-by-16 counter if it's more than 16MHz */ + cr = MTU_CRn_32BITS;; rate = clk_get_rate(clk0); - if (rate > 32000000) { + if (rate > 16 << 20) { rate /= 16; cr |= MTU_CRn_PRESCALE_16; } else { @@ -168,8 +170,15 @@ void __init nmdk_timer_init(void) pr_err("timer: failed to initialize clock source %s\n", nmdk_clksrc.name); - /* Timer 1 is used for events */ - + /* Timer 1 is used for events, fix according to rate */ + cr = MTU_CRn_32BITS; + rate = clk_get_rate(clk1); + if (rate > 16 << 20) { + rate /= 16; + cr |= MTU_CRn_PRESCALE_16; + } else { + cr |= MTU_CRn_PRESCALE_1; + } clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ diff --git a/trunk/arch/arm/plat-omap/include/plat/smp.h b/trunk/arch/arm/plat-omap/include/plat/smp.h index ecd6a488c497..5177a9c5a25a 100644 --- a/trunk/arch/arm/plat-omap/include/plat/smp.h +++ b/trunk/arch/arm/plat-omap/include/plat/smp.h @@ -18,7 +18,6 @@ #define OMAP_ARCH_SMP_H #include -#include /* Needed for secondary core boot */ extern void omap_secondary_startup(void); @@ -34,4 +33,15 @@ static inline void smp_cross_call(const struct cpumask *mask) gic_raise_softirq(mask, 1); } +/* + * Read MPIDR: Multiprocessor affinity register + */ +#define hard_smp_processor_id() \ + ({ \ + unsigned int cpunum; \ + __asm__("mrc p15, 0, %0, c0, c0, 5" \ + : "=r" (cpunum)); \ + cpunum &= 0x0F; \ + }) + #endif diff --git a/trunk/arch/arm/plat-omap/sram.c b/trunk/arch/arm/plat-omap/sram.c index 10b3b4c63372..226b2e858d6c 100644 --- a/trunk/arch/arm/plat-omap/sram.c +++ b/trunk/arch/arm/plat-omap/sram.c @@ -220,7 +220,20 @@ void __init omap_map_sram(void) if (omap_sram_size == 0) return; + if (cpu_is_omap24xx()) { + omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA; + + base = OMAP2_SRAM_PA; + base = ROUND_DOWN(base, PAGE_SIZE); + omap_sram_io_desc[0].pfn = __phys_to_pfn(base); + } + if (cpu_is_omap34xx()) { + omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA; + base = OMAP3_SRAM_PA; + base = ROUND_DOWN(base, PAGE_SIZE); + omap_sram_io_desc[0].pfn = __phys_to_pfn(base); + /* * SRAM must be marked as non-cached on OMAP3 since the * CORE DPLL M2 divider change code (in SRAM) runs with the @@ -231,11 +244,13 @@ void __init omap_map_sram(void) omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED; } - omap_sram_io_desc[0].virtual = omap_sram_base; - base = omap_sram_start; - base = ROUND_DOWN(base, PAGE_SIZE); - omap_sram_io_desc[0].pfn = __phys_to_pfn(base); - omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size, PAGE_SIZE); + if (cpu_is_omap44xx()) { + omap_sram_io_desc[0].virtual = OMAP4_SRAM_VA; + base = OMAP4_SRAM_PA; + base = ROUND_DOWN(base, PAGE_SIZE); + omap_sram_io_desc[0].pfn = __phys_to_pfn(base); + } + omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */ iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n", diff --git a/trunk/arch/arm/plat-s5p/dev-fimc0.c b/trunk/arch/arm/plat-s5p/dev-fimc0.c index 608770fc1531..d3f1a9b5d2b5 100644 --- a/trunk/arch/arm/plat-s5p/dev-fimc0.c +++ b/trunk/arch/arm/plat-s5p/dev-fimc0.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -19,7 +18,7 @@ static struct resource s5p_fimc0_resource[] = { [0] = { .start = S5P_PA_FIMC0, - .end = S5P_PA_FIMC0 + SZ_4K - 1, + .end = S5P_PA_FIMC0 + SZ_1M - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -29,15 +28,9 @@ static struct resource s5p_fimc0_resource[] = { }, }; -static u64 s5p_fimc0_dma_mask = DMA_BIT_MASK(32); - struct platform_device s5p_device_fimc0 = { .name = "s5p-fimc", .id = 0, .num_resources = ARRAY_SIZE(s5p_fimc0_resource), .resource = s5p_fimc0_resource, - .dev = { - .dma_mask = &s5p_fimc0_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, }; diff --git a/trunk/arch/arm/plat-s5p/dev-fimc1.c b/trunk/arch/arm/plat-s5p/dev-fimc1.c index 76e3a97a87d3..41bd6986d0ad 100644 --- a/trunk/arch/arm/plat-s5p/dev-fimc1.c +++ b/trunk/arch/arm/plat-s5p/dev-fimc1.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -19,7 +18,7 @@ static struct resource s5p_fimc1_resource[] = { [0] = { .start = S5P_PA_FIMC1, - .end = S5P_PA_FIMC1 + SZ_4K - 1, + .end = S5P_PA_FIMC1 + SZ_1M - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -29,15 +28,9 @@ static struct resource s5p_fimc1_resource[] = { }, }; -static u64 s5p_fimc1_dma_mask = DMA_BIT_MASK(32); - struct platform_device s5p_device_fimc1 = { .name = "s5p-fimc", .id = 1, .num_resources = ARRAY_SIZE(s5p_fimc1_resource), .resource = s5p_fimc1_resource, - .dev = { - .dma_mask = &s5p_fimc1_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, }; diff --git a/trunk/arch/arm/plat-s5p/dev-fimc2.c b/trunk/arch/arm/plat-s5p/dev-fimc2.c index 24d29816fa2c..dfddeda6d4a3 100644 --- a/trunk/arch/arm/plat-s5p/dev-fimc2.c +++ b/trunk/arch/arm/plat-s5p/dev-fimc2.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -19,7 +18,7 @@ static struct resource s5p_fimc2_resource[] = { [0] = { .start = S5P_PA_FIMC2, - .end = S5P_PA_FIMC2 + SZ_4K - 1, + .end = S5P_PA_FIMC2 + SZ_1M - 1, .flags = IORESOURCE_MEM, }, [1] = { @@ -29,15 +28,9 @@ static struct resource s5p_fimc2_resource[] = { }, }; -static u64 s5p_fimc2_dma_mask = DMA_BIT_MASK(32); - struct platform_device s5p_device_fimc2 = { .name = "s5p-fimc", .id = 2, .num_resources = ARRAY_SIZE(s5p_fimc2_resource), .resource = s5p_fimc2_resource, - .dev = { - .dma_mask = &s5p_fimc2_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, }; diff --git a/trunk/arch/arm/plat-samsung/gpio-config.c b/trunk/arch/arm/plat-samsung/gpio-config.c index e3d41eaed1ff..57b68a50f45e 100644 --- a/trunk/arch/arm/plat-samsung/gpio-config.c +++ b/trunk/arch/arm/plat-samsung/gpio-config.c @@ -273,13 +273,13 @@ s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) if (!chip) return -EINVAL; - off = pin - chip->chip.base; + off = chip->chip.base - pin; shift = off * 2; reg = chip->base + 0x0C; drvstr = __raw_readl(reg); + drvstr = 0xffff & (0x3 << shift); drvstr = drvstr >> shift; - drvstr &= 0x3; return (__force s5p_gpio_drvstr_t)drvstr; } @@ -296,12 +296,11 @@ int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr) if (!chip) return -EINVAL; - off = pin - chip->chip.base; + off = chip->chip.base - pin; shift = off * 2; reg = chip->base + 0x0C; tmp = __raw_readl(reg); - tmp &= ~(0x3 << shift); tmp |= drvstr << shift; __raw_writel(tmp, reg); diff --git a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 1c6b92947c5d..db4112c6f2be 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/trunk/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -143,12 +143,12 @@ extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); /* Define values for the drvstr available for each gpio pin. * * These values control the value of the output signal driver strength, - * configurable on most pins on the S5P series. + * configurable on most pins on the S5C series. */ -#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0) -#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2) -#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1) -#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3) +#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00) +#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01) +#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10) +#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11) /** * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin diff --git a/trunk/arch/arm/plat-tcc/Kconfig b/trunk/arch/arm/plat-tcc/Kconfig new file mode 100644 index 000000000000..1bf499570f42 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/Kconfig @@ -0,0 +1,20 @@ +if ARCH_TCC_926 + +menu "Telechips ARM926-based CPUs" + +choice + prompt "Telechips CPU type:" + default ARCH_TCC8K + +config ARCH_TCC8K + bool TCC8000 + select USB_ARCH_HAS_OHCI + help + Support for Telechips TCC8000 systems + +endchoice + +source "arch/arm/mach-tcc8k/Kconfig" + +endmenu +endif diff --git a/trunk/arch/arm/plat-tcc/Makefile b/trunk/arch/arm/plat-tcc/Makefile new file mode 100644 index 000000000000..3f2e4fe70d5a --- /dev/null +++ b/trunk/arch/arm/plat-tcc/Makefile @@ -0,0 +1,3 @@ +# "Telechips Platform Common Modules" + +obj-y := system.o diff --git a/trunk/arch/arm/plat-tcc/include/mach/debug-macro.S b/trunk/arch/arm/plat-tcc/include/mach/debug-macro.S new file mode 100644 index 000000000000..97537845df64 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/debug-macro.S @@ -0,0 +1,33 @@ +/* + * Copyright (C) 1994-1999 Russell King + * Copyright (C) 2008-2009 Telechips + * Copyright (C) 2009 Hans J. Koch + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + + .macro addruart,rx,tmp + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x90000000 @ physical base address + movne \rx, #0xF1000000 @ virtual base + orr \rx, \rx, #0x00007000 @ UART0 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #0x44] + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1001: + ldr \rd, [\rx, #0x14] + tst \rd, #0x20 + + beq 1001b + .endm diff --git a/trunk/arch/arm/plat-tcc/include/mach/entry-macro.S b/trunk/arch/arm/plat-tcc/include/mach/entry-macro.S new file mode 100644 index 000000000000..748f401e4b6d --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/entry-macro.S @@ -0,0 +1,68 @@ +/* + * include/asm-arm/arch-tcc83x/entry-macro.S + * + * Author : + * Created: June 10, 2008 + * Description: Low-level IRQ helper macros for Telechips-based platforms + * + * Copyright (C) 2008-2009 Telechips + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + ldr \base, =0xF2003000 @ base address of PIC registers + + @@ read MREQ register of PIC0 + + mov \irqnr, #0 + ldr \irqstat, [\base, #0x00000014 ] @ lower 32 interrupts + cmp \irqstat, #0 + bne 1001f + + @@ read MREQ register of PIC1 + + ldr \irqstat, [\base, #0x00000094] @ upper 32 interrupts + cmp \irqstat, #0 + beq 1002f + mov \irqnr, #0x20 + +1001: + movs \tmp, \irqstat, lsl #16 + movne \irqstat, \tmp + addeq \irqnr, \irqnr, #16 + + movs \tmp, \irqstat, lsl #8 + movne \irqstat, \tmp + addeq \irqnr, \irqnr, #8 + + movs \tmp, \irqstat, lsl #4 + movne \irqstat, \tmp + addeq \irqnr, \irqnr, #4 + + movs \tmp, \irqstat, lsl #2 + movne \irqstat, \tmp + addeq \irqnr, \irqnr, #2 + + movs \tmp, \irqstat, lsl #1 + addeq \irqnr, \irqnr, #1 + orrs \base, \base, #1 +1002: + @@ exit here, Z flag unset if IRQ + + .endm diff --git a/trunk/arch/arm/plat-tcc/include/mach/hardware.h b/trunk/arch/arm/plat-tcc/include/mach/hardware.h new file mode 100644 index 000000000000..e70d126ccaf3 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/hardware.h @@ -0,0 +1,43 @@ +/* + * Author: RidgeRun, Inc. Greg Lonnon + * Reorganized for Linux-2.6 by Tony Lindgren + * and Dirk Behme + * Rewritten by: + * Description: Hardware definitions for TCC8300 processors and boards + * + * Copyright (C) 2001 RidgeRun, Inc. + * Copyright (C) 2008-2009 Telechips + * + * Modifications for mainline (C) 2009 Hans J. Koch + * + * Licensed under the terms of the GNU Pulic License version 2. + */ + +#ifndef __ASM_ARCH_TCC_HARDWARE_H +#define __ASM_ARCH_TCC_HARDWARE_H + +#include +#ifndef __ASSEMBLER__ +#include +#endif +#include + +/* + * ---------------------------------------------------------------------------- + * Clocks + * ---------------------------------------------------------------------------- + */ +#define CLKGEN_REG_BASE 0xfffece00 +#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) +#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) +#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) +#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) +#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) +#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) +#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) +#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) + +/* DPLL control registers */ +#define DPLL_CTL 0xfffecf00 + +#endif /* __ASM_ARCH_TCC_HARDWARE_H */ diff --git a/trunk/arch/arm/plat-tcc/include/mach/memory.h b/trunk/arch/arm/plat-tcc/include/mach/memory.h new file mode 100644 index 000000000000..cd91ba8a670b --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/memory.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 1999 ARM Limited + * Copyright (C) 2000 RidgeRun, Inc. + * Copyright (C) 2008-2009 Telechips + * Copyright (C) 2010 Hans J. Koch + * + * Licensed under the terms of the GPL v2. + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x20000000) + +#endif diff --git a/trunk/arch/arm/plat-tcc/include/mach/system.h b/trunk/arch/arm/plat-tcc/include/mach/system.h new file mode 100644 index 000000000000..909e6035d843 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/system.h @@ -0,0 +1,31 @@ +/* + * Author: + * Created: June 10, 2008 + * Description: LINUX SYSTEM FUNCTIONS for TCC83x + * + * Copyright (C) 2008-2009 Telechips + * + * Licensed under the terms of the GPL v2. + * + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H +#include + +#include +#include + +extern void plat_tcc_reboot(void); + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + plat_tcc_reboot(); +} + +#endif diff --git a/trunk/arch/arm/plat-tcc/include/mach/tcc8k-regs.h b/trunk/arch/arm/plat-tcc/include/mach/tcc8k-regs.h new file mode 100644 index 000000000000..f3243ebea463 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/tcc8k-regs.h @@ -0,0 +1,796 @@ +/* + * Telechips TCC8000 register definitions + * + * (C) 2009 Hans J. Koch + * + * Licensed under the terms of the GPLv2. + */ + +#ifndef TCC8K_REGS_H +#define TCC8K_REGS_H + +#include + +#define EXT_SDRAM_BASE 0x20000000 +#define INT_SRAM_BASE 0x30000000 +#define INT_SRAM_SIZE SZ_32K +#define CS0_BASE 0x40000000 +#define CS1_BASE 0x50000000 +#define CS1_SIZE SZ_64K +#define CS2_BASE 0x60000000 +#define CS3_BASE 0x70000000 +#define AHB_PERI_BASE 0x80000000 +#define AHB_PERI_SIZE SZ_64K +#define APB0_PERI_BASE 0x90000000 +#define APB0_PERI_SIZE SZ_128K +#define APB1_PERI_BASE 0x98000000 +#define APB1_PERI_SIZE SZ_128K +#define DATA_TCM_BASE 0xa0000000 +#define DATA_TCM_SIZE SZ_8K +#define EXT_MEM_CTRL_BASE 0xf0000000 +#define EXT_MEM_CTRL_SIZE SZ_4K + +#define CS1_BASE_VIRT 0xf7000000 +#define AHB_PERI_BASE_VIRT 0xf4000000 +#define APB0_PERI_BASE_VIRT 0xf1000000 +#define APB1_PERI_BASE_VIRT 0xf2000000 +#define EXT_MEM_CTRL_BASE_VIRT 0xf3000000 +#define INT_SRAM_BASE_VIRT 0xf5000000 +#define DATA_TCM_BASE_VIRT 0xf6000000 + +#define __REG(x) (*((volatile u32 *)(x))) + +/* USB Device Controller Registers */ +#define UDC_BASE (AHB_PERI_BASE_VIRT + 0x8000) +#define UDC_BASE_PHYS (AHB_PERI_BASE + 0x8000) + +#define UDC_IR_OFFS 0x00 +#define UDC_EIR_OFFS 0x04 +#define UDC_EIER_OFFS 0x08 +#define UDC_FAR_OFFS 0x0c +#define UDC_FNR_OFFS 0x10 +#define UDC_EDR_OFFS 0x14 +#define UDC_RT_OFFS 0x18 +#define UDC_SSR_OFFS 0x1c +#define UDC_SCR_OFFS 0x20 +#define UDC_EP0SR_OFFS 0x24 +#define UDC_EP0CR_OFFS 0x28 + +#define UDC_ESR_OFFS 0x2c +#define UDC_ECR_OFFS 0x30 +#define UDC_BRCR_OFFS 0x34 +#define UDC_BWCR_OFFS 0x38 +#define UDC_MPR_OFFS 0x3c +#define UDC_DCR_OFFS 0x40 +#define UDC_DTCR_OFFS 0x44 +#define UDC_DFCR_OFFS 0x48 +#define UDC_DTTCR1_OFFS 0x4c +#define UDC_DTTCR2_OFFS 0x50 +#define UDC_ESR2_OFFS 0x54 + +#define UDC_SCR2_OFFS 0x58 +#define UDC_EP0BUF_OFFS 0x60 +#define UDC_EP1BUF_OFFS 0x64 +#define UDC_EP2BUF_OFFS 0x68 +#define UDC_EP3BUF_OFFS 0x6c +#define UDC_PLICR_OFFS 0xa0 +#define UDC_PCR_OFFS 0xa4 + +#define UDC_UPCR0_OFFS 0xc8 +#define UDC_UPCR1_OFFS 0xcc +#define UDC_UPCR2_OFFS 0xd0 +#define UDC_UPCR3_OFFS 0xd4 + +/* Bits in UDC_EIR */ +#define UDC_EIR_EP0I (1 << 0) +#define UDC_EIR_EP1I (1 << 1) +#define UDC_EIR_EP2I (1 << 2) +#define UDC_EIR_EP3I (1 << 3) +#define UDC_EIR_EPI_MASK 0x0f + +/* Bits in UDC_EIER */ +#define UDC_EIER_EP0IE (1 << 0) +#define UDC_EIER_EP1IE (1 << 1) +#define UDC_EIER_EP2IE (1 << 2) +#define UDC_EIER_EP3IE (1 << 3) + +/* Bits in UDC_FNR */ +#define UDC_FNR_FN_MASK 0x7ff +#define UDC_FNR_SM (1 << 13) +#define UDC_FNR_FTL (1 << 14) + +/* Bits in UDC_SSR */ +#define UDC_SSR_HFRES (1 << 0) +#define UDC_SSR_HFSUSP (1 << 1) +#define UDC_SSR_HFRM (1 << 2) +#define UDC_SSR_SDE (1 << 3) +#define UDC_SSR_HSP (1 << 4) +#define UDC_SSR_DM (1 << 5) +#define UDC_SSR_DP (1 << 6) +#define UDC_SSR_TBM (1 << 7) +#define UDC_SSR_VBON (1 << 8) +#define UDC_SSR_VBOFF (1 << 9) +#define UDC_SSR_EOERR (1 << 10) +#define UDC_SSR_DCERR (1 << 11) +#define UDC_SSR_TCERR (1 << 12) +#define UDC_SSR_BSERR (1 << 13) +#define UDC_SSR_TMERR (1 << 14) +#define UDC_SSR_BAERR (1 << 15) + +/* Bits in UDC_SCR */ +#define UDC_SCR_HRESE (1 << 0) +#define UDC_SCR_HSSPE (1 << 1) +#define UDC_SCR_RRDE (1 << 5) +#define UDC_SCR_SPDEN (1 << 6) +#define UDC_SCR_DIEN (1 << 12) + +/* Bits in UDC_EP0SR */ +#define UDC_EP0SR_RSR (1 << 0) +#define UDC_EP0SR_TST (1 << 1) +#define UDC_EP0SR_SHT (1 << 4) +#define UDC_EP0SR_LWO (1 << 6) + +/* Bits in UDC_EP0CR */ +#define UDC_EP0CR_ESS (1 << 1) + +/* Bits in UDC_ESR */ +#define UDC_ESR_RPS (1 << 0) +#define UDC_ESR_TPS (1 << 1) +#define UDC_ESR_LWO (1 << 4) +#define UDC_ESR_FFS (1 << 6) + +/* Bits in UDC_ECR */ +#define UDC_ECR_ESS (1 << 1) +#define UDC_ECR_CDP (1 << 2) + +#define UDC_ECR_FLUSH (1 << 6) +#define UDC_ECR_DUEN (1 << 7) + +/* Bits in UDC_UPCR0 */ +#define UDC_UPCR0_VBD (1 << 1) +#define UDC_UPCR0_VBDS (1 << 6) +#define UDC_UPCR0_RCD_12 (0x0 << 9) +#define UDC_UPCR0_RCD_24 (0x1 << 9) +#define UDC_UPCR0_RCD_48 (0x2 << 9) +#define UDC_UPCR0_RCS_EXT (0x1 << 11) +#define UDC_UPCR0_RCS_XTAL (0x0 << 11) + +/* Bits in UDC_UPCR1 */ +#define UDC_UPCR1_CDT(x) ((x) << 0) +#define UDC_UPCR1_OTGT(x) ((x) << 3) +#define UDC_UPCR1_SQRXT(x) ((x) << 8) +#define UDC_UPCR1_TXFSLST(x) ((x) << 12) + +/* Bits in UDC_UPCR2 */ +#define UDC_UPCR2_TP (1 << 0) +#define UDC_UPCR2_TXRT(x) ((x) << 2) +#define UDC_UPCR2_TXVRT(x) ((x) << 5) +#define UDC_UPCR2_OPMODE(x) ((x) << 9) +#define UDC_UPCR2_XCVRSEL(x) ((x) << 12) +#define UDC_UPCR2_TM (1 << 14) + +/* USB Host Controller registers */ +#define USBH0_BASE (AHB_PERI_BASE_VIRT + 0xb000) +#define USBH1_BASE (AHB_PERI_BASE_VIRT + 0xb800) + +#define OHCI_INT_ENABLE_OFFS 0x10 + +#define RH_DESCRIPTOR_A_OFFS 0x48 +#define RH_DESCRIPTOR_B_OFFS 0x4c + +#define USBHTCFG0_OFFS 0x100 +#define USBHHCFG0_OFFS 0x104 +#define USBHHCFG1_OFFS 0x104 + +/* DMA controller registers */ +#define DMAC0_BASE (AHB_PERI_BASE + 0x4000) +#define DMAC1_BASE (AHB_PERI_BASE + 0xa000) +#define DMAC2_BASE (AHB_PERI_BASE + 0x4800) +#define DMAC3_BASE (AHB_PERI_BASE + 0xa800) + +#define DMAC_CH_OFFSET(ch) (ch * 0x30) + +#define ST_SADR_OFFS 0x00 +#define SPARAM_OFFS 0x04 +#define C_SADR_OFFS 0x0c +#define ST_DADR_OFFS 0x10 +#define DPARAM_OFFS 0x14 +#define C_DADR_OFFS 0x1c +#define HCOUNT_OFFS 0x20 +#define CHCTRL_OFFS 0x24 +#define RPTCTRL_OFFS 0x28 +#define EXTREQ_A_OFFS 0x2c + +/* Bits in CHCTRL register */ +#define CHCTRL_EN (1 << 0) + +#define CHCTRL_IEN (1 << 2) +#define CHCTRL_FLAG (1 << 3) +#define CHCTRL_WSIZE8 (0 << 4) +#define CHCTRL_WSIZE16 (1 << 4) +#define CHCTRL_WSIZE32 (2 << 4) + +#define CHCTRL_BSIZE1 (0 << 6) +#define CHCTRL_BSIZE2 (1 << 6) +#define CHCTRL_BSIZE4 (2 << 6) +#define CHCTRL_BSIZE8 (3 << 6) + +#define CHCTRL_TYPE_SINGLE_E (0 << 8) +#define CHCTRL_TYPE_HW (1 << 8) +#define CHCTRL_TYPE_SW (2 << 8) +#define CHCTRL_TYPE_SINGLE_L (3 << 8) + +#define CHCTRL_BST (1 << 10) + +/* Use DMA controller 0, channel 2 for USB */ +#define USB_DMA_BASE (DMAC0_BASE + DMAC_CH_OFFSET(2)) + +/* NAND flash controller registers */ +#define NFC_BASE (AHB_PERI_BASE_VIRT + 0xd000) +#define NFC_BASE_PHYS (AHB_PERI_BASE + 0xd000) + +#define NFC_CMD_OFFS 0x00 +#define NFC_LADDR_OFFS 0x04 +#define NFC_BADDR_OFFS 0x08 +#define NFC_SADDR_OFFS 0x0c +#define NFC_WDATA_OFFS 0x10 +#define NFC_LDATA_OFFS 0x20 +#define NFC_SDATA_OFFS 0x40 +#define NFC_CTRL_OFFS 0x50 +#define NFC_PSTART_OFFS 0x54 +#define NFC_RSTART_OFFS 0x58 +#define NFC_DSIZE_OFFS 0x5c +#define NFC_IREQ_OFFS 0x60 +#define NFC_RST_OFFS 0x64 +#define NFC_CTRL1_OFFS 0x68 +#define NFC_MDATA_OFFS 0x70 + +#define NFC_WDATA_PHYS_ADDR (NFC_BASE_PHYS + NFC_WDATA_OFFS) + +/* Bits in NFC_CTRL */ +#define NFC_CTRL_BHLD_MASK (0xf << 0) +#define NFC_CTRL_BPW_MASK (0xf << 4) +#define NFC_CTRL_BSTP_MASK (0xf << 8) +#define NFC_CTRL_CADDR_MASK (0x7 << 12) +#define NFC_CTRL_CADDR_1 (0x0 << 12) +#define NFC_CTRL_CADDR_2 (0x1 << 12) +#define NFC_CTRL_CADDR_3 (0x2 << 12) +#define NFC_CTRL_CADDR_4 (0x3 << 12) +#define NFC_CTRL_CADDR_5 (0x4 << 12) +#define NFC_CTRL_MSK (1 << 15) +#define NFC_CTRL_PSIZE256 (0 << 16) +#define NFC_CTRL_PSIZE512 (1 << 16) +#define NFC_CTRL_PSIZE1024 (2 << 16) +#define NFC_CTRL_PSIZE2048 (3 << 16) +#define NFC_CTRL_PSIZE4096 (4 << 16) +#define NFC_CTRL_PSIZE_MASK (7 << 16) +#define NFC_CTRL_BSIZE1 (0 << 19) +#define NFC_CTRL_BSIZE2 (1 << 19) +#define NFC_CTRL_BSIZE4 (2 << 19) +#define NFC_CTRL_BSIZE8 (3 << 19) +#define NFC_CTRL_BSIZE_MASK (3 << 19) +#define NFC_CTRL_RDY (1 << 21) +#define NFC_CTRL_CS0SEL (1 << 22) +#define NFC_CTRL_CS1SEL (1 << 23) +#define NFC_CTRL_CS2SEL (1 << 24) +#define NFC_CTRL_CS3SEL (1 << 25) +#define NFC_CTRL_CSMASK (0xf << 22) +#define NFC_CTRL_BW (1 << 26) +#define NFC_CTRL_FS (1 << 27) +#define NFC_CTRL_DEN (1 << 28) +#define NFC_CTRL_READ_IEN (1 << 29) +#define NFC_CTRL_PROG_IEN (1 << 30) +#define NFC_CTRL_RDY_IEN (1 << 31) + +/* Bits in NFC_IREQ */ +#define NFC_IREQ_IRQ0 (1 << 0) +#define NFC_IREQ_IRQ1 (1 << 1) +#define NFC_IREQ_IRQ2 (1 << 2) + +#define NFC_IREQ_FLAG0 (1 << 4) +#define NFC_IREQ_FLAG1 (1 << 5) +#define NFC_IREQ_FLAG2 (1 << 6) + +/* MMC controller registers */ +#define MMC0_BASE (AHB_PERI_BASE_VIRT + 0xe000) +#define MMC1_BASE (AHB_PERI_BASE_VIRT + 0xe800) + +/* UART base addresses */ + +#define UART0_BASE (APB0_PERI_BASE_VIRT + 0x07000) +#define UART0_BASE_PHYS (APB0_PERI_BASE + 0x07000) +#define UART1_BASE (APB0_PERI_BASE_VIRT + 0x08000) +#define UART1_BASE_PHYS (APB0_PERI_BASE + 0x08000) +#define UART2_BASE (APB0_PERI_BASE_VIRT + 0x09000) +#define UART2_BASE_PHYS (APB0_PERI_BASE + 0x09000) +#define UART3_BASE (APB0_PERI_BASE_VIRT + 0x0a000) +#define UART3_BASE_PHYS (APB0_PERI_BASE + 0x0a000) +#define UART4_BASE (APB0_PERI_BASE_VIRT + 0x15000) +#define UART4_BASE_PHYS (APB0_PERI_BASE + 0x15000) + +#define UART_BASE UART0_BASE +#define UART_BASE_PHYS UART0_BASE_PHYS + +/* ECC controller */ +#define ECC_CTR_BASE (APB0_PERI_BASE_VIRT + 0xd000) + +#define ECC_CTRL_OFFS 0x00 +#define ECC_BASE_OFFS 0x04 +#define ECC_MASK_OFFS 0x08 +#define ECC_CLEAR_OFFS 0x0c +#define ECC4_0_OFFS 0x10 +#define ECC4_1_OFFS 0x14 + +#define ECC_EADDR0_OFFS 0x50 + +#define ECC_ERRNUM_OFFS 0x90 +#define ECC_IREQ_OFFS 0x94 + +/* Bits in ECC_CTRL */ +#define ECC_CTRL_ECC4_DIEN (1 << 28) +#define ECC_CTRL_ECC8_DIEN (1 << 29) +#define ECC_CTRL_ECC12_DIEN (1 << 30) +#define ECC_CTRL_ECC_DISABLE 0x0 +#define ECC_CTRL_ECC_SLC_ENC 0x8 +#define ECC_CTRL_ECC_SLC_DEC 0x9 +#define ECC_CTRL_ECC4_ENC 0xa +#define ECC_CTRL_ECC4_DEC 0xb +#define ECC_CTRL_ECC8_ENC 0xc +#define ECC_CTRL_ECC8_DEC 0xd +#define ECC_CTRL_ECC12_ENC 0xe +#define ECC_CTRL_ECC12_DEC 0xf + +/* Bits in ECC_IREQ */ +#define ECC_IREQ_E4DI (1 << 4) + +#define ECC_IREQ_E4DF (1 << 20) +#define ECC_IREQ_E4EF (1 << 21) + +/* Interrupt controller */ + +#define PIC0_BASE (APB1_PERI_BASE_VIRT + 0x3000) +#define PIC0_BASE_PHYS (APB1_PERI_BASE + 0x3000) + +#define PIC0_IEN_OFFS 0x00 +#define PIC0_CREQ_OFFS 0x04 +#define PIC0_IREQ_OFFS 0x08 +#define PIC0_IRQSEL_OFFS 0x0c +#define PIC0_SRC_OFFS 0x10 +#define PIC0_MREQ_OFFS 0x14 +#define PIC0_TSTREQ_OFFS 0x18 +#define PIC0_POL_OFFS 0x1c +#define PIC0_IRQ_OFFS 0x20 +#define PIC0_FIQ_OFFS 0x24 +#define PIC0_MIRQ_OFFS 0x28 +#define PIC0_MFIQ_OFFS 0x2c +#define PIC0_TMODE_OFFS 0x30 +#define PIC0_SYNC_OFFS 0x34 +#define PIC0_WKUP_OFFS 0x38 +#define PIC0_TMODEA_OFFS 0x3c +#define PIC0_INTOEN_OFFS 0x40 +#define PIC0_MEN0_OFFS 0x44 +#define PIC0_MEN_OFFS 0x48 + +#define PIC0_IEN __REG(PIC0_BASE + PIC0_IEN_OFFS) +#define PIC0_IEN_PHYS __REG(PIC0_BASE_PHYS + PIC0_IEN_OFFS) +#define PIC0_CREQ __REG(PIC0_BASE + PIC0_CREQ_OFFS) +#define PIC0_CREQ_PHYS __REG(PIC0_BASE_PHYS + PIC0_CREQ_OFFS) +#define PIC0_IREQ __REG(PIC0_BASE + PIC0_IREQ_OFFS) +#define PIC0_IRQSEL __REG(PIC0_BASE + PIC0_IRQSEL_OFFS) +#define PIC0_IRQSEL_PHYS __REG(PIC0_BASE_PHYS + PIC0_IRQSEL_OFFS) +#define PIC0_SRC __REG(PIC0_BASE + PIC0_SRC_OFFS) +#define PIC0_MREQ __REG(PIC0_BASE + PIC0_MREQ_OFFS) +#define PIC0_TSTREQ __REG(PIC0_BASE + PIC0_TSTREQ_OFFS) +#define PIC0_POL __REG(PIC0_BASE + PIC0_POL_OFFS) +#define PIC0_IRQ __REG(PIC0_BASE + PIC0_IRQ_OFFS) +#define PIC0_FIQ __REG(PIC0_BASE + PIC0_FIQ_OFFS) +#define PIC0_MIRQ __REG(PIC0_BASE + PIC0_MIRQ_OFFS) +#define PIC0_MFIQ __REG(PIC0_BASE + PIC0_MFIQ_OFFS) +#define PIC0_TMODE __REG(PIC0_BASE + PIC0_TMODE_OFFS) +#define PIC0_TMODE_PHYS __REG(PIC0_BASE_PHYS + PIC0_TMODE_OFFS) +#define PIC0_SYNC __REG(PIC0_BASE + PIC0_SYNC_OFFS) +#define PIC0_WKUP __REG(PIC0_BASE + PIC0_WKUP_OFFS) +#define PIC0_TMODEA __REG(PIC0_BASE + PIC0_TMODEA_OFFS) +#define PIC0_INTOEN __REG(PIC0_BASE + PIC0_INTOEN_OFFS) +#define PIC0_MEN0 __REG(PIC0_BASE + PIC0_MEN0_OFFS) +#define PIC0_MEN __REG(PIC0_BASE + PIC0_MEN_OFFS) + +#define PIC1_BASE (APB1_PERI_BASE_VIRT + 0x3080) + +#define PIC1_IEN_OFFS 0x00 +#define PIC1_CREQ_OFFS 0x04 +#define PIC1_IREQ_OFFS 0x08 +#define PIC1_IRQSEL_OFFS 0x0c +#define PIC1_SRC_OFFS 0x10 +#define PIC1_MREQ_OFFS 0x14 +#define PIC1_TSTREQ_OFFS 0x18 +#define PIC1_POL_OFFS 0x1c +#define PIC1_IRQ_OFFS 0x20 +#define PIC1_FIQ_OFFS 0x24 +#define PIC1_MIRQ_OFFS 0x28 +#define PIC1_MFIQ_OFFS 0x2c +#define PIC1_TMODE_OFFS 0x30 +#define PIC1_SYNC_OFFS 0x34 +#define PIC1_WKUP_OFFS 0x38 +#define PIC1_TMODEA_OFFS 0x3c +#define PIC1_INTOEN_OFFS 0x40 +#define PIC1_MEN1_OFFS 0x44 +#define PIC1_MEN_OFFS 0x48 + +#define PIC1_IEN __REG(PIC1_BASE + PIC1_IEN_OFFS) +#define PIC1_CREQ __REG(PIC1_BASE + PIC1_CREQ_OFFS) +#define PIC1_IREQ __REG(PIC1_BASE + PIC1_IREQ_OFFS) +#define PIC1_IRQSEL __REG(PIC1_BASE + PIC1_IRQSEL_OFFS) +#define PIC1_SRC __REG(PIC1_BASE + PIC1_SRC_OFFS) +#define PIC1_MREQ __REG(PIC1_BASE + PIC1_MREQ_OFFS) +#define PIC1_TSTREQ __REG(PIC1_BASE + PIC1_TSTREQ_OFFS) +#define PIC1_POL __REG(PIC1_BASE + PIC1_POL_OFFS) +#define PIC1_IRQ __REG(PIC1_BASE + PIC1_IRQ_OFFS) +#define PIC1_FIQ __REG(PIC1_BASE + PIC1_FIQ_OFFS) +#define PIC1_MIRQ __REG(PIC1_BASE + PIC1_MIRQ_OFFS) +#define PIC1_MFIQ __REG(PIC1_BASE + PIC1_MFIQ_OFFS) +#define PIC1_TMODE __REG(PIC1_BASE + PIC1_TMODE_OFFS) +#define PIC1_SYNC __REG(PIC1_BASE + PIC1_SYNC_OFFS) +#define PIC1_WKUP __REG(PIC1_BASE + PIC1_WKUP_OFFS) +#define PIC1_TMODEA __REG(PIC1_BASE + PIC1_TMODEA_OFFS) +#define PIC1_INTOEN __REG(PIC1_BASE + PIC1_INTOEN_OFFS) +#define PIC1_MEN1 __REG(PIC1_BASE + PIC1_MEN1_OFFS) +#define PIC1_MEN __REG(PIC1_BASE + PIC1_MEN_OFFS) + +/* Timer registers */ +#define TIMER_BASE (APB1_PERI_BASE_VIRT + 0x4000) +#define TIMER_BASE_PHYS (APB1_PERI_BASE + 0x4000) + +#define TWDCFG_OFFS 0x70 + +#define TC32EN_OFFS 0x80 +#define TC32LDV_OFFS 0x84 +#define TC32CMP0_OFFS 0x88 +#define TC32CMP1_OFFS 0x8c +#define TC32PCNT_OFFS 0x90 +#define TC32MCNT_OFFS 0x94 +#define TC32IRQ_OFFS 0x98 + +/* Bits in TC32EN */ +#define TC32EN_PRESCALE_MASK 0x00ffffff +#define TC32EN_ENABLE (1 << 24) +#define TC32EN_LOADZERO (1 << 25) +#define TC32EN_STOPMODE (1 << 26) +#define TC32EN_LDM0 (1 << 28) +#define TC32EN_LDM1 (1 << 29) + +/* Bits in TC32IRQ */ +#define TC32IRQ_MSTAT_MASK 0x0000001f +#define TC32IRQ_RSTAT_MASK (0x1f << 8) +#define TC32IRQ_IRQEN0 (1 << 16) +#define TC32IRQ_IRQEN1 (1 << 17) +#define TC32IRQ_IRQEN2 (1 << 18) +#define TC32IRQ_IRQEN3 (1 << 19) +#define TC32IRQ_IRQEN4 (1 << 20) +#define TC32IRQ_RSYNC (1 << 30) +#define TC32IRQ_IRQCLR (1 << 31) + +/* GPIO registers */ +#define GPIOPD_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOPD_DAT_OFFS 0x00 +#define GPIOPD_DOE_OFFS 0x04 +#define GPIOPD_FS0_OFFS 0x08 +#define GPIOPD_FS1_OFFS 0x0c +#define GPIOPD_FS2_OFFS 0x10 +#define GPIOPD_RPU_OFFS 0x30 +#define GPIOPD_RPD_OFFS 0x34 +#define GPIOPD_DV0_OFFS 0x38 +#define GPIOPD_DV1_OFFS 0x3c + +#define GPIOPS_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOPS_DAT_OFFS 0x40 +#define GPIOPS_DOE_OFFS 0x44 +#define GPIOPS_FS0_OFFS 0x48 +#define GPIOPS_FS1_OFFS 0x4c +#define GPIOPS_FS2_OFFS 0x50 +#define GPIOPS_FS3_OFFS 0x54 +#define GPIOPS_RPU_OFFS 0x70 +#define GPIOPS_RPD_OFFS 0x74 +#define GPIOPS_DV0_OFFS 0x78 +#define GPIOPS_DV1_OFFS 0x7c + +#define GPIOPS_FS1_SDH0_BITS 0x000000ff +#define GPIOPS_FS1_SDH1_BITS 0x0000ff00 + +#define GPIOPU_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOPU_DAT_OFFS 0x80 +#define GPIOPU_DOE_OFFS 0x84 +#define GPIOPU_FS0_OFFS 0x88 +#define GPIOPU_FS1_OFFS 0x8c +#define GPIOPU_FS2_OFFS 0x90 +#define GPIOPU_RPU_OFFS 0xb0 +#define GPIOPU_RPD_OFFS 0xb4 +#define GPIOPU_DV0_OFFS 0xb8 +#define GPIOPU_DV1_OFFS 0xbc + +#define GPIOPU_FS0_TXD0 (1 << 0) +#define GPIOPU_FS0_RXD0 (1 << 1) +#define GPIOPU_FS0_CTS0 (1 << 2) +#define GPIOPU_FS0_RTS0 (1 << 3) +#define GPIOPU_FS0_TXD1 (1 << 4) +#define GPIOPU_FS0_RXD1 (1 << 5) +#define GPIOPU_FS0_CTS1 (1 << 6) +#define GPIOPU_FS0_RTS1 (1 << 7) +#define GPIOPU_FS0_TXD2 (1 << 8) +#define GPIOPU_FS0_RXD2 (1 << 9) +#define GPIOPU_FS0_CTS2 (1 << 10) +#define GPIOPU_FS0_RTS2 (1 << 11) +#define GPIOPU_FS0_TXD3 (1 << 12) +#define GPIOPU_FS0_RXD3 (1 << 13) +#define GPIOPU_FS0_CTS3 (1 << 14) +#define GPIOPU_FS0_RTS3 (1 << 15) +#define GPIOPU_FS0_TXD4 (1 << 16) +#define GPIOPU_FS0_RXD4 (1 << 17) +#define GPIOPU_FS0_CTS4 (1 << 18) +#define GPIOPU_FS0_RTS4 (1 << 19) + +#define GPIOFC_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOFC_DAT_OFFS 0xc0 +#define GPIOFC_DOE_OFFS 0xc4 +#define GPIOFC_FS0_OFFS 0xc8 +#define GPIOFC_FS1_OFFS 0xcc +#define GPIOFC_FS2_OFFS 0xd0 +#define GPIOFC_FS3_OFFS 0xd4 +#define GPIOFC_RPU_OFFS 0xf0 +#define GPIOFC_RPD_OFFS 0xf4 +#define GPIOFC_DV0_OFFS 0xf8 +#define GPIOFC_DV1_OFFS 0xfc + +#define GPIOFD_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOFD_DAT_OFFS 0x100 +#define GPIOFD_DOE_OFFS 0x104 +#define GPIOFD_FS0_OFFS 0x108 +#define GPIOFD_FS1_OFFS 0x10c +#define GPIOFD_FS2_OFFS 0x110 +#define GPIOFD_RPU_OFFS 0x130 +#define GPIOFD_RPD_OFFS 0x134 +#define GPIOFD_DV0_OFFS 0x138 +#define GPIOFD_DV1_OFFS 0x13c + +#define GPIOLC_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOLC_DAT_OFFS 0x140 +#define GPIOLC_DOE_OFFS 0x144 +#define GPIOLC_FS0_OFFS 0x148 +#define GPIOLC_FS1_OFFS 0x14c +#define GPIOLC_RPU_OFFS 0x170 +#define GPIOLC_RPD_OFFS 0x174 +#define GPIOLC_DV0_OFFS 0x178 +#define GPIOLC_DV1_OFFS 0x17c + +#define GPIOLD_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOLD_DAT_OFFS 0x180 +#define GPIOLD_DOE_OFFS 0x184 +#define GPIOLD_FS0_OFFS 0x188 +#define GPIOLD_FS1_OFFS 0x18c +#define GPIOLD_FS2_OFFS 0x190 +#define GPIOLD_RPU_OFFS 0x1b0 +#define GPIOLD_RPD_OFFS 0x1b4 +#define GPIOLD_DV0_OFFS 0x1b8 +#define GPIOLD_DV1_OFFS 0x1bc + +#define GPIOAD_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOAD_DAT_OFFS 0x1c0 +#define GPIOAD_DOE_OFFS 0x1c4 +#define GPIOAD_FS0_OFFS 0x1c8 +#define GPIOAD_RPU_OFFS 0x1f0 +#define GPIOAD_RPD_OFFS 0x1f4 +#define GPIOAD_DV0_OFFS 0x1f8 +#define GPIOAD_DV1_OFFS 0x1fc + +#define GPIOXC_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOXC_DAT_OFFS 0x200 +#define GPIOXC_DOE_OFFS 0x204 +#define GPIOXC_FS0_OFFS 0x208 +#define GPIOXC_RPU_OFFS 0x230 +#define GPIOXC_RPD_OFFS 0x234 +#define GPIOXC_DV0_OFFS 0x238 +#define GPIOXC_DV1_OFFS 0x23c + +#define GPIOXC_FS0 __REG(GPIOXC_BASE + GPIOXC_FS0_OFFS) + +#define GPIOXC_FS0_CS0 (1 << 26) +#define GPIOXC_FS0_CS1 (1 << 27) + +#define GPIOXD_BASE (APB1_PERI_BASE_VIRT + 0x5000) + +#define GPIOXD_DAT_OFFS 0x240 +#define GPIOXD_FS0_OFFS 0x248 +#define GPIOXD_RPU_OFFS 0x270 +#define GPIOXD_RPD_OFFS 0x274 +#define GPIOXD_DV0_OFFS 0x278 +#define GPIOXD_DV1_OFFS 0x27c + +#define GPIOPK_BASE (APB1_PERI_BASE_VIRT + 0x1c000) + +#define GPIOPK_RST_OFFS 0x008 +#define GPIOPK_DAT_OFFS 0x100 +#define GPIOPK_DOE_OFFS 0x104 +#define GPIOPK_FS0_OFFS 0x108 +#define GPIOPK_FS1_OFFS 0x10c +#define GPIOPK_FS2_OFFS 0x110 +#define GPIOPK_IRQST_OFFS 0x210 +#define GPIOPK_IRQEN_OFFS 0x214 +#define GPIOPK_IRQPOL_OFFS 0x218 +#define GPIOPK_IRQTM0_OFFS 0x21c +#define GPIOPK_IRQTM1_OFFS 0x220 +#define GPIOPK_CTL_OFFS 0x22c + +#define PMGPIO_BASE (APB1_PERI_BASE_VIRT + 0x10000) +#define BACKUP_RAM_BASE PMGPIO_BASE + +#define PMGPIO_DAT_OFFS 0x800 +#define PMGPIO_DOE_OFFS 0x804 +#define PMGPIO_FS0_OFFS 0x808 +#define PMGPIO_RPU_OFFS 0x810 +#define PMGPIO_RPD_OFFS 0x814 +#define PMGPIO_DV0_OFFS 0x818 +#define PMGPIO_DV1_OFFS 0x81c +#define PMGPIO_EE0_OFFS 0x820 +#define PMGPIO_EE1_OFFS 0x824 +#define PMGPIO_CTL_OFFS 0x828 +#define PMGPIO_DI_OFFS 0x82c +#define PMGPIO_STR_OFFS 0x830 +#define PMGPIO_STF_OFFS 0x834 +#define PMGPIO_POL_OFFS 0x838 +#define PMGPIO_APB_OFFS 0x800 + +/* Clock controller registers */ +#define CKC_BASE (APB1_PERI_BASE_VIRT + 0x6000) +#define CKC_BASE_PHYS (APB1_PERI_BASE + 0x6000) + +#define CLKCTRL_OFFS 0x00 +#define PLL0CFG_OFFS 0x04 +#define PLL1CFG_OFFS 0x08 +#define CLKDIVC0_OFFS 0x0c + +#define BCLKCTR0_OFFS 0x14 +#define SWRESET0_OFFS 0x18 + +#define BCLKCTR1_OFFS 0x60 +#define SWRESET1_OFFS 0x64 +#define PWDCTL_OFFS 0x68 +#define PLL2CFG_OFFS 0x6c +#define CLKDIVC1_OFFS 0x70 + +#define ACLKREF_OFFS 0x80 +#define ACLKI2C_OFFS 0x84 +#define ACLKSPI0_OFFS 0x88 +#define ACLKSPI1_OFFS 0x8c +#define ACLKUART0_OFFS 0x90 +#define ACLKUART1_OFFS 0x94 +#define ACLKUART2_OFFS 0x98 +#define ACLKUART3_OFFS 0x9c +#define ACLKUART4_OFFS 0xa0 +#define ACLKTCT_OFFS 0xa4 +#define ACLKTCX_OFFS 0xa8 +#define ACLKTCZ_OFFS 0xac +#define ACLKADC_OFFS 0xb0 +#define ACLKDAI0_OFFS 0xb4 +#define ACLKDAI1_OFFS 0xb8 +#define ACLKLCD_OFFS 0xbc +#define ACLKSPDIF_OFFS 0xc0 +#define ACLKUSBH_OFFS 0xc4 +#define ACLKSDH0_OFFS 0xc8 +#define ACLKSDH1_OFFS 0xcc +#define ACLKC3DEC_OFFS 0xd0 +#define ACLKEXT_OFFS 0xd4 +#define ACLKCAN0_OFFS 0xd8 +#define ACLKCAN1_OFFS 0xdc +#define ACLKGSB0_OFFS 0xe0 +#define ACLKGSB1_OFFS 0xe4 +#define ACLKGSB2_OFFS 0xe8 +#define ACLKGSB3_OFFS 0xec + +#define PLLxCFG_PD (1 << 31) + +/* CLKCTRL bits */ +#define CLKCTRL_XE (1 << 31) + +/* CLKDIVCx bits */ +#define CLKDIVC0_XTE (1 << 7) +#define CLKDIVC0_XE (1 << 15) +#define CLKDIVC0_P1E (1 << 23) +#define CLKDIVC0_P0E (1 << 31) + +#define CLKDIVC1_P2E (1 << 7) + +/* BCLKCTR0 clock bits */ +#define BCLKCTR0_USBD (1 << 4) +#define BCLKCTR0_ECC (1 << 9) +#define BCLKCTR0_USBH0 (1 << 11) +#define BCLKCTR0_NFC (1 << 16) + +/* BCLKCTR1 clock bits */ +#define BCLKCTR1_USBH1 (1 << 20) + +/* SWRESET0 bits */ +#define SWRESET0_USBD (1 << 4) +#define SWRESET0_USBH0 (1 << 11) + +/* SWRESET1 bits */ +#define SWRESET1_USBH1 (1 << 20) + +/* System clock sources */ +enum root_clks { + CLK_SRC_PLL0 = 0, + CLK_SRC_PLL1, + CLK_SRC_PLL0DIV, + CLK_SRC_PLL1DIV, + CLK_SRC_XI, + CLK_SRC_XIDIV, + CLK_SRC_XTI, + CLK_SRC_XTIDIV, + CLK_SRC_PLL2, + CLK_SRC_PLL2DIV, + CLK_SRC_PK0, + CLK_SRC_PK1, + CLK_SRC_PK2, + CLK_SRC_PK3, + CLK_SRC_PK4, + CLK_SRC_48MHZ +}; + +#define CLK_SRC_MASK 0xf + +/* Bits in ACLK* registers */ +#define ACLK_EN (1 << 28) +#define ACLK_SEL_SHIFT 24 +#define ACLK_SEL_MASK 0x0f000000 +#define ACLK_DIV_MASK 0x00000fff + +/* System configuration registers */ + +#define SCFG_BASE (APB1_PERI_BASE_VIRT + 0x13000) + +#define BMI_OFFS 0x00 +#define AHBCON0_OFFS 0x04 +#define APBPWE_OFFS 0x08 +#define DTCMWAIT_OFFS 0x0c +#define ECCSEL_OFFS 0x10 +#define AHBCON1_OFFS 0x14 +#define SDHCFG_OFFS 0x18 +#define REMAP_OFFS 0x20 +#define LCDSIAE_OFFS 0x24 +#define XMCCFG_OFFS 0xe0 +#define IMCCFG_OFFS 0xe4 + +/* Values for ECCSEL */ +#define ECCSEL_EXTMEM 0x0 +#define ECCSEL_DTCM 0x1 +#define ECCSEL_INT_SRAM 0x2 +#define ECCSEL_AHB 0x3 + +/* Bits in XMCCFG */ +#define XMCCFG_NFCE (1 << 1) +#define XMCCFG_FDXD (1 << 2) + +/* External memory controller registers */ + +#define EMC_BASE EXT_MEM_CTRL_BASE + +#define SDCFG_OFFS 0x00 +#define SDFSM_OFFS 0x04 +#define MCFG_OFFS 0x08 + +#define CSCFG0_OFFS 0x10 +#define CSCFG1_OFFS 0x14 +#define CSCFG2_OFFS 0x18 +#define CSCFG3_OFFS 0x1c + +#define MCFG_SDEN (1 << 4) + +#endif /* TCC8K_REGS_H */ diff --git a/trunk/arch/arm/plat-tcc/include/mach/uncompress.h b/trunk/arch/arm/plat-tcc/include/mach/uncompress.h new file mode 100644 index 000000000000..7a3e33a27a30 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/uncompress.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2009 Hans J. Koch + * + * This file is licensed under the terms of the GPL version 2. + */ + +#include +#include + +#include + +unsigned int system_rev; + +#define ID_MASK 0x7fff + +static void putc(int c) +{ + u32 *uart_lsr = (u32 *)(UART_BASE_PHYS + (UART_LSR << 2)); + u32 *uart_tx = (u32 *)(UART_BASE_PHYS + (UART_TX << 2)); + + while (!(*uart_lsr & UART_LSR_THRE)) + barrier(); + *uart_tx = c; +} + +static inline void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/trunk/arch/arm/plat-tcc/include/mach/vmalloc.h b/trunk/arch/arm/plat-tcc/include/mach/vmalloc.h new file mode 100644 index 000000000000..99414d9c2b94 --- /dev/null +++ b/trunk/arch/arm/plat-tcc/include/mach/vmalloc.h @@ -0,0 +1,10 @@ +/* + * Author: + * Created: June 10, 2008 + * + * Copyright (C) 2000 Russell King. + * Copyright (C) 2008-2009 Telechips + * + * Licensed under the terms of the GPL v2. + */ +#define VMALLOC_END 0xf0000000UL diff --git a/trunk/arch/arm/plat-tcc/system.c b/trunk/arch/arm/plat-tcc/system.c new file mode 100644 index 000000000000..cc208fae3e7a --- /dev/null +++ b/trunk/arch/arm/plat-tcc/system.c @@ -0,0 +1,25 @@ +/* + * System functions for Telechips TCCxxxx SoCs + * + * Copyright (C) Hans J. Koch + * + * Licensed under the terms of the GPL v2. + * + */ + +#include + +#include + +/* System reboot */ +void plat_tcc_reboot(void) +{ + /* Make sure clocks are on */ + __raw_writel(0xffffffff, CKC_BASE + BCLKCTR0_OFFS); + + /* Enable watchdog reset */ + __raw_writel(0x49, TIMER_BASE + TWDCFG_OFFS); + /* Wait for reset */ + while(1) + ; +} diff --git a/trunk/arch/frv/kernel/signal.c b/trunk/arch/frv/kernel/signal.c index bab01298b58e..0974c0ecc594 100644 --- a/trunk/arch/frv/kernel/signal.c +++ b/trunk/arch/frv/kernel/signal.c @@ -121,9 +121,6 @@ static int restore_sigcontext(struct sigcontext __user *sc, int *_gr8) struct user_context *user = current->thread.user; unsigned long tbr, psr; - /* Always make any pending restarted system calls return -EINTR */ - current_thread_info()->restart_block.fn = do_no_restart_syscall; - tbr = user->i.tbr; psr = user->i.psr; if (copy_from_user(user, &sc->sc_context, sizeof(sc->sc_context))) @@ -253,8 +250,6 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set) struct sigframe __user *frame; int rsig; - set_fs(USER_DS); - frame = get_sigframe(ka, sizeof(*frame)); if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) @@ -298,23 +293,22 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set) (unsigned long) (frame->retcode + 2)); } - /* Set up registers for the signal handler */ + /* set up registers for signal handler */ + __frame->sp = (unsigned long) frame; + __frame->lr = (unsigned long) &frame->retcode; + __frame->gr8 = sig; + if (current->personality & FDPIC_FUNCPTRS) { struct fdpic_func_descriptor __user *funcptr = (struct fdpic_func_descriptor __user *) ka->sa.sa_handler; - struct fdpic_func_descriptor desc; - if (copy_from_user(&desc, funcptr, sizeof(desc))) - goto give_sigsegv; - __frame->pc = desc.text; - __frame->gr15 = desc.GOT; + __get_user(__frame->pc, &funcptr->text); + __get_user(__frame->gr15, &funcptr->GOT); } else { __frame->pc = (unsigned long) ka->sa.sa_handler; __frame->gr15 = 0; } - __frame->sp = (unsigned long) frame; - __frame->lr = (unsigned long) &frame->retcode; - __frame->gr8 = sig; + set_fs(USER_DS); /* the tracer may want to single-step inside the handler */ if (test_thread_flag(TIF_SINGLESTEP)) @@ -329,7 +323,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set) return 0; give_sigsegv: - force_sigsegv(sig, current); + force_sig(SIGSEGV, current); return -EFAULT; } /* end setup_frame() */ @@ -344,8 +338,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, struct rt_sigframe __user *frame; int rsig; - set_fs(USER_DS); - frame = get_sigframe(ka, sizeof(*frame)); if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) @@ -400,23 +392,22 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, } /* Set up registers for signal handler */ + __frame->sp = (unsigned long) frame; + __frame->lr = (unsigned long) &frame->retcode; + __frame->gr8 = sig; + __frame->gr9 = (unsigned long) &frame->info; + if (current->personality & FDPIC_FUNCPTRS) { struct fdpic_func_descriptor __user *funcptr = (struct fdpic_func_descriptor __user *) ka->sa.sa_handler; - struct fdpic_func_descriptor desc; - if (copy_from_user(&desc, funcptr, sizeof(desc))) - goto give_sigsegv; - __frame->pc = desc.text; - __frame->gr15 = desc.GOT; + __get_user(__frame->pc, &funcptr->text); + __get_user(__frame->gr15, &funcptr->GOT); } else { __frame->pc = (unsigned long) ka->sa.sa_handler; __frame->gr15 = 0; } - __frame->sp = (unsigned long) frame; - __frame->lr = (unsigned long) &frame->retcode; - __frame->gr8 = sig; - __frame->gr9 = (unsigned long) &frame->info; + set_fs(USER_DS); /* the tracer may want to single-step inside the handler */ if (test_thread_flag(TIF_SINGLESTEP)) @@ -431,7 +422,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, return 0; give_sigsegv: - force_sigsegv(sig, current); + force_sig(SIGSEGV, current); return -EFAULT; } /* end setup_rt_frame() */ @@ -446,7 +437,7 @@ static int handle_signal(unsigned long sig, siginfo_t *info, int ret; /* Are we from a system call? */ - if (__frame->syscallno != -1) { + if (in_syscall(__frame)) { /* If so, check system call restarting.. */ switch (__frame->gr8) { case -ERESTART_RESTARTBLOCK: @@ -465,7 +456,6 @@ static int handle_signal(unsigned long sig, siginfo_t *info, __frame->gr8 = __frame->orig_gr8; __frame->pc -= 4; } - __frame->syscallno = -1; } /* Set up the stack frame */ @@ -548,11 +538,10 @@ static void do_signal(void) break; case -ERESTART_RESTARTBLOCK: - __frame->gr7 = __NR_restart_syscall; + __frame->gr8 = __NR_restart_syscall; __frame->pc -= 4; break; } - __frame->syscallno = -1; } /* if there's no signal to deliver, we just put the saved sigmask diff --git a/trunk/arch/m32r/include/asm/signal.h b/trunk/arch/m32r/include/asm/signal.h index b2eeb0de1c8d..9c1acb2b1a92 100644 --- a/trunk/arch/m32r/include/asm/signal.h +++ b/trunk/arch/m32r/include/asm/signal.h @@ -157,6 +157,7 @@ typedef struct sigaltstack { #undef __HAVE_ARCH_SIG_BITOPS struct pt_regs; +extern int do_signal(struct pt_regs *regs, sigset_t *oldset); #define ptrace_signal_deliver(regs, cookie) do { } while (0) diff --git a/trunk/arch/m32r/include/asm/unistd.h b/trunk/arch/m32r/include/asm/unistd.h index c70545689da8..76125777483c 100644 --- a/trunk/arch/m32r/include/asm/unistd.h +++ b/trunk/arch/m32r/include/asm/unistd.h @@ -351,7 +351,6 @@ #define __ARCH_WANT_SYS_OLD_GETRLIMIT /*will be unused*/ #define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND #define __IGNORE_lchown #define __IGNORE_setuid diff --git a/trunk/arch/m32r/kernel/entry.S b/trunk/arch/m32r/kernel/entry.S index 225412bc227e..403869833b98 100644 --- a/trunk/arch/m32r/kernel/entry.S +++ b/trunk/arch/m32r/kernel/entry.S @@ -235,9 +235,10 @@ work_resched: work_notifysig: ; deal with pending signals and ; notify-resume requests mv r0, sp ; arg1 : struct pt_regs *regs - mv r1, r9 ; arg2 : __u32 thread_info_flags + ldi r1, #0 ; arg2 : sigset_t *oldset + mv r2, r9 ; arg3 : __u32 thread_info_flags bl do_notify_resume - bra resume_userspace + bra restore_all ; perform syscall exit tracing ALIGN diff --git a/trunk/arch/m32r/kernel/ptrace.c b/trunk/arch/m32r/kernel/ptrace.c index 0021ade4cba8..e555091eb97c 100644 --- a/trunk/arch/m32r/kernel/ptrace.c +++ b/trunk/arch/m32r/kernel/ptrace.c @@ -592,17 +592,16 @@ void user_enable_single_step(struct task_struct *child) if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0) != sizeof(insn)) - return -EIO; + break; compute_next_pc(insn, pc, &next_pc, child); if (next_pc & 0x80000000) - return -EIO; + break; if (embed_debug_trap(child, next_pc)) - return -EIO; + break; invalidate_cache(); - return 0; } void user_disable_single_step(struct task_struct *child) diff --git a/trunk/arch/m32r/kernel/signal.c b/trunk/arch/m32r/kernel/signal.c index 7bbe38645ed5..144b0f124fc7 100644 --- a/trunk/arch/m32r/kernel/signal.c +++ b/trunk/arch/m32r/kernel/signal.c @@ -28,6 +28,37 @@ #define DEBUG_SIG 0 +#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) + +int do_signal(struct pt_regs *, sigset_t *); + +asmlinkage int +sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, + unsigned long r2, unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, struct pt_regs *regs) +{ + sigset_t newset; + + /* XXX: Don't preclude handling different sized sigset_t's. */ + if (sigsetsize != sizeof(sigset_t)) + return -EINVAL; + + if (copy_from_user(&newset, unewset, sizeof(newset))) + return -EFAULT; + sigdelsetmask(&newset, sigmask(SIGKILL)|sigmask(SIGSTOP)); + + spin_lock_irq(¤t->sighand->siglock); + current->saved_sigmask = current->blocked; + current->blocked = newset; + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); + + current->state = TASK_INTERRUPTIBLE; + schedule(); + set_thread_flag(TIF_RESTORE_SIGMASK); + return -ERESTARTNOHAND; +} + asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r2, unsigned long r3, unsigned long r4, @@ -187,7 +218,7 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size) return (void __user *)((sp - frame_size) & -8ul); } -static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, +static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set, struct pt_regs *regs) { struct rt_sigframe __user *frame; @@ -244,34 +275,22 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, current->comm, current->pid, frame, regs->pc); #endif - return 0; + return; give_sigsegv: force_sigsegv(sig, current); - return -EFAULT; -} - -static int prev_insn(struct pt_regs *regs) -{ - u16 inst; - if (get_user(&inst, (u16 __user *)(regs->bpc - 2))) - return -EFAULT; - if ((inst & 0xfff0) == 0x10f0) /* trap ? */ - regs->bpc -= 2; - else - regs->bpc -= 4; - regs->syscall_nr = -1; - return 0; } /* * OK, we're invoking a handler */ -static int +static void handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) { + unsigned short inst; + /* Are we from a system call? */ if (regs->syscall_nr >= 0) { /* If so, check system call restarting.. */ @@ -289,14 +308,16 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, /* fallthrough */ case -ERESTARTNOINTR: regs->r0 = regs->orig_r0; - if (prev_insn(regs) < 0) - return -EFAULT; + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; } } /* Set up the stack frame */ - if (setup_rt_frame(sig, ka, info, oldset, regs)) - return -EFAULT; + setup_rt_frame(sig, ka, info, oldset, regs); spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); @@ -304,7 +325,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigaddset(¤t->blocked,sig); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - return 0; } /* @@ -312,12 +332,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, * want to handle. Thus you cannot kill init even with a SIGKILL even by * mistake. */ -static void do_signal(struct pt_regs *regs) +int do_signal(struct pt_regs *regs, sigset_t *oldset) { siginfo_t info; int signr; struct k_sigaction ka; - sigset_t *oldset; + unsigned short inst; /* * We want the common case to go fast, which @@ -326,14 +346,12 @@ static void do_signal(struct pt_regs *regs) * if so. */ if (!user_mode(regs)) - return; + return 1; if (try_to_freeze()) goto no_signal; - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - oldset = ¤t->saved_sigmask; - else + if (!oldset) oldset = ¤t->blocked; signr = get_signal_to_deliver(&info, &ka, regs, NULL); @@ -345,10 +363,8 @@ static void do_signal(struct pt_regs *regs) */ /* Whee! Actually deliver the signal. */ - if (handle_signal(signr, &ka, &info, oldset, regs) == 0) - clear_thread_flag(TIF_RESTORE_SIGMASK); - - return; + handle_signal(signr, &ka, &info, oldset, regs); + return 1; } no_signal: @@ -359,24 +375,31 @@ static void do_signal(struct pt_regs *regs) regs->r0 == -ERESTARTSYS || regs->r0 == -ERESTARTNOINTR) { regs->r0 = regs->orig_r0; - prev_insn(regs); - } else if (regs->r0 == -ERESTART_RESTARTBLOCK){ + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; + } + if (regs->r0 == -ERESTART_RESTARTBLOCK){ regs->r0 = regs->orig_r0; regs->r7 = __NR_restart_syscall; - prev_insn(regs); + inst = *(unsigned short *)(regs->bpc - 2); + if ((inst & 0xfff0) == 0x10f0) /* trap ? */ + regs->bpc -= 2; + else + regs->bpc -= 4; } } - if (test_thread_flag(TIF_RESTORE_SIGMASK)) { - clear_thread_flag(TIF_RESTORE_SIGMASK); - sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); - } + return 0; } /* * notification of userspace execution resumption * - triggered by current->work.notify_resume */ -void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags) +void do_notify_resume(struct pt_regs *regs, sigset_t *oldset, + __u32 thread_info_flags) { /* Pending single-step? */ if (thread_info_flags & _TIF_SINGLESTEP) @@ -384,7 +407,7 @@ void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags) /* deal with pending signal delivery */ if (thread_info_flags & _TIF_SIGPENDING) - do_signal(regs); + do_signal(regs,oldset); if (thread_info_flags & _TIF_NOTIFY_RESUME) { clear_thread_flag(TIF_NOTIFY_RESUME); diff --git a/trunk/arch/mn10300/Kconfig b/trunk/arch/mn10300/Kconfig index 7c2a2f7f8dc1..444b9f918fdf 100644 --- a/trunk/arch/mn10300/Kconfig +++ b/trunk/arch/mn10300/Kconfig @@ -8,6 +8,7 @@ mainmenu "Linux Kernel Configuration" config MN10300 def_bool y select HAVE_OPROFILE + select HAVE_ARCH_TRACEHOOK config AM33 def_bool y diff --git a/trunk/arch/mn10300/Kconfig.debug b/trunk/arch/mn10300/Kconfig.debug index ce83c74b3fd7..ff80e86b9bd2 100644 --- a/trunk/arch/mn10300/Kconfig.debug +++ b/trunk/arch/mn10300/Kconfig.debug @@ -101,7 +101,7 @@ config GDBSTUB_DEBUG_BREAKPOINT choice prompt "GDB stub port" - default GDBSTUB_ON_TTYSM0 + default GDBSTUB_TTYSM0 depends on GDBSTUB help Select the serial port used for GDB-stub. diff --git a/trunk/arch/mn10300/include/asm/bitops.h b/trunk/arch/mn10300/include/asm/bitops.h index 3f50e9661076..f49ac49e09ad 100644 --- a/trunk/arch/mn10300/include/asm/bitops.h +++ b/trunk/arch/mn10300/include/asm/bitops.h @@ -229,9 +229,9 @@ int ffs(int x) #include #define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_bit((nr), (addr)) + test_and_set_bit((nr) ^ 0x18, (addr)) #define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_bit((nr), (addr)) + test_and_clear_bit((nr) ^ 0x18, (addr)) #include #include diff --git a/trunk/arch/mn10300/include/asm/signal.h b/trunk/arch/mn10300/include/asm/signal.h index 1865d72a86ff..7e891fce2370 100644 --- a/trunk/arch/mn10300/include/asm/signal.h +++ b/trunk/arch/mn10300/include/asm/signal.h @@ -78,7 +78,7 @@ typedef unsigned long sigset_t; /* These should not be considered constants from userland. */ #define SIGRTMIN 32 -#define SIGRTMAX _NSIG +#define SIGRTMAX (_NSIG-1) /* * SA_FLAGS values: diff --git a/trunk/arch/mn10300/kernel/signal.c b/trunk/arch/mn10300/kernel/signal.c index d4de05ab7864..717db14c2cc3 100644 --- a/trunk/arch/mn10300/kernel/signal.c +++ b/trunk/arch/mn10300/kernel/signal.c @@ -65,10 +65,10 @@ asmlinkage long sys_sigaction(int sig, old_sigset_t mask; if (verify_area(VERIFY_READ, act, sizeof(*act)) || __get_user(new_ka.sa.sa_handler, &act->sa_handler) || - __get_user(new_ka.sa.sa_restorer, &act->sa_restorer) || - __get_user(new_ka.sa.sa_flags, &act->sa_flags) || - __get_user(mask, &act->sa_mask)) + __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) return -EFAULT; + __get_user(new_ka.sa.sa_flags, &act->sa_flags); + __get_user(mask, &act->sa_mask); siginitset(&new_ka.sa.sa_mask, mask); } @@ -77,10 +77,10 @@ asmlinkage long sys_sigaction(int sig, if (!ret && oact) { if (verify_area(VERIFY_WRITE, oact, sizeof(*oact)) || __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || - __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer) || - __put_user(old_ka.sa.sa_flags, &oact->sa_flags) || - __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask)) + __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) return -EFAULT; + __put_user(old_ka.sa.sa_flags, &oact->sa_flags); + __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); } return ret; @@ -102,9 +102,6 @@ static int restore_sigcontext(struct pt_regs *regs, { unsigned int err = 0; - /* Always make any pending restarted system calls return -EINTR */ - current_thread_info()->restart_block.fn = do_no_restart_syscall; - if (is_using_fpu(current)) fpu_kill_state(current); @@ -333,6 +330,8 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, regs->d0 = sig; regs->d1 = (unsigned long) &frame->sc; + set_fs(USER_DS); + /* the tracer may want to single-step inside the handler */ if (test_thread_flag(TIF_SINGLESTEP)) ptrace_notify(SIGTRAP); @@ -346,7 +345,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set, return 0; give_sigsegv: - force_sigsegv(sig, current); + force_sig(SIGSEGV, current); return -EFAULT; } @@ -414,6 +413,8 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, regs->d0 = sig; regs->d1 = (long) &frame->info; + set_fs(USER_DS); + /* the tracer may want to single-step inside the handler */ if (test_thread_flag(TIF_SINGLESTEP)) ptrace_notify(SIGTRAP); @@ -427,16 +428,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, return 0; give_sigsegv: - force_sigsegv(sig, current); + force_sig(SIGSEGV, current); return -EFAULT; } -static inline void stepback(struct pt_regs *regs) -{ - regs->pc -= 2; - regs->orig_d0 = -1; -} - /* * handle the actual delivery of a signal to userspace */ @@ -464,7 +459,7 @@ static int handle_signal(int sig, /* fallthrough */ case -ERESTARTNOINTR: regs->d0 = regs->orig_d0; - stepback(regs); + regs->pc -= 2; } } @@ -532,12 +527,12 @@ static void do_signal(struct pt_regs *regs) case -ERESTARTSYS: case -ERESTARTNOINTR: regs->d0 = regs->orig_d0; - stepback(regs); + regs->pc -= 2; break; case -ERESTART_RESTARTBLOCK: regs->d0 = __NR_restart_syscall; - stepback(regs); + regs->pc -= 2; break; } } diff --git a/trunk/arch/mn10300/mm/Makefile b/trunk/arch/mn10300/mm/Makefile index 1557277fbc5c..28b9d983db0c 100644 --- a/trunk/arch/mn10300/mm/Makefile +++ b/trunk/arch/mn10300/mm/Makefile @@ -2,11 +2,13 @@ # Makefile for the MN10300-specific memory management code # -cacheflush-y := cache.o cache-mn10300.o -cacheflush-$(CONFIG_MN10300_CACHE_WBACK) += cache-flush-mn10300.o - -cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o - obj-y := \ init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \ - misalignment.o dma-alloc.o $(cacheflush-y) + misalignment.o dma-alloc.o + +ifneq ($(CONFIG_MN10300_CACHE_DISABLED),y) +obj-y += cache.o cache-mn10300.o +ifeq ($(CONFIG_MN10300_CACHE_WBACK),y) +obj-y += cache-flush-mn10300.o +endif +endif diff --git a/trunk/arch/mn10300/mm/cache-disabled.c b/trunk/arch/mn10300/mm/cache-disabled.c deleted file mode 100644 index f669ea42aba6..000000000000 --- a/trunk/arch/mn10300/mm/cache-disabled.c +++ /dev/null @@ -1,21 +0,0 @@ -/* Handle the cache being disabled - * - * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ -#include - -/* - * allow userspace to flush the instruction cache - */ -asmlinkage long sys_cacheflush(unsigned long start, unsigned long end) -{ - if (end < start) - return -EINVAL; - return 0; -} diff --git a/trunk/arch/powerpc/kernel/signal.c b/trunk/arch/powerpc/kernel/signal.c index 2300426e531a..7109f5b1baa8 100644 --- a/trunk/arch/powerpc/kernel/signal.c +++ b/trunk/arch/powerpc/kernel/signal.c @@ -138,7 +138,6 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs) ti->local_flags &= ~_TLF_RESTORE_SIGMASK; sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); } - regs->trap = 0; return 0; /* no signals delivered */ } @@ -165,7 +164,6 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs) ret = handle_rt_signal64(signr, &ka, &info, oldset, regs); } - regs->trap = 0; if (ret) { spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked, ¤t->blocked, diff --git a/trunk/arch/powerpc/kernel/signal_32.c b/trunk/arch/powerpc/kernel/signal_32.c index b96a3a010c26..266610119f66 100644 --- a/trunk/arch/powerpc/kernel/signal_32.c +++ b/trunk/arch/powerpc/kernel/signal_32.c @@ -511,7 +511,6 @@ static long restore_user_regs(struct pt_regs *regs, if (!sig) save_r2 = (unsigned int)regs->gpr[2]; err = restore_general_regs(regs, sr); - regs->trap = 0; err |= __get_user(msr, &sr->mc_gregs[PT_MSR]); if (!sig) regs->gpr[2] = (unsigned long) save_r2; @@ -885,6 +884,7 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, regs->nip = (unsigned long) ka->sa.sa_handler; /* enter the signal handler in big-endian mode */ regs->msr &= ~MSR_LE; + regs->trap = 0; return 1; badframe: @@ -1228,6 +1228,7 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka, regs->nip = (unsigned long) ka->sa.sa_handler; /* enter the signal handler in big-endian mode */ regs->msr &= ~MSR_LE; + regs->trap = 0; return 1; diff --git a/trunk/arch/powerpc/kernel/signal_64.c b/trunk/arch/powerpc/kernel/signal_64.c index 27c4a4584f80..2fe6fc64b614 100644 --- a/trunk/arch/powerpc/kernel/signal_64.c +++ b/trunk/arch/powerpc/kernel/signal_64.c @@ -178,7 +178,7 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig, err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]); err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]); /* skip SOFTE */ - regs->trap = 0; + err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]); err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); diff --git a/trunk/arch/sparc/kernel/perf_event.c b/trunk/arch/sparc/kernel/perf_event.c index 6318e622cfb0..357ced3c33ff 100644 --- a/trunk/arch/sparc/kernel/perf_event.c +++ b/trunk/arch/sparc/kernel/perf_event.c @@ -1038,7 +1038,6 @@ static int __hw_perf_event_init(struct perf_event *event) if (atomic_read(&nmi_active) < 0) return -ENODEV; - pmap = NULL; if (attr->type == PERF_TYPE_HARDWARE) { if (attr->config >= sparc_pmu->max_events) return -EINVAL; @@ -1047,18 +1046,9 @@ static int __hw_perf_event_init(struct perf_event *event) pmap = sparc_map_cache_event(attr->config); if (IS_ERR(pmap)) return PTR_ERR(pmap); - } else if (attr->type != PERF_TYPE_RAW) + } else return -EOPNOTSUPP; - if (pmap) { - hwc->event_base = perf_event_encode(pmap); - } else { - /* User gives us "(encoding << 16) | pic_mask" for - * PERF_TYPE_RAW events. - */ - hwc->event_base = attr->config; - } - /* We save the enable bits in the config_base. */ hwc->config_base = sparc_pmu->irq_bit; if (!attr->exclude_user) @@ -1068,6 +1058,8 @@ static int __hw_perf_event_init(struct perf_event *event) if (!attr->exclude_hv) hwc->config_base |= sparc_pmu->hv_bit; + hwc->event_base = perf_event_encode(pmap); + n = 0; if (event->group_leader != event) { n = collect_events(event->group_leader, diff --git a/trunk/arch/sparc/kernel/signal32.c b/trunk/arch/sparc/kernel/signal32.c index 75fad425e249..ea22cd373c64 100644 --- a/trunk/arch/sparc/kernel/signal32.c +++ b/trunk/arch/sparc/kernel/signal32.c @@ -453,66 +453,8 @@ static int save_fpu_state32(struct pt_regs *regs, __siginfo_fpu_t __user *fpu) return err; } -/* The I-cache flush instruction only works in the primary ASI, which - * right now is the nucleus, aka. kernel space. - * - * Therefore we have to kick the instructions out using the kernel - * side linear mapping of the physical address backing the user - * instructions. - */ -static void flush_signal_insns(unsigned long address) -{ - unsigned long pstate, paddr; - pte_t *ptep, pte; - pgd_t *pgdp; - pud_t *pudp; - pmd_t *pmdp; - - /* Commit all stores of the instructions we are about to flush. */ - wmb(); - - /* Disable cross-call reception. In this way even a very wide - * munmap() on another cpu can't tear down the page table - * hierarchy from underneath us, since that can't complete - * until the IPI tlb flush returns. - */ - - __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); - __asm__ __volatile__("wrpr %0, %1, %%pstate" - : : "r" (pstate), "i" (PSTATE_IE)); - - pgdp = pgd_offset(current->mm, address); - if (pgd_none(*pgdp)) - goto out_irqs_on; - pudp = pud_offset(pgdp, address); - if (pud_none(*pudp)) - goto out_irqs_on; - pmdp = pmd_offset(pudp, address); - if (pmd_none(*pmdp)) - goto out_irqs_on; - - ptep = pte_offset_map(pmdp, address); - pte = *ptep; - if (!pte_present(pte)) - goto out_unmap; - - paddr = (unsigned long) page_address(pte_page(pte)); - - __asm__ __volatile__("flush %0 + %1" - : /* no outputs */ - : "r" (paddr), - "r" (address & (PAGE_SIZE - 1)) - : "memory"); - -out_unmap: - pte_unmap(ptep); -out_irqs_on: - __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate)); - -} - -static int setup_frame32(struct k_sigaction *ka, struct pt_regs *regs, - int signo, sigset_t *oldset) +static void setup_frame32(struct k_sigaction *ka, struct pt_regs *regs, + int signo, sigset_t *oldset) { struct signal_frame32 __user *sf; int sigframe_size; @@ -605,7 +547,13 @@ static int setup_frame32(struct k_sigaction *ka, struct pt_regs *regs, if (ka->ka_restorer) { regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; } else { + /* Flush instruction space. */ unsigned long address = ((unsigned long)&(sf->insns[0])); + pgd_t *pgdp = pgd_offset(current->mm, address); + pud_t *pudp = pud_offset(pgdp, address); + pmd_t *pmdp = pmd_offset(pudp, address); + pte_t *ptep; + pte_t pte; regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2); @@ -614,22 +562,34 @@ static int setup_frame32(struct k_sigaction *ka, struct pt_regs *regs, if (err) goto sigsegv; - flush_signal_insns(address); + preempt_disable(); + ptep = pte_offset_map(pmdp, address); + pte = *ptep; + if (pte_present(pte)) { + unsigned long page = (unsigned long) + page_address(pte_page(pte)); + + wmb(); + __asm__ __volatile__("flush %0 + %1" + : /* no outputs */ + : "r" (page), + "r" (address & (PAGE_SIZE - 1)) + : "memory"); + } + pte_unmap(ptep); + preempt_enable(); } - return 0; + return; sigill: do_exit(SIGILL); - return -EINVAL; - sigsegv: force_sigsegv(signo, current); - return -EFAULT; } -static int setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs, - unsigned long signr, sigset_t *oldset, - siginfo_t *info) +static void setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs, + unsigned long signr, sigset_t *oldset, + siginfo_t *info) { struct rt_signal_frame32 __user *sf; int sigframe_size; @@ -727,7 +687,12 @@ static int setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs, if (ka->ka_restorer) regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; else { + /* Flush instruction space. */ unsigned long address = ((unsigned long)&(sf->insns[0])); + pgd_t *pgdp = pgd_offset(current->mm, address); + pud_t *pudp = pud_offset(pgdp, address); + pmd_t *pmdp = pmd_offset(pudp, address); + pte_t *ptep; regs->u_regs[UREG_I7] = (unsigned long) (&(sf->insns[0]) - 2); @@ -739,32 +704,38 @@ static int setup_rt_frame32(struct k_sigaction *ka, struct pt_regs *regs, if (err) goto sigsegv; - flush_signal_insns(address); + preempt_disable(); + ptep = pte_offset_map(pmdp, address); + if (pte_present(*ptep)) { + unsigned long page = (unsigned long) + page_address(pte_page(*ptep)); + + wmb(); + __asm__ __volatile__("flush %0 + %1" + : /* no outputs */ + : "r" (page), + "r" (address & (PAGE_SIZE - 1)) + : "memory"); + } + pte_unmap(ptep); + preempt_enable(); } - return 0; + return; sigill: do_exit(SIGILL); - return -EINVAL; - sigsegv: force_sigsegv(signr, current); - return -EFAULT; } -static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka, - siginfo_t *info, - sigset_t *oldset, struct pt_regs *regs) +static inline void handle_signal32(unsigned long signr, struct k_sigaction *ka, + siginfo_t *info, + sigset_t *oldset, struct pt_regs *regs) { - int err; - if (ka->sa.sa_flags & SA_SIGINFO) - err = setup_rt_frame32(ka, regs, signr, oldset, info); + setup_rt_frame32(ka, regs, signr, oldset, info); else - err = setup_frame32(ka, regs, signr, oldset); - - if (err) - return err; + setup_frame32(ka, regs, signr, oldset); spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); @@ -772,10 +743,6 @@ static inline int handle_signal32(unsigned long signr, struct k_sigaction *ka, sigaddset(¤t->blocked,signr); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - - tracehook_signal_handler(signr, info, ka, regs, 0); - - return 0; } static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs, @@ -822,14 +789,16 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs, if (signr > 0) { if (restart_syscall) syscall_restart32(orig_i0, regs, &ka.sa); - if (handle_signal32(signr, &ka, &info, oldset, regs) == 0) { - /* A signal was successfully delivered; the saved - * sigmask will have been stored in the signal frame, - * and will be restored by sigreturn, so we can simply - * clear the TS_RESTORE_SIGMASK flag. - */ - current_thread_info()->status &= ~TS_RESTORE_SIGMASK; - } + handle_signal32(signr, &ka, &info, oldset, regs); + + /* A signal was successfully delivered; the saved + * sigmask will have been stored in the signal frame, + * and will be restored by sigreturn, so we can simply + * clear the TS_RESTORE_SIGMASK flag. + */ + current_thread_info()->status &= ~TS_RESTORE_SIGMASK; + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && @@ -840,14 +809,12 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs, regs->u_regs[UREG_I0] = orig_i0; regs->tpc -= 4; regs->tnpc -= 4; - pt_regs_clear_syscall(regs); } if (restart_syscall && regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->tpc -= 4; regs->tnpc -= 4; - pt_regs_clear_syscall(regs); } /* If there's no signal to deliver, we just put the saved sigmask diff --git a/trunk/arch/sparc/kernel/signal_32.c b/trunk/arch/sparc/kernel/signal_32.c index 5e5c5fd03783..9882df92ba0a 100644 --- a/trunk/arch/sparc/kernel/signal_32.c +++ b/trunk/arch/sparc/kernel/signal_32.c @@ -315,8 +315,8 @@ save_fpu_state(struct pt_regs *regs, __siginfo_fpu_t __user *fpu) return err; } -static int setup_frame(struct k_sigaction *ka, struct pt_regs *regs, - int signo, sigset_t *oldset) +static void setup_frame(struct k_sigaction *ka, struct pt_regs *regs, + int signo, sigset_t *oldset) { struct signal_frame __user *sf; int sigframe_size, err; @@ -384,19 +384,16 @@ static int setup_frame(struct k_sigaction *ka, struct pt_regs *regs, /* Flush instruction space. */ flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0])); } - return 0; + return; sigill_and_return: do_exit(SIGILL); - return -EINVAL; - sigsegv: force_sigsegv(signo, current); - return -EFAULT; } -static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, - int signo, sigset_t *oldset, siginfo_t *info) +static void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, + int signo, sigset_t *oldset, siginfo_t *info) { struct rt_signal_frame __user *sf; int sigframe_size; @@ -469,30 +466,22 @@ static int setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, /* Flush instruction space. */ flush_sig_insns(current->mm, (unsigned long) &(sf->insns[0])); } - return 0; + return; sigill: do_exit(SIGILL); - return -EINVAL; - sigsegv: force_sigsegv(signo, current); - return -EFAULT; } -static inline int +static inline void handle_signal(unsigned long signr, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) { - int err; - if (ka->sa.sa_flags & SA_SIGINFO) - err = setup_rt_frame(ka, regs, signr, oldset, info); + setup_rt_frame(ka, regs, signr, oldset, info); else - err = setup_frame(ka, regs, signr, oldset); - - if (err) - return err; + setup_frame(ka, regs, signr, oldset); spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); @@ -500,10 +489,6 @@ handle_signal(unsigned long signr, struct k_sigaction *ka, sigaddset(¤t->blocked, signr); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - - tracehook_signal_handler(signr, info, ka, regs, 0); - - return 0; } static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, @@ -561,15 +546,17 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) if (signr > 0) { if (restart_syscall) syscall_restart(orig_i0, regs, &ka.sa); - if (handle_signal(signr, &ka, &info, oldset, regs) == 0) { - /* a signal was successfully delivered; the saved - * sigmask will have been stored in the signal frame, - * and will be restored by sigreturn, so we can simply - * clear the TIF_RESTORE_SIGMASK flag. - */ - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - clear_thread_flag(TIF_RESTORE_SIGMASK); - } + handle_signal(signr, &ka, &info, oldset, regs); + + /* a signal was successfully delivered; the saved + * sigmask will have been stored in the signal frame, + * and will be restored by sigreturn, so we can simply + * clear the TIF_RESTORE_SIGMASK flag. + */ + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + clear_thread_flag(TIF_RESTORE_SIGMASK); + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && @@ -580,14 +567,12 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) regs->u_regs[UREG_I0] = orig_i0; regs->pc -= 4; regs->npc -= 4; - pt_regs_clear_syscall(regs); } if (restart_syscall && regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->pc -= 4; regs->npc -= 4; - pt_regs_clear_syscall(regs); } /* if there's no signal to deliver, we just put the saved sigmask diff --git a/trunk/arch/sparc/kernel/signal_64.c b/trunk/arch/sparc/kernel/signal_64.c index 006fe4515886..9fa48c30037e 100644 --- a/trunk/arch/sparc/kernel/signal_64.c +++ b/trunk/arch/sparc/kernel/signal_64.c @@ -409,7 +409,7 @@ static inline void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs * return (void __user *) sp; } -static inline int +static inline void setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, int signo, sigset_t *oldset, siginfo_t *info) { @@ -483,37 +483,26 @@ setup_rt_frame(struct k_sigaction *ka, struct pt_regs *regs, } /* 4. return to kernel instructions */ regs->u_regs[UREG_I7] = (unsigned long)ka->ka_restorer; - return 0; + return; sigill: do_exit(SIGILL); - return -EINVAL; - sigsegv: force_sigsegv(signo, current); - return -EFAULT; } -static inline int handle_signal(unsigned long signr, struct k_sigaction *ka, - siginfo_t *info, - sigset_t *oldset, struct pt_regs *regs) +static inline void handle_signal(unsigned long signr, struct k_sigaction *ka, + siginfo_t *info, + sigset_t *oldset, struct pt_regs *regs) { - int err; - - err = setup_rt_frame(ka, regs, signr, oldset, - (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL); - if (err) - return err; + setup_rt_frame(ka, regs, signr, oldset, + (ka->sa.sa_flags & SA_SIGINFO) ? info : NULL); spin_lock_irq(¤t->sighand->siglock); sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); if (!(ka->sa.sa_flags & SA_NOMASK)) sigaddset(¤t->blocked,signr); recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); - - tracehook_signal_handler(signr, info, ka, regs, 0); - - return 0; } static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, @@ -582,14 +571,16 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) if (signr > 0) { if (restart_syscall) syscall_restart(orig_i0, regs, &ka.sa); - if (handle_signal(signr, &ka, &info, oldset, regs) == 0) { - /* A signal was successfully delivered; the saved - * sigmask will have been stored in the signal frame, - * and will be restored by sigreturn, so we can simply - * clear the TS_RESTORE_SIGMASK flag. - */ - current_thread_info()->status &= ~TS_RESTORE_SIGMASK; - } + handle_signal(signr, &ka, &info, oldset, regs); + + /* A signal was successfully delivered; the saved + * sigmask will have been stored in the signal frame, + * and will be restored by sigreturn, so we can simply + * clear the TS_RESTORE_SIGMASK flag. + */ + current_thread_info()->status &= ~TS_RESTORE_SIGMASK; + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && @@ -600,14 +591,12 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) regs->u_regs[UREG_I0] = orig_i0; regs->tpc -= 4; regs->tnpc -= 4; - pt_regs_clear_syscall(regs); } if (restart_syscall && regs->u_regs[UREG_I0] == ERESTART_RESTARTBLOCK) { regs->u_regs[UREG_G1] = __NR_restart_syscall; regs->tpc -= 4; regs->tnpc -= 4; - pt_regs_clear_syscall(regs); } /* If there's no signal to deliver, we just put the saved sigmask diff --git a/trunk/arch/tile/kernel/intvec_32.S b/trunk/arch/tile/kernel/intvec_32.S index 8f58bdff20d7..84f296ca9e63 100644 --- a/trunk/arch/tile/kernel/intvec_32.S +++ b/trunk/arch/tile/kernel/intvec_32.S @@ -1506,6 +1506,13 @@ handle_ill: } STD_ENDPROC(handle_ill) + .pushsection .rodata, "a" + .align 8 +bpt_code: + bpt + ENDPROC(bpt_code) + .popsection + /* Various stub interrupt handlers and syscall handlers */ STD_ENTRY_LOCAL(_kernel_double_fault) diff --git a/trunk/arch/um/kernel/exec.c b/trunk/arch/um/kernel/exec.c index 49b5e1eb3262..cd145eda3579 100644 --- a/trunk/arch/um/kernel/exec.c +++ b/trunk/arch/um/kernel/exec.c @@ -62,7 +62,7 @@ static long execve1(const char *file, return error; } -long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env) +long um_execve(const char *file, char __user *__user *argv, char __user *__user *env) { long err; @@ -72,8 +72,8 @@ long um_execve(const char *file, const char __user *const __user *argv, const ch return err; } -long sys_execve(const char __user *file, const char __user *const __user *argv, - const char __user *const __user *env) +long sys_execve(const char __user *file, char __user *__user *argv, + char __user *__user *env) { long error; char *filename; diff --git a/trunk/arch/um/kernel/internal.h b/trunk/arch/um/kernel/internal.h index 5bf97db24a04..1303a105fe91 100644 --- a/trunk/arch/um/kernel/internal.h +++ b/trunk/arch/um/kernel/internal.h @@ -1 +1 @@ -extern long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env); +extern long um_execve(const char *file, char __user *__user *argv, char __user *__user *env); diff --git a/trunk/arch/um/kernel/syscall.c b/trunk/arch/um/kernel/syscall.c index f958cb876ee3..5ddb246626db 100644 --- a/trunk/arch/um/kernel/syscall.c +++ b/trunk/arch/um/kernel/syscall.c @@ -60,8 +60,8 @@ int kernel_execve(const char *filename, fs = get_fs(); set_fs(KERNEL_DS); - ret = um_execve(filename, (const char __user *const __user *)argv, - (const char __user *const __user *) envp); + ret = um_execve(filename, (char __user *__user *)argv, + (char __user *__user *) envp); set_fs(fs); return ret; diff --git a/trunk/arch/x86/boot/early_serial_console.c b/trunk/arch/x86/boot/early_serial_console.c index 5df2869c874b..030f4b93e255 100644 --- a/trunk/arch/x86/boot/early_serial_console.c +++ b/trunk/arch/x86/boot/early_serial_console.c @@ -58,19 +58,7 @@ static void parse_earlyprintk(void) if (arg[pos] == ',') pos++; - /* - * make sure we have - * "serial,0x3f8,115200" - * "serial,ttyS0,115200" - * "ttyS0,115200" - */ - if (pos == 7 && !strncmp(arg + pos, "0x", 2)) { - port = simple_strtoull(arg + pos, &e, 16); - if (port == 0 || arg + pos == e) - port = DEFAULT_SERIAL_PORT; - else - pos = e - arg; - } else if (!strncmp(arg + pos, "ttyS", 4)) { + if (!strncmp(arg, "ttyS", 4)) { static const int bases[] = { 0x3f8, 0x2f8 }; int idx = 0; diff --git a/trunk/arch/x86/include/asm/amd_iommu_proto.h b/trunk/arch/x86/include/asm/amd_iommu_proto.h index cb030374b90a..d2544f1d705d 100644 --- a/trunk/arch/x86/include/asm/amd_iommu_proto.h +++ b/trunk/arch/x86/include/asm/amd_iommu_proto.h @@ -38,10 +38,4 @@ static inline void amd_iommu_stats_init(void) { } #endif /* !CONFIG_AMD_IOMMU_STATS */ -static inline bool is_rd890_iommu(struct pci_dev *pdev) -{ - return (pdev->vendor == PCI_VENDOR_ID_ATI) && - (pdev->device == PCI_DEVICE_ID_RD890_IOMMU); -} - #endif /* _ASM_X86_AMD_IOMMU_PROTO_H */ diff --git a/trunk/arch/x86/include/asm/amd_iommu_types.h b/trunk/arch/x86/include/asm/amd_iommu_types.h index 08616180deaf..7014e88bc779 100644 --- a/trunk/arch/x86/include/asm/amd_iommu_types.h +++ b/trunk/arch/x86/include/asm/amd_iommu_types.h @@ -368,9 +368,6 @@ struct amd_iommu { /* capabilities of that IOMMU read from ACPI */ u32 cap; - /* flags read from acpi table */ - u8 acpi_flags; - /* * Capability pointer. There could be more than one IOMMU per PCI * device function if there are more than one AMD IOMMU capability @@ -414,15 +411,6 @@ struct amd_iommu { /* default dma_ops domain for that IOMMU */ struct dma_ops_domain *default_dom; - - /* - * This array is required to work around a potential BIOS bug. - * The BIOS may miss to restore parts of the PCI configuration - * space when the system resumes from S3. The result is that the - * IOMMU does not execute commands anymore which leads to system - * failure. - */ - u32 cache_cfg[4]; }; /* diff --git a/trunk/arch/x86/include/asm/bitops.h b/trunk/arch/x86/include/asm/bitops.h index bafd80defa43..545776efeb16 100644 --- a/trunk/arch/x86/include/asm/bitops.h +++ b/trunk/arch/x86/include/asm/bitops.h @@ -309,7 +309,7 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr) static __always_inline int constant_test_bit(unsigned int nr, const volatile unsigned long *addr) { return ((1UL << (nr % BITS_PER_LONG)) & - (addr[nr / BITS_PER_LONG])) != 0; + (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; } static inline int variable_test_bit(int nr, volatile const unsigned long *addr) diff --git a/trunk/arch/x86/include/asm/cpufeature.h b/trunk/arch/x86/include/asm/cpufeature.h index 3f76523589af..c6fbb7b430d1 100644 --- a/trunk/arch/x86/include/asm/cpufeature.h +++ b/trunk/arch/x86/include/asm/cpufeature.h @@ -168,7 +168,6 @@ #define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */ #define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */ #define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */ -#define X86_FEATURE_DTS (7*32+ 7) /* Digital Thermal Sensor */ /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ diff --git a/trunk/arch/x86/include/asm/hw_breakpoint.h b/trunk/arch/x86/include/asm/hw_breakpoint.h index 824ca07860d0..528a11e8d3e3 100644 --- a/trunk/arch/x86/include/asm/hw_breakpoint.h +++ b/trunk/arch/x86/include/asm/hw_breakpoint.h @@ -20,7 +20,7 @@ struct arch_hw_breakpoint { #include /* Available HW breakpoint length encodings */ -#define X86_BREAKPOINT_LEN_X 0x40 +#define X86_BREAKPOINT_LEN_X 0x00 #define X86_BREAKPOINT_LEN_1 0x40 #define X86_BREAKPOINT_LEN_2 0x44 #define X86_BREAKPOINT_LEN_4 0x4c diff --git a/trunk/arch/x86/kernel/Makefile b/trunk/arch/x86/kernel/Makefile index fedf32a8c3ec..0925676266bd 100644 --- a/trunk/arch/x86/kernel/Makefile +++ b/trunk/arch/x86/kernel/Makefile @@ -11,8 +11,6 @@ ifdef CONFIG_FUNCTION_TRACER CFLAGS_REMOVE_tsc.o = -pg CFLAGS_REMOVE_rtc.o = -pg CFLAGS_REMOVE_paravirt-spinlocks.o = -pg -CFLAGS_REMOVE_pvclock.o = -pg -CFLAGS_REMOVE_kvmclock.o = -pg CFLAGS_REMOVE_ftrace.o = -pg CFLAGS_REMOVE_early_printk.o = -pg endif diff --git a/trunk/arch/x86/kernel/amd_iommu.c b/trunk/arch/x86/kernel/amd_iommu.c index 679b6450382b..fa044e1e30a2 100644 --- a/trunk/arch/x86/kernel/amd_iommu.c +++ b/trunk/arch/x86/kernel/amd_iommu.c @@ -1953,7 +1953,6 @@ static void __unmap_single(struct dma_ops_domain *dma_dom, size_t size, int dir) { - dma_addr_t flush_addr; dma_addr_t i, start; unsigned int pages; @@ -1961,7 +1960,6 @@ static void __unmap_single(struct dma_ops_domain *dma_dom, (dma_addr + size > dma_dom->aperture_size)) return; - flush_addr = dma_addr; pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); dma_addr &= PAGE_MASK; start = dma_addr; @@ -1976,7 +1974,7 @@ static void __unmap_single(struct dma_ops_domain *dma_dom, dma_ops_free_addresses(dma_dom, dma_addr, pages); if (amd_iommu_unmap_flush || dma_dom->need_flush) { - iommu_flush_pages(&dma_dom->domain, flush_addr, size); + iommu_flush_pages(&dma_dom->domain, dma_addr, size); dma_dom->need_flush = false; } } diff --git a/trunk/arch/x86/kernel/amd_iommu_init.c b/trunk/arch/x86/kernel/amd_iommu_init.c index 5a170cbbbed8..3cc63e2b8dd4 100644 --- a/trunk/arch/x86/kernel/amd_iommu_init.c +++ b/trunk/arch/x86/kernel/amd_iommu_init.c @@ -632,13 +632,6 @@ static void __init init_iommu_from_pci(struct amd_iommu *iommu) iommu->last_device = calc_devid(MMIO_GET_BUS(range), MMIO_GET_LD(range)); iommu->evt_msi_num = MMIO_MSI_NUM(misc); - - if (is_rd890_iommu(iommu->dev)) { - pci_read_config_dword(iommu->dev, 0xf0, &iommu->cache_cfg[0]); - pci_read_config_dword(iommu->dev, 0xf4, &iommu->cache_cfg[1]); - pci_read_config_dword(iommu->dev, 0xf8, &iommu->cache_cfg[2]); - pci_read_config_dword(iommu->dev, 0xfc, &iommu->cache_cfg[3]); - } } /* @@ -656,9 +649,29 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu, struct ivhd_entry *e; /* - * First save the recommended feature enable bits from ACPI + * First set the recommended feature enable bits from ACPI + * into the IOMMU control registers */ - iommu->acpi_flags = h->flags; + h->flags & IVHD_FLAG_HT_TUN_EN_MASK ? + iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : + iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); + + h->flags & IVHD_FLAG_PASSPW_EN_MASK ? + iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : + iommu_feature_disable(iommu, CONTROL_PASSPW_EN); + + h->flags & IVHD_FLAG_RESPASSPW_EN_MASK ? + iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : + iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); + + h->flags & IVHD_FLAG_ISOC_EN_MASK ? + iommu_feature_enable(iommu, CONTROL_ISOC_EN) : + iommu_feature_disable(iommu, CONTROL_ISOC_EN); + + /* + * make IOMMU memory accesses cache coherent + */ + iommu_feature_enable(iommu, CONTROL_COHERENT_EN); /* * Done. Now parse the device entries @@ -1103,40 +1116,6 @@ static void init_device_table(void) } } -static void iommu_init_flags(struct amd_iommu *iommu) -{ - iommu->acpi_flags & IVHD_FLAG_HT_TUN_EN_MASK ? - iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : - iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); - - iommu->acpi_flags & IVHD_FLAG_PASSPW_EN_MASK ? - iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : - iommu_feature_disable(iommu, CONTROL_PASSPW_EN); - - iommu->acpi_flags & IVHD_FLAG_RESPASSPW_EN_MASK ? - iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : - iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); - - iommu->acpi_flags & IVHD_FLAG_ISOC_EN_MASK ? - iommu_feature_enable(iommu, CONTROL_ISOC_EN) : - iommu_feature_disable(iommu, CONTROL_ISOC_EN); - - /* - * make IOMMU memory accesses cache coherent - */ - iommu_feature_enable(iommu, CONTROL_COHERENT_EN); -} - -static void iommu_apply_quirks(struct amd_iommu *iommu) -{ - if (is_rd890_iommu(iommu->dev)) { - pci_write_config_dword(iommu->dev, 0xf0, iommu->cache_cfg[0]); - pci_write_config_dword(iommu->dev, 0xf4, iommu->cache_cfg[1]); - pci_write_config_dword(iommu->dev, 0xf8, iommu->cache_cfg[2]); - pci_write_config_dword(iommu->dev, 0xfc, iommu->cache_cfg[3]); - } -} - /* * This function finally enables all IOMMUs found in the system after * they have been initialized @@ -1147,8 +1126,6 @@ static void enable_iommus(void) for_each_iommu(iommu) { iommu_disable(iommu); - iommu_apply_quirks(iommu); - iommu_init_flags(iommu); iommu_set_device_table(iommu); iommu_enable_command_buffer(iommu); iommu_enable_event_buffer(iommu); diff --git a/trunk/arch/x86/kernel/cpu/perf_event.c b/trunk/arch/x86/kernel/cpu/perf_event.c index 03a5b0385ad6..3efdf2870a35 100644 --- a/trunk/arch/x86/kernel/cpu/perf_event.c +++ b/trunk/arch/x86/kernel/cpu/perf_event.c @@ -102,7 +102,6 @@ struct cpu_hw_events { */ struct perf_event *events[X86_PMC_IDX_MAX]; /* in counter order */ unsigned long active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; - unsigned long running[BITS_TO_LONGS(X86_PMC_IDX_MAX)]; int enabled; int n_events; @@ -1011,7 +1010,6 @@ static int x86_pmu_start(struct perf_event *event) x86_perf_event_set_period(event); cpuc->events[idx] = event; __set_bit(idx, cpuc->active_mask); - __set_bit(idx, cpuc->running); x86_pmu.enable(event); perf_event_update_userpage(event); @@ -1143,16 +1141,8 @@ static int x86_pmu_handle_irq(struct pt_regs *regs) cpuc = &__get_cpu_var(cpu_hw_events); for (idx = 0; idx < x86_pmu.num_counters; idx++) { - if (!test_bit(idx, cpuc->active_mask)) { - /* - * Though we deactivated the counter some cpus - * might still deliver spurious interrupts still - * in flight. Catch them: - */ - if (__test_and_clear_bit(idx, cpuc->running)) - handled++; + if (!test_bit(idx, cpuc->active_mask)) continue; - } event = cpuc->events[idx]; hwc = &event->hw; diff --git a/trunk/arch/x86/kernel/cpu/scattered.c b/trunk/arch/x86/kernel/cpu/scattered.c index d49079515122..34b4dad6f0b8 100644 --- a/trunk/arch/x86/kernel/cpu/scattered.c +++ b/trunk/arch/x86/kernel/cpu/scattered.c @@ -31,7 +31,6 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c) const struct cpuid_bit *cb; static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { - { X86_FEATURE_DTS, CR_EAX, 0, 0x00000006, 0 }, { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 }, { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 }, { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 }, diff --git a/trunk/arch/x86/kernel/hw_breakpoint.c b/trunk/arch/x86/kernel/hw_breakpoint.c index ff15c9dcc25d..a474ec37c32f 100644 --- a/trunk/arch/x86/kernel/hw_breakpoint.c +++ b/trunk/arch/x86/kernel/hw_breakpoint.c @@ -206,27 +206,11 @@ int arch_check_bp_in_kernelspace(struct perf_event *bp) int arch_bp_generic_fields(int x86_len, int x86_type, int *gen_len, int *gen_type) { - /* Type */ - switch (x86_type) { - case X86_BREAKPOINT_EXECUTE: - if (x86_len != X86_BREAKPOINT_LEN_X) - return -EINVAL; - - *gen_type = HW_BREAKPOINT_X; - *gen_len = sizeof(long); - return 0; - case X86_BREAKPOINT_WRITE: - *gen_type = HW_BREAKPOINT_W; - break; - case X86_BREAKPOINT_RW: - *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R; - break; - default: - return -EINVAL; - } - /* Len */ switch (x86_len) { + case X86_BREAKPOINT_LEN_X: + *gen_len = sizeof(long); + break; case X86_BREAKPOINT_LEN_1: *gen_len = HW_BREAKPOINT_LEN_1; break; @@ -245,6 +229,21 @@ int arch_bp_generic_fields(int x86_len, int x86_type, return -EINVAL; } + /* Type */ + switch (x86_type) { + case X86_BREAKPOINT_EXECUTE: + *gen_type = HW_BREAKPOINT_X; + break; + case X86_BREAKPOINT_WRITE: + *gen_type = HW_BREAKPOINT_W; + break; + case X86_BREAKPOINT_RW: + *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R; + break; + default: + return -EINVAL; + } + return 0; } @@ -317,6 +316,9 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) ret = -EINVAL; switch (info->len) { + case X86_BREAKPOINT_LEN_X: + align = sizeof(long) -1; + break; case X86_BREAKPOINT_LEN_1: align = 0; break; diff --git a/trunk/arch/x86/lguest/boot.c b/trunk/arch/x86/lguest/boot.c index 9d5f55848455..9257510b4836 100644 --- a/trunk/arch/x86/lguest/boot.c +++ b/trunk/arch/x86/lguest/boot.c @@ -324,8 +324,9 @@ static void lguest_load_gdt(const struct desc_ptr *desc) } /* - * For a single GDT entry which changes, we simply change our copy and - * then tell the host about it. + * For a single GDT entry which changes, we do the lazy thing: alter our GDT, + * then tell the Host to reload the entire thing. This operation is so rare + * that this naive implementation is reasonable. */ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum, const void *desc, int type) @@ -337,13 +338,9 @@ static void lguest_write_gdt_entry(struct desc_struct *dt, int entrynum, } /* - * There are three "thread local storage" GDT entries which change + * OK, I lied. There are three "thread local storage" GDT entries which change * on every context switch (these three entries are how glibc implements - * __thread variables). As an optimization, we have a hypercall - * specifically for this case. - * - * Wouldn't it be nicer to have a general LOAD_GDT_ENTRIES hypercall - * which took a range of entries? + * __thread variables). So we have a hypercall specifically for this case. */ static void lguest_load_tls(struct thread_struct *t, unsigned int cpu) { diff --git a/trunk/arch/x86/oprofile/nmi_int.c b/trunk/arch/x86/oprofile/nmi_int.c index 009b819f48d0..cfe4faabb0f6 100644 --- a/trunk/arch/x86/oprofile/nmi_int.c +++ b/trunk/arch/x86/oprofile/nmi_int.c @@ -671,9 +671,7 @@ static int __init ppro_init(char **cpu_type) case 14: *cpu_type = "i386/core"; break; - case 0x0f: - case 0x16: - case 0x17: + case 15: case 23: *cpu_type = "i386/core_2"; break; case 0x1a: diff --git a/trunk/block/blk-map.c b/trunk/block/blk-map.c index ade0a08c9099..c65d7593f7f1 100644 --- a/trunk/block/blk-map.c +++ b/trunk/block/blk-map.c @@ -307,7 +307,7 @@ int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf, return PTR_ERR(bio); if (rq_data_dir(rq) == WRITE) - bio->bi_rw |= REQ_WRITE; + bio->bi_rw |= (1 << REQ_WRITE); if (do_copy) rq->cmd_flags |= REQ_COPY_USER; diff --git a/trunk/block/blk-merge.c b/trunk/block/blk-merge.c index eafc94f68d79..3b0cd4249671 100644 --- a/trunk/block/blk-merge.c +++ b/trunk/block/blk-merge.c @@ -361,18 +361,6 @@ static int attempt_merge(struct request_queue *q, struct request *req, if (!rq_mergeable(req) || !rq_mergeable(next)) return 0; - /* - * Don't merge file system requests and discard requests - */ - if ((req->cmd_flags & REQ_DISCARD) != (next->cmd_flags & REQ_DISCARD)) - return 0; - - /* - * Don't merge discard requests and secure discard requests - */ - if ((req->cmd_flags & REQ_SECURE) != (next->cmd_flags & REQ_SECURE)) - return 0; - /* * not contiguous */ diff --git a/trunk/block/cfq-iosched.c b/trunk/block/cfq-iosched.c index 9eba291eb6fd..f65c6f01c475 100644 --- a/trunk/block/cfq-iosched.c +++ b/trunk/block/cfq-iosched.c @@ -1019,20 +1019,10 @@ cfq_find_alloc_cfqg(struct cfq_data *cfqd, struct cgroup *cgroup, int create) */ atomic_set(&cfqg->ref, 1); - /* - * Add group onto cgroup list. It might happen that bdi->dev is - * not initiliazed yet. Initialize this new group without major - * and minor info and this info will be filled in once a new thread - * comes for IO. See code above. - */ - if (bdi->dev) { - sscanf(dev_name(bdi->dev), "%u:%u", &major, &minor); - cfq_blkiocg_add_blkio_group(blkcg, &cfqg->blkg, (void *)cfqd, + /* Add group onto cgroup list */ + sscanf(dev_name(bdi->dev), "%u:%u", &major, &minor); + cfq_blkiocg_add_blkio_group(blkcg, &cfqg->blkg, (void *)cfqd, MKDEV(major, minor)); - } else - cfq_blkiocg_add_blkio_group(blkcg, &cfqg->blkg, (void *)cfqd, - 0); - cfqg->weight = blkcg_get_weight(blkcg, cfqg->blkg.dev); /* Add group on cfqd list */ diff --git a/trunk/drivers/amba/bus.c b/trunk/drivers/amba/bus.c index 2737b9752205..d31590e7011b 100644 --- a/trunk/drivers/amba/bus.c +++ b/trunk/drivers/amba/bus.c @@ -298,7 +298,7 @@ int amba_device_register(struct amba_device *dev, struct resource *parent) amba_put_disable_pclk(dev); - if (cid == AMBA_CID) + if (cid == 0xb105f00d) dev->periphid = pid; if (!dev->periphid) diff --git a/trunk/drivers/ata/ahci.c b/trunk/drivers/ata/ahci.c index 99d0e5a51148..ff1c945fba98 100644 --- a/trunk/drivers/ata/ahci.c +++ b/trunk/drivers/ata/ahci.c @@ -90,10 +90,6 @@ static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); static int ahci_pci_device_resume(struct pci_dev *pdev); #endif -static struct scsi_host_template ahci_sht = { - AHCI_SHT("ahci"), -}; - static struct ata_port_operations ahci_vt8251_ops = { .inherits = &ahci_ops, .hardreset = ahci_vt8251_hardreset, diff --git a/trunk/drivers/ata/ahci.h b/trunk/drivers/ata/ahci.h index e5fdeebf9ef0..474427b6f99f 100644 --- a/trunk/drivers/ata/ahci.h +++ b/trunk/drivers/ata/ahci.h @@ -298,17 +298,7 @@ struct ahci_host_priv { extern int ahci_ignore_sss; -extern struct device_attribute *ahci_shost_attrs[]; -extern struct device_attribute *ahci_sdev_attrs[]; - -#define AHCI_SHT(drv_name) \ - ATA_NCQ_SHT(drv_name), \ - .can_queue = AHCI_MAX_CMDS - 1, \ - .sg_tablesize = AHCI_MAX_SG, \ - .dma_boundary = AHCI_DMA_BOUNDARY, \ - .shost_attrs = ahci_shost_attrs, \ - .sdev_attrs = ahci_sdev_attrs - +extern struct scsi_host_template ahci_sht; extern struct ata_port_operations ahci_ops; void ahci_save_initial_config(struct device *dev, diff --git a/trunk/drivers/ata/ahci_platform.c b/trunk/drivers/ata/ahci_platform.c index 84b643270e7a..4e97f33cca44 100644 --- a/trunk/drivers/ata/ahci_platform.c +++ b/trunk/drivers/ata/ahci_platform.c @@ -23,10 +23,6 @@ #include #include "ahci.h" -static struct scsi_host_template ahci_platform_sht = { - AHCI_SHT("ahci_platform"), -}; - static int __init ahci_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -149,7 +145,7 @@ static int __init ahci_probe(struct platform_device *pdev) ahci_print_info(host, "platform"); rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED, - &ahci_platform_sht); + &ahci_sht); if (rc) goto err0; diff --git a/trunk/drivers/ata/libahci.c b/trunk/drivers/ata/libahci.c index 8eea309ea212..68dc6785472f 100644 --- a/trunk/drivers/ata/libahci.c +++ b/trunk/drivers/ata/libahci.c @@ -121,7 +121,7 @@ static DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL); static DEVICE_ATTR(em_buffer, S_IWUSR | S_IRUGO, ahci_read_em_buffer, ahci_store_em_buffer); -struct device_attribute *ahci_shost_attrs[] = { +static struct device_attribute *ahci_shost_attrs[] = { &dev_attr_link_power_management_policy, &dev_attr_em_message_type, &dev_attr_em_message, @@ -132,14 +132,22 @@ struct device_attribute *ahci_shost_attrs[] = { &dev_attr_em_buffer, NULL }; -EXPORT_SYMBOL_GPL(ahci_shost_attrs); -struct device_attribute *ahci_sdev_attrs[] = { +static struct device_attribute *ahci_sdev_attrs[] = { &dev_attr_sw_activity, &dev_attr_unload_heads, NULL }; -EXPORT_SYMBOL_GPL(ahci_sdev_attrs); + +struct scsi_host_template ahci_sht = { + ATA_NCQ_SHT("ahci"), + .can_queue = AHCI_MAX_CMDS - 1, + .sg_tablesize = AHCI_MAX_SG, + .dma_boundary = AHCI_DMA_BOUNDARY, + .shost_attrs = ahci_shost_attrs, + .sdev_attrs = ahci_sdev_attrs, +}; +EXPORT_SYMBOL_GPL(ahci_sht); struct ata_port_operations ahci_ops = { .inherits = &sata_pmp_port_ops, diff --git a/trunk/drivers/block/cciss.c b/trunk/drivers/block/cciss.c index 5e4fadcdece9..6124c2fd2d33 100644 --- a/trunk/drivers/block/cciss.c +++ b/trunk/drivers/block/cciss.c @@ -4792,7 +4792,7 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, clean4: kfree(h->cmd_pool_bits); /* Free up sg elements */ - for (k-- ; k >= 0; k--) + for (k = 0; k < h->nr_cmds; k++) kfree(h->scatter_list[k]); kfree(h->scatter_list); cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); diff --git a/trunk/drivers/block/pktcdvd.c b/trunk/drivers/block/pktcdvd.c index 37a2bb595076..b1cbeb59bb76 100644 --- a/trunk/drivers/block/pktcdvd.c +++ b/trunk/drivers/block/pktcdvd.c @@ -2369,7 +2369,7 @@ static void pkt_release_dev(struct pktcdvd_device *pd, int flush) pkt_shrink_pktlist(pd); } -static struct pktcdvd_device *pkt_find_dev_from_minor(unsigned int dev_minor) +static struct pktcdvd_device *pkt_find_dev_from_minor(int dev_minor) { if (dev_minor >= MAX_WRITERS) return NULL; diff --git a/trunk/drivers/char/agp/intel-agp.c b/trunk/drivers/char/agp/intel-agp.c index cd18493c9527..eab58db5f91c 100644 --- a/trunk/drivers/char/agp/intel-agp.c +++ b/trunk/drivers/char/agp/intel-agp.c @@ -806,8 +806,6 @@ static const struct intel_driver_description { "G45/G43", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_B43_HB, PCI_DEVICE_ID_INTEL_B43_IG, "B43", NULL, &intel_i965_driver }, - { PCI_DEVICE_ID_INTEL_B43_1_HB, PCI_DEVICE_ID_INTEL_B43_1_IG, - "B43", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_G41_HB, PCI_DEVICE_ID_INTEL_G41_IG, "G41", NULL, &intel_i965_driver }, { PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG, diff --git a/trunk/drivers/char/agp/intel-agp.h b/trunk/drivers/char/agp/intel-agp.h index d09b1ab7e8ab..ee189c74d345 100644 --- a/trunk/drivers/char/agp/intel-agp.h +++ b/trunk/drivers/char/agp/intel-agp.h @@ -186,8 +186,6 @@ #define PCI_DEVICE_ID_INTEL_Q33_IG 0x29D2 #define PCI_DEVICE_ID_INTEL_B43_HB 0x2E40 #define PCI_DEVICE_ID_INTEL_B43_IG 0x2E42 -#define PCI_DEVICE_ID_INTEL_B43_1_HB 0x2E90 -#define PCI_DEVICE_ID_INTEL_B43_1_IG 0x2E92 #define PCI_DEVICE_ID_INTEL_GM45_HB 0x2A40 #define PCI_DEVICE_ID_INTEL_GM45_IG 0x2A42 #define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB 0x2E00 diff --git a/trunk/drivers/char/ipmi/ipmi_si_intf.c b/trunk/drivers/char/ipmi/ipmi_si_intf.c index 7bd7c45b53ef..3822b4f49c84 100644 --- a/trunk/drivers/char/ipmi/ipmi_si_intf.c +++ b/trunk/drivers/char/ipmi/ipmi_si_intf.c @@ -305,9 +305,6 @@ static int num_force_kipmid; #ifdef CONFIG_PCI static int pci_registered; #endif -#ifdef CONFIG_ACPI -static int pnp_registered; -#endif #ifdef CONFIG_PPC_OF static int of_registered; #endif @@ -2129,7 +2126,7 @@ static int __devinit ipmi_pnp_probe(struct pnp_dev *dev, { struct acpi_device *acpi_dev; struct smi_info *info; - struct resource *res, *res_second; + struct resource *res; acpi_handle handle; acpi_status status; unsigned long long tmp; @@ -2185,13 +2182,13 @@ static int __devinit ipmi_pnp_probe(struct pnp_dev *dev, info->io.addr_data = res->start; info->io.regspacing = DEFAULT_REGSPACING; - res_second = pnp_get_resource(dev, + res = pnp_get_resource(dev, (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? IORESOURCE_IO : IORESOURCE_MEM, 1); - if (res_second) { - if (res_second->start > info->io.addr_data) - info->io.regspacing = res_second->start - info->io.addr_data; + if (res) { + if (res->start > info->io.addr_data) + info->io.regspacing = res->start - info->io.addr_data; } info->io.regsize = DEFAULT_REGSPACING; info->io.regshift = 0; @@ -3362,7 +3359,6 @@ static __devinit int init_ipmi_si(void) #ifdef CONFIG_ACPI pnp_register_driver(&ipmi_pnp_driver); - pnp_registered = 1; #endif #ifdef CONFIG_DMI @@ -3530,8 +3526,7 @@ static __exit void cleanup_ipmi_si(void) pci_unregister_driver(&ipmi_pci_driver); #endif #ifdef CONFIG_ACPI - if (pnp_registered) - pnp_unregister_driver(&ipmi_pnp_driver); + pnp_unregister_driver(&ipmi_pnp_driver); #endif #ifdef CONFIG_PPC_OF diff --git a/trunk/drivers/char/mem.c b/trunk/drivers/char/mem.c index 1f528fad3516..a398ecdbd758 100644 --- a/trunk/drivers/char/mem.c +++ b/trunk/drivers/char/mem.c @@ -788,11 +788,10 @@ static const struct file_operations zero_fops = { /* * capabilities for /dev/zero * - permits private mappings, "copies" are taken of the source of zeros - * - no writeback happens */ static struct backing_dev_info zero_bdi = { .name = "char/mem", - .capabilities = BDI_CAP_MAP_COPY | BDI_CAP_NO_ACCT_AND_WRITEBACK, + .capabilities = BDI_CAP_MAP_COPY, }; static const struct file_operations full_fops = { diff --git a/trunk/drivers/char/virtio_console.c b/trunk/drivers/char/virtio_console.c index c810481a5bc2..942a9826bd23 100644 --- a/trunk/drivers/char/virtio_console.c +++ b/trunk/drivers/char/virtio_console.c @@ -596,10 +596,6 @@ static ssize_t port_fops_write(struct file *filp, const char __user *ubuf, ssize_t ret; bool nonblock; - /* Userspace could be out to fool us */ - if (!count) - return 0; - port = filp->private_data; nonblock = filp->f_flags & O_NONBLOCK; @@ -646,7 +642,7 @@ static unsigned int port_fops_poll(struct file *filp, poll_table *wait) poll_wait(filp, &port->waitqueue, wait); ret = 0; - if (!will_read_block(port)) + if (port->inbuf) ret |= POLLIN | POLLRDNORM; if (!will_write_block(port)) ret |= POLLOUT; diff --git a/trunk/drivers/dca/dca-core.c b/trunk/drivers/dca/dca-core.c index b98c67664ae7..8661c84a105d 100644 --- a/trunk/drivers/dca/dca-core.c +++ b/trunk/drivers/dca/dca-core.c @@ -39,10 +39,6 @@ static DEFINE_SPINLOCK(dca_lock); static LIST_HEAD(dca_domains); -static BLOCKING_NOTIFIER_HEAD(dca_provider_chain); - -static int dca_providers_blocked; - static struct pci_bus *dca_pci_rc_from_dev(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); @@ -74,60 +70,6 @@ static void dca_free_domain(struct dca_domain *domain) kfree(domain); } -static int dca_provider_ioat_ver_3_0(struct device *dev) -{ - struct pci_dev *pdev = to_pci_dev(dev); - - return ((pdev->vendor == PCI_VENDOR_ID_INTEL) && - ((pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG0) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG1) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG2) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG3) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG4) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG5) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG6) || - (pdev->device == PCI_DEVICE_ID_INTEL_IOAT_TBG7))); -} - -static void unregister_dca_providers(void) -{ - struct dca_provider *dca, *_dca; - struct list_head unregistered_providers; - struct dca_domain *domain; - unsigned long flags; - - blocking_notifier_call_chain(&dca_provider_chain, - DCA_PROVIDER_REMOVE, NULL); - - INIT_LIST_HEAD(&unregistered_providers); - - spin_lock_irqsave(&dca_lock, flags); - - if (list_empty(&dca_domains)) { - spin_unlock_irqrestore(&dca_lock, flags); - return; - } - - /* at this point only one domain in the list is expected */ - domain = list_first_entry(&dca_domains, struct dca_domain, node); - if (!domain) - return; - - list_for_each_entry_safe(dca, _dca, &domain->dca_providers, node) { - list_del(&dca->node); - list_add(&dca->node, &unregistered_providers); - } - - dca_free_domain(domain); - - spin_unlock_irqrestore(&dca_lock, flags); - - list_for_each_entry_safe(dca, _dca, &unregistered_providers, node) { - dca_sysfs_remove_provider(dca); - list_del(&dca->node); - } -} - static struct dca_domain *dca_find_domain(struct pci_bus *rc) { struct dca_domain *domain; @@ -148,13 +90,9 @@ static struct dca_domain *dca_get_domain(struct device *dev) domain = dca_find_domain(rc); if (!domain) { - if (dca_provider_ioat_ver_3_0(dev) && !list_empty(&dca_domains)) { - dca_providers_blocked = 1; - } else { - domain = dca_allocate_domain(rc); - if (domain) - list_add(&domain->node, &dca_domains); - } + domain = dca_allocate_domain(rc); + if (domain) + list_add(&domain->node, &dca_domains); } return domain; @@ -355,6 +293,8 @@ void free_dca_provider(struct dca_provider *dca) } EXPORT_SYMBOL_GPL(free_dca_provider); +static BLOCKING_NOTIFIER_HEAD(dca_provider_chain); + /** * register_dca_provider - register a dca provider * @dca - struct created by alloc_dca_provider() @@ -366,13 +306,6 @@ int register_dca_provider(struct dca_provider *dca, struct device *dev) unsigned long flags; struct dca_domain *domain; - spin_lock_irqsave(&dca_lock, flags); - if (dca_providers_blocked) { - spin_unlock_irqrestore(&dca_lock, flags); - return -ENODEV; - } - spin_unlock_irqrestore(&dca_lock, flags); - err = dca_sysfs_add_provider(dca, dev); if (err) return err; @@ -380,13 +313,7 @@ int register_dca_provider(struct dca_provider *dca, struct device *dev) spin_lock_irqsave(&dca_lock, flags); domain = dca_get_domain(dev); if (!domain) { - if (dca_providers_blocked) { - spin_unlock_irqrestore(&dca_lock, flags); - dca_sysfs_remove_provider(dca); - unregister_dca_providers(); - } else { - spin_unlock_irqrestore(&dca_lock, flags); - } + spin_unlock_irqrestore(&dca_lock, flags); return -ENODEV; } list_add(&dca->node, &domain->dca_providers); diff --git a/trunk/drivers/dma/mv_xor.c b/trunk/drivers/dma/mv_xor.c index 411d5bf50fc4..86c5ae9fde34 100644 --- a/trunk/drivers/dma/mv_xor.c +++ b/trunk/drivers/dma/mv_xor.c @@ -162,7 +162,7 @@ static int mv_is_err_intr(u32 intr_cause) static void mv_xor_device_clear_eoc_cause(struct mv_xor_chan *chan) { - u32 val = ~(1 << (chan->idx * 16)); + u32 val = (1 << (1 + (chan->idx * 16))); dev_dbg(chan->device->common.dev, "%s, val 0x%08x\n", __func__, val); __raw_writel(val, XOR_INTR_CAUSE(chan)); } diff --git a/trunk/drivers/edac/edac_mc.c b/trunk/drivers/edac/edac_mc.c index 6b21e25f7a84..3630308e7b81 100644 --- a/trunk/drivers/edac/edac_mc.c +++ b/trunk/drivers/edac/edac_mc.c @@ -339,9 +339,6 @@ static void edac_mc_workq_teardown(struct mem_ctl_info *mci) { int status; - if (mci->op_state != OP_RUNNING_POLL) - return; - status = cancel_delayed_work(&mci->work); if (status == 0) { debugf0("%s() not canceled, flush the queue\n", diff --git a/trunk/drivers/gpio/tc35892-gpio.c b/trunk/drivers/gpio/tc35892-gpio.c index 7e10c935a047..1be6288780de 100644 --- a/trunk/drivers/gpio/tc35892-gpio.c +++ b/trunk/drivers/gpio/tc35892-gpio.c @@ -322,9 +322,6 @@ static int __devinit tc35892_gpio_probe(struct platform_device *pdev) goto out_freeirq; } - if (pdata->setup) - pdata->setup(tc35892, tc35892_gpio->chip.base); - platform_set_drvdata(pdev, tc35892_gpio); return 0; @@ -341,14 +338,9 @@ static int __devinit tc35892_gpio_probe(struct platform_device *pdev) static int __devexit tc35892_gpio_remove(struct platform_device *pdev) { struct tc35892_gpio *tc35892_gpio = platform_get_drvdata(pdev); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - struct tc35892_gpio_platform_data *pdata = tc35892->pdata->gpio; int irq = platform_get_irq(pdev, 0); int ret; - if (pdata->remove) - pdata->remove(tc35892, tc35892_gpio->chip.base); - ret = gpiochip_remove(&tc35892_gpio->chip); if (ret < 0) { dev_err(tc35892_gpio->dev, diff --git a/trunk/drivers/gpu/drm/drm_buffer.c b/trunk/drivers/gpu/drm/drm_buffer.c index 529a0dbe9fc6..55d03ed05000 100644 --- a/trunk/drivers/gpu/drm/drm_buffer.c +++ b/trunk/drivers/gpu/drm/drm_buffer.c @@ -98,8 +98,8 @@ EXPORT_SYMBOL(drm_buffer_alloc); * user_data: A pointer the data that is copied to the buffer. * size: The Number of bytes to copy. */ -int drm_buffer_copy_from_user(struct drm_buffer *buf, - void __user *user_data, int size) +extern int drm_buffer_copy_from_user(struct drm_buffer *buf, + void __user *user_data, int size) { int nr_pages = size / PAGE_SIZE + 1; int idx; @@ -163,7 +163,7 @@ void *drm_buffer_read_object(struct drm_buffer *buf, { int idx = drm_buffer_index(buf); int page = drm_buffer_page(buf); - void *obj = NULL; + void *obj = 0; if (idx + objsize <= PAGE_SIZE) { obj = &buf->data[page][idx]; diff --git a/trunk/drivers/gpu/drm/i915/i915_drv.c b/trunk/drivers/gpu/drm/i915/i915_drv.c index 6dbe14cc4f74..216deb579785 100644 --- a/trunk/drivers/gpu/drm/i915/i915_drv.c +++ b/trunk/drivers/gpu/drm/i915/i915_drv.c @@ -170,7 +170,6 @@ static const struct pci_device_id pciidlist[] = { /* aka */ INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */ INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */ INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */ - INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */ INTEL_VGA_DEVICE(0xa001, &intel_pineview_info), INTEL_VGA_DEVICE(0xa011, &intel_pineview_info), INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info), diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c index bced9b25c71e..16fca1d1799a 100644 --- a/trunk/drivers/gpu/drm/i915/i915_gem.c +++ b/trunk/drivers/gpu/drm/i915/i915_gem.c @@ -2351,21 +2351,14 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj) reg->obj = obj; - switch (INTEL_INFO(dev)->gen) { - case 6: + if (IS_GEN6(dev)) sandybridge_write_fence_reg(reg); - break; - case 5: - case 4: + else if (IS_I965G(dev)) i965_write_fence_reg(reg); - break; - case 3: + else if (IS_I9XX(dev)) i915_write_fence_reg(reg); - break; - case 2: + else i830_write_fence_reg(reg); - break; - } trace_i915_gem_object_get_fence(obj, obj_priv->fence_reg, obj_priv->tiling_mode); @@ -2388,26 +2381,22 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj) struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[obj_priv->fence_reg]; - uint32_t fence_reg; - switch (INTEL_INFO(dev)->gen) { - case 6: + if (IS_GEN6(dev)) { I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + (obj_priv->fence_reg * 8), 0); - break; - case 5: - case 4: + } else if (IS_I965G(dev)) { I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0); - break; - case 3: - if (obj_priv->fence_reg >= 8) - fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - 8) * 4; - else - case 2: + } else { + uint32_t fence_reg; + + if (obj_priv->fence_reg < 8) fence_reg = FENCE_REG_830_0 + obj_priv->fence_reg * 4; + else + fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - + 8) * 4; I915_WRITE(fence_reg, 0); - break; } reg->obj = NULL; diff --git a/trunk/drivers/gpu/drm/i915/i915_gem_evict.c b/trunk/drivers/gpu/drm/i915/i915_gem_evict.c index e85246ef691c..72cae3cccad8 100644 --- a/trunk/drivers/gpu/drm/i915/i915_gem_evict.c +++ b/trunk/drivers/gpu/drm/i915/i915_gem_evict.c @@ -79,7 +79,6 @@ mark_free(struct drm_i915_gem_object *obj_priv, struct list_head *unwind) { list_add(&obj_priv->evict_list, unwind); - drm_gem_object_reference(&obj_priv->base); return drm_mm_scan_add_block(obj_priv->gtt_space); } @@ -166,7 +165,6 @@ i915_gem_evict_something(struct drm_device *dev, int min_size, unsigned alignmen list_for_each_entry(obj_priv, &unwind_list, evict_list) { ret = drm_mm_scan_remove_block(obj_priv->gtt_space); BUG_ON(ret); - drm_gem_object_unreference(&obj_priv->base); } /* We expect the caller to unpin, evict all and try again, or give up. @@ -183,21 +181,18 @@ i915_gem_evict_something(struct drm_device *dev, int min_size, unsigned alignmen * scanning, therefore store to be evicted objects on a * temporary list. */ list_move(&obj_priv->evict_list, &eviction_list); - } else - drm_gem_object_unreference(&obj_priv->base); + } } /* Unbinding will emit any required flushes */ list_for_each_entry_safe(obj_priv, tmp_obj_priv, &eviction_list, evict_list) { #if WATCH_LRU - DRM_INFO("%s: evicting %p\n", __func__, &obj_priv->base); + DRM_INFO("%s: evicting %p\n", __func__, obj); #endif ret = i915_gem_object_unbind(&obj_priv->base); if (ret) return ret; - - drm_gem_object_unreference(&obj_priv->base); } /* The just created free hole should be on the top of the free stack diff --git a/trunk/drivers/gpu/drm/i915/i915_suspend.c b/trunk/drivers/gpu/drm/i915/i915_suspend.c index 31f08581e93a..2c6b98f2440e 100644 --- a/trunk/drivers/gpu/drm/i915/i915_suspend.c +++ b/trunk/drivers/gpu/drm/i915/i915_suspend.c @@ -789,25 +789,16 @@ int i915_save_state(struct drm_device *dev) dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); /* Fences */ - switch (INTEL_INFO(dev)->gen) { - case 6: - for (i = 0; i < 16; i++) - dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8)); - break; - case 5: - case 4: + if (IS_I965G(dev)) { for (i = 0; i < 16; i++) dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8)); - break; - case 3: - if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) - for (i = 0; i < 8; i++) - dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); - case 2: + } else { for (i = 0; i < 8; i++) dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4)); - break; + if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) + for (i = 0; i < 8; i++) + dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4)); } return 0; @@ -824,24 +815,15 @@ int i915_restore_state(struct drm_device *dev) I915_WRITE(HWS_PGA, dev_priv->saveHWS); /* Fences */ - switch (INTEL_INFO(dev)->gen) { - case 6: - for (i = 0; i < 16; i++) - I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + (i * 8), dev_priv->saveFENCE[i]); - break; - case 5: - case 4: + if (IS_I965G(dev)) { for (i = 0; i < 16; i++) I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]); - break; - case 3: - case 2: + } else { + for (i = 0; i < 8; i++) + I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]); if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) for (i = 0; i < 8; i++) I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]); - for (i = 0; i < 8; i++) - I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]); - break; } i915_restore_display(dev); diff --git a/trunk/drivers/gpu/drm/i915/intel_crt.c b/trunk/drivers/gpu/drm/i915/intel_crt.c index 197d4f32585a..a02a8df73727 100644 --- a/trunk/drivers/gpu/drm/i915/intel_crt.c +++ b/trunk/drivers/gpu/drm/i915/intel_crt.c @@ -188,7 +188,7 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, 1000, 1)) - DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); + DRM_ERROR("timed out waiting for FORCE_TRIGGER"); if (turn_off_dac) { I915_WRITE(PCH_ADPA, temp); @@ -245,7 +245,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector) if (wait_for((I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0, 1000, 1)) - DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); + DRM_ERROR("timed out waiting for FORCE_DETECT to go off"); } stat = I915_READ(PORT_HOTPLUG_STAT); diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index b5bf51a4502d..19daead5b525 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -2463,19 +2463,11 @@ static bool intel_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *adjusted_mode) { struct drm_device *dev = crtc->dev; - if (HAS_PCH_SPLIT(dev)) { /* FDI link clock is fixed at 2.7G */ if (mode->clock * 3 > IRONLAKE_FDI_FREQ * 4) return false; } - - /* XXX some encoders set the crtcinfo, others don't. - * Obviously we need some form of conflict resolution here... - */ - if (adjusted_mode->crtc_htotal == 0) - drm_mode_set_crtcinfo(adjusted_mode, 0); - return true; } diff --git a/trunk/drivers/gpu/drm/i915/intel_sdvo.c b/trunk/drivers/gpu/drm/i915/intel_sdvo.c index ee73e428a84a..e8e902d614ed 100644 --- a/trunk/drivers/gpu/drm/i915/intel_sdvo.c +++ b/trunk/drivers/gpu/drm/i915/intel_sdvo.c @@ -2170,7 +2170,8 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) return true; err: - intel_sdvo_destroy(connector); + intel_sdvo_destroy_enhance_property(connector); + kfree(intel_sdvo_connector); return false; } @@ -2242,7 +2243,8 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) return true; err: - intel_sdvo_destroy(connector); + intel_sdvo_destroy_enhance_property(connector); + kfree(intel_sdvo_connector); return false; } @@ -2520,10 +2522,11 @@ static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, uint16_t response; } enhancements; - enhancements.response = 0; - intel_sdvo_get_value(intel_sdvo, - SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, - &enhancements, sizeof(enhancements)); + if (!intel_sdvo_get_value(intel_sdvo, + SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, + &enhancements, sizeof(enhancements))) + return false; + if (enhancements.response == 0) { DRM_DEBUG_KMS("No enhancement is supported\n"); return true; diff --git a/trunk/drivers/gpu/drm/nouveau/nouveau_connector.c b/trunk/drivers/gpu/drm/nouveau/nouveau_connector.c index fc737037f751..87186a4bbf03 100644 --- a/trunk/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/trunk/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -558,10 +558,8 @@ nouveau_connector_get_modes(struct drm_connector *connector) if (nv_encoder->dcb->type == OUTPUT_LVDS && (nv_encoder->dcb->lvdsconf.use_straps_for_mode || dev_priv->vbios.fp_no_ddc) && nouveau_bios_fp_mode(dev, NULL)) { - struct drm_display_mode mode; - - nouveau_bios_fp_mode(dev, &mode); - nv_connector->native_mode = drm_mode_duplicate(dev, &mode); + nv_connector->native_mode = drm_mode_create(dev); + nouveau_bios_fp_mode(dev, nv_connector->native_mode); } /* Find the native mode if this is a digital panel, if we didn't diff --git a/trunk/drivers/gpu/drm/radeon/atombios.h b/trunk/drivers/gpu/drm/radeon/atombios.h index fe359a239df3..1bc72c3190a9 100644 --- a/trunk/drivers/gpu/drm/radeon/atombios.h +++ b/trunk/drivers/gpu/drm/radeon/atombios.h @@ -4999,7 +4999,7 @@ typedef struct _SW_I2C_IO_DATA_PARAMETERS #define SW_I2C_CNTL_WRITE1BIT 6 //==============================VESA definition Portion=============================== -#define VESA_OEM_PRODUCT_REV "01.00" +#define VESA_OEM_PRODUCT_REV '01.00' #define VESA_MODE_ATTRIBUTE_MODE_SUPPORT 0xBB //refer to VBE spec p.32, no TTY support #define VESA_MODE_WIN_ATTRIBUTE 7 #define VESA_WIN_SIZE 64 diff --git a/trunk/drivers/gpu/drm/radeon/r600.c b/trunk/drivers/gpu/drm/radeon/r600.c index ddc3adea1dda..afc18d87fdca 100644 --- a/trunk/drivers/gpu/drm/radeon/r600.c +++ b/trunk/drivers/gpu/drm/radeon/r600.c @@ -2729,7 +2729,7 @@ int r600_ib_test(struct radeon_device *rdev) if (i < rdev->usec_timeout) { DRM_INFO("ib test succeeded in %u usecs\n", i); } else { - DRM_ERROR("radeon: ib test failed (scratch(0x%04X)=0x%08X)\n", + DRM_ERROR("radeon: ib test failed (sracth(0x%04X)=0x%08X)\n", scratch, tmp); r = -EINVAL; } diff --git a/trunk/drivers/gpu/drm/radeon/radeon_kms.c b/trunk/drivers/gpu/drm/radeon/radeon_kms.c index 8fbbe1c6ebbd..5eee3c41d124 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_kms.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_kms.c @@ -203,10 +203,6 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) */ int radeon_driver_firstopen_kms(struct drm_device *dev) { - struct radeon_device *rdev = dev->dev_private; - - if (rdev->powered_down) - return -EINVAL; return 0; } diff --git a/trunk/drivers/gpu/drm/ttm/ttm_bo_util.c b/trunk/drivers/gpu/drm/ttm/ttm_bo_util.c index 3451a82adba7..7cffb3e04232 100644 --- a/trunk/drivers/gpu/drm/ttm/ttm_bo_util.c +++ b/trunk/drivers/gpu/drm/ttm/ttm_bo_util.c @@ -351,7 +351,6 @@ static int ttm_buffer_object_transfer(struct ttm_buffer_object *bo, INIT_LIST_HEAD(&fbo->lru); INIT_LIST_HEAD(&fbo->swap); fbo->vm_node = NULL; - atomic_set(&fbo->cpu_writers, 0); fbo->sync_obj = driver->sync_obj_ref(bo->sync_obj); kref_init(&fbo->list_kref); diff --git a/trunk/drivers/gpu/drm/ttm/ttm_page_alloc.c b/trunk/drivers/gpu/drm/ttm/ttm_page_alloc.c index b1e02fffd3cc..ca904799f018 100644 --- a/trunk/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/trunk/drivers/gpu/drm/ttm/ttm_page_alloc.c @@ -69,7 +69,7 @@ struct ttm_page_pool { spinlock_t lock; bool fill_lock; struct list_head list; - gfp_t gfp_flags; + int gfp_flags; unsigned npages; char *name; unsigned long nfrees; @@ -475,7 +475,7 @@ static void ttm_handle_caching_state_failure(struct list_head *pages, * This function is reentrant if caller updates count depending on number of * pages returned in pages array. */ -static int ttm_alloc_new_pages(struct list_head *pages, gfp_t gfp_flags, +static int ttm_alloc_new_pages(struct list_head *pages, int gfp_flags, int ttm_flags, enum ttm_caching_state cstate, unsigned count) { struct page **caching_array; @@ -666,7 +666,7 @@ int ttm_get_pages(struct list_head *pages, int flags, { struct ttm_page_pool *pool = ttm_get_pool(flags, cstate); struct page *p = NULL; - gfp_t gfp_flags = GFP_USER; + int gfp_flags = GFP_USER; int r; /* set zero flag for page allocation if required */ @@ -818,7 +818,7 @@ int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages) return 0; } -void ttm_page_alloc_fini(void) +void ttm_page_alloc_fini() { int i; diff --git a/trunk/drivers/gpu/vga/vgaarb.c b/trunk/drivers/gpu/vga/vgaarb.c index f366f968155a..b87569e96b16 100644 --- a/trunk/drivers/gpu/vga/vgaarb.c +++ b/trunk/drivers/gpu/vga/vgaarb.c @@ -598,7 +598,7 @@ static inline void vga_update_device_decodes(struct vga_device *vgadev, pr_debug("vgaarb: decoding count now is: %d\n", vga_decode_count); } -static void __vga_set_legacy_decoding(struct pci_dev *pdev, unsigned int decodes, bool userspace) +void __vga_set_legacy_decoding(struct pci_dev *pdev, unsigned int decodes, bool userspace) { struct vga_device *vgadev; unsigned long flags; diff --git a/trunk/drivers/hwmon/Kconfig b/trunk/drivers/hwmon/Kconfig index 97499d00615a..4d4d09bdec0a 100644 --- a/trunk/drivers/hwmon/Kconfig +++ b/trunk/drivers/hwmon/Kconfig @@ -409,7 +409,7 @@ config SENSORS_CORETEMP config SENSORS_PKGTEMP tristate "Intel processor package temperature sensor" - depends on X86 && EXPERIMENTAL + depends on X86 && PCI && EXPERIMENTAL help If you say yes here you get support for the package level temperature sensor inside your CPU. Check documentation/driver for details. diff --git a/trunk/drivers/hwmon/coretemp.c b/trunk/drivers/hwmon/coretemp.c index a23b17a78ace..de8111114f46 100644 --- a/trunk/drivers/hwmon/coretemp.c +++ b/trunk/drivers/hwmon/coretemp.c @@ -36,7 +36,6 @@ #include #include #include -#include #define DRVNAME "coretemp" @@ -424,18 +423,9 @@ static int __cpuinit coretemp_device_add(unsigned int cpu) int err; struct platform_device *pdev; struct pdev_entry *pdev_entry; +#ifdef CONFIG_SMP struct cpuinfo_x86 *c = &cpu_data(cpu); - - /* - * CPUID.06H.EAX[0] indicates whether the CPU has thermal - * sensors. We check this bit only, all the early CPUs - * without thermal sensors will be filtered out. - */ - if (!cpu_has(c, X86_FEATURE_DTS)) { - printk(KERN_INFO DRVNAME ": CPU (model=0x%x)" - " has no thermal sensor.\n", c->x86_model); - return 0; - } +#endif mutex_lock(&pdev_list_mutex); @@ -492,22 +482,14 @@ static int __cpuinit coretemp_device_add(unsigned int cpu) static void coretemp_device_remove(unsigned int cpu) { - struct pdev_entry *p; - unsigned int i; - + struct pdev_entry *p, *n; mutex_lock(&pdev_list_mutex); - list_for_each_entry(p, &pdev_list, list) { - if (p->cpu != cpu) - continue; - - platform_device_unregister(p->pdev); - list_del(&p->list); - mutex_unlock(&pdev_list_mutex); - kfree(p); - for_each_cpu(i, cpu_sibling_mask(cpu)) - if (i != cpu && !coretemp_device_add(i)) - break; - return; + list_for_each_entry_safe(p, n, &pdev_list, list) { + if (p->cpu == cpu) { + platform_device_unregister(p->pdev); + list_del(&p->list); + kfree(p); + } } mutex_unlock(&pdev_list_mutex); } @@ -545,21 +527,30 @@ static int __init coretemp_init(void) if (err) goto exit; - for_each_online_cpu(i) - coretemp_device_add(i); - -#ifndef CONFIG_HOTPLUG_CPU + for_each_online_cpu(i) { + struct cpuinfo_x86 *c = &cpu_data(i); + /* + * CPUID.06H.EAX[0] indicates whether the CPU has thermal + * sensors. We check this bit only, all the early CPUs + * without thermal sensors will be filtered out. + */ + if (c->cpuid_level >= 6 && (cpuid_eax(0x06) & 0x01)) + coretemp_device_add(i); + else { + printk(KERN_INFO DRVNAME ": CPU (model=0x%x)" + " has no thermal sensor.\n", c->x86_model); + } + } if (list_empty(&pdev_list)) { err = -ENODEV; goto exit_driver_unreg; } -#endif register_hotcpu_notifier(&coretemp_cpu_notifier); return 0; -#ifndef CONFIG_HOTPLUG_CPU exit_driver_unreg: +#ifndef CONFIG_HOTPLUG_CPU platform_driver_unregister(&coretemp_driver); #endif exit: diff --git a/trunk/drivers/hwmon/lis3lv02d.c b/trunk/drivers/hwmon/lis3lv02d.c index fc591ae53107..6138f036b159 100644 --- a/trunk/drivers/hwmon/lis3lv02d.c +++ b/trunk/drivers/hwmon/lis3lv02d.c @@ -277,7 +277,7 @@ static irqreturn_t lis302dl_interrupt(int irq, void *dummy) wake_up_interruptible(&lis3_dev.misc_wait); kill_fasync(&lis3_dev.async_queue, SIGIO, POLL_IN); out: - if (lis3_dev.pdata && lis3_dev.whoami == WAI_8B && lis3_dev.idev && + if (lis3_dev.whoami == WAI_8B && lis3_dev.idev && lis3_dev.idev->input->users) return IRQ_WAKE_THREAD; return IRQ_HANDLED; @@ -718,7 +718,7 @@ int lis3lv02d_init_device(struct lis3lv02d *dev) * io-apic is not configurable (and generates a warning) but I keep it * in case of support for other hardware. */ - if (dev->pdata && dev->whoami == WAI_8B) + if (dev->whoami == WAI_8B) thread_fn = lis302dl_interrupt_thread1_8b; else thread_fn = NULL; diff --git a/trunk/drivers/hwmon/pkgtemp.c b/trunk/drivers/hwmon/pkgtemp.c index f11903936c8b..74157fcda6ed 100644 --- a/trunk/drivers/hwmon/pkgtemp.c +++ b/trunk/drivers/hwmon/pkgtemp.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -223,7 +224,7 @@ static int __devinit pkgtemp_probe(struct platform_device *pdev) err = sysfs_create_group(&pdev->dev.kobj, &pkgtemp_group); if (err) - goto exit_dev; + goto exit_free; data->hwmon_dev = hwmon_device_register(&pdev->dev); if (IS_ERR(data->hwmon_dev)) { @@ -237,8 +238,6 @@ static int __devinit pkgtemp_probe(struct platform_device *pdev) exit_class: sysfs_remove_group(&pdev->dev.kobj, &pkgtemp_group); -exit_dev: - device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); exit_free: kfree(data); exit: @@ -251,7 +250,6 @@ static int __devexit pkgtemp_remove(struct platform_device *pdev) hwmon_device_unregister(data->hwmon_dev); sysfs_remove_group(&pdev->dev.kobj, &pkgtemp_group); - device_remove_file(&pdev->dev, &sensor_dev_attr_temp1_max.dev_attr); platform_set_drvdata(pdev, NULL); kfree(data); return 0; @@ -283,10 +281,9 @@ static int __cpuinit pkgtemp_device_add(unsigned int cpu) int err; struct platform_device *pdev; struct pdev_entry *pdev_entry; +#ifdef CONFIG_SMP struct cpuinfo_x86 *c = &cpu_data(cpu); - - if (!cpu_has(c, X86_FEATURE_PTS)) - return 0; +#endif mutex_lock(&pdev_list_mutex); @@ -342,18 +339,17 @@ static int __cpuinit pkgtemp_device_add(unsigned int cpu) #ifdef CONFIG_HOTPLUG_CPU static void pkgtemp_device_remove(unsigned int cpu) { - struct pdev_entry *p; + struct pdev_entry *p, *n; unsigned int i; int err; mutex_lock(&pdev_list_mutex); - list_for_each_entry(p, &pdev_list, list) { + list_for_each_entry_safe(p, n, &pdev_list, list) { if (p->cpu != cpu) continue; platform_device_unregister(p->pdev); list_del(&p->list); - mutex_unlock(&pdev_list_mutex); kfree(p); for_each_cpu(i, cpu_core_mask(cpu)) { if (i != cpu) { @@ -362,7 +358,7 @@ static void pkgtemp_device_remove(unsigned int cpu) break; } } - return; + break; } mutex_unlock(&pdev_list_mutex); } @@ -403,6 +399,11 @@ static int __init pkgtemp_init(void) goto exit; for_each_online_cpu(i) { + struct cpuinfo_x86 *c = &cpu_data(i); + + if (!cpu_has(c, X86_FEATURE_PTS)) + continue; + err = pkgtemp_device_add(i); if (err) goto exit_devices_unreg; diff --git a/trunk/drivers/i2c/busses/i2c-omap.c b/trunk/drivers/i2c/busses/i2c-omap.c index b33c78586bfc..7674efb55378 100644 --- a/trunk/drivers/i2c/busses/i2c-omap.c +++ b/trunk/drivers/i2c/busses/i2c-omap.c @@ -680,8 +680,6 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) if (r == 0) r = num; - - omap_i2c_wait_for_bb(dev); out: omap_i2c_idle(dev); return r; diff --git a/trunk/drivers/ide/ide-probe.c b/trunk/drivers/ide/ide-probe.c index 068cef0a987a..4c3d1bfec0c5 100644 --- a/trunk/drivers/ide/ide-probe.c +++ b/trunk/drivers/ide/ide-probe.c @@ -1444,6 +1444,14 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d, ide_acpi_port_init_devices(hwif); } + ide_host_for_each_port(i, hwif, host) { + if (hwif == NULL) + continue; + + if (hwif->present) + hwif_register_devices(hwif); + } + ide_host_for_each_port(i, hwif, host) { if (hwif == NULL) continue; @@ -1451,10 +1459,8 @@ int ide_host_register(struct ide_host *host, const struct ide_port_info *d, ide_sysfs_register_port(hwif); ide_proc_register_port(hwif); - if (hwif->present) { + if (hwif->present) ide_proc_port_register_devices(hwif); - hwif_register_devices(hwif); - } } return j ? 0 : -1; diff --git a/trunk/drivers/infiniband/hw/cxgb3/iwch_cm.c b/trunk/drivers/infiniband/hw/cxgb3/iwch_cm.c index 13c88871dc3b..d88077a21994 100644 --- a/trunk/drivers/infiniband/hw/cxgb3/iwch_cm.c +++ b/trunk/drivers/infiniband/hw/cxgb3/iwch_cm.c @@ -463,8 +463,7 @@ static int send_connect(struct iwch_ep *ep) V_MSS_IDX(mtu_idx) | V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx); opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10); - opt2 = F_RX_COALESCE_VALID | V_RX_COALESCE(0) | V_FLAVORS_VALID(1) | - V_CONG_CONTROL_FLAVOR(cong_flavor); + opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor); skb->priority = CPL_PRIORITY_SETUP; set_arp_failure_handler(skb, act_open_req_arp_failure); @@ -1281,8 +1280,7 @@ static void accept_cr(struct iwch_ep *ep, __be32 peer_ip, struct sk_buff *skb) V_MSS_IDX(mtu_idx) | V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx); opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10); - opt2 = F_RX_COALESCE_VALID | V_RX_COALESCE(0) | V_FLAVORS_VALID(1) | - V_CONG_CONTROL_FLAVOR(cong_flavor); + opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor); rpl = cplhdr(skb); rpl->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); diff --git a/trunk/drivers/leds/leds-ns2.c b/trunk/drivers/leds/leds-ns2.c index 350eb34f049c..74dce4ba0262 100644 --- a/trunk/drivers/leds/leds-ns2.c +++ b/trunk/drivers/leds/leds-ns2.c @@ -81,7 +81,7 @@ static int ns2_led_get_mode(struct ns2_led_data *led_dat, int cmd_level; int slow_level; - read_lock_irq(&led_dat->rw_lock); + read_lock(&led_dat->rw_lock); cmd_level = gpio_get_value(led_dat->cmd); slow_level = gpio_get_value(led_dat->slow); @@ -95,7 +95,7 @@ static int ns2_led_get_mode(struct ns2_led_data *led_dat, } } - read_unlock_irq(&led_dat->rw_lock); + read_unlock(&led_dat->rw_lock); return ret; } @@ -104,9 +104,8 @@ static void ns2_led_set_mode(struct ns2_led_data *led_dat, enum ns2_led_modes mode) { int i; - unsigned long flags; - write_lock_irqsave(&led_dat->rw_lock, flags); + write_lock(&led_dat->rw_lock); for (i = 0; i < ARRAY_SIZE(ns2_led_modval); i++) { if (mode == ns2_led_modval[i].mode) { @@ -117,7 +116,7 @@ static void ns2_led_set_mode(struct ns2_led_data *led_dat, } } - write_unlock_irqrestore(&led_dat->rw_lock, flags); + write_unlock(&led_dat->rw_lock); } static void ns2_led_set(struct led_classdev *led_cdev, diff --git a/trunk/drivers/misc/Kconfig b/trunk/drivers/misc/Kconfig index b74331260744..0b591b658243 100644 --- a/trunk/drivers/misc/Kconfig +++ b/trunk/drivers/misc/Kconfig @@ -368,7 +368,7 @@ config VMWARE_BALLOON If unsure, say N. To compile this driver as a module, choose M here: the - module will be called vmw_balloon. + module will be called vmware_balloon. config ARM_CHARLCD bool "ARM Ltd. Character LCD Driver" diff --git a/trunk/drivers/misc/Makefile b/trunk/drivers/misc/Makefile index 42eab95cde2a..255a80dc9d73 100644 --- a/trunk/drivers/misc/Makefile +++ b/trunk/drivers/misc/Makefile @@ -33,5 +33,5 @@ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/ obj-$(CONFIG_HMC6352) += hmc6352.o obj-y += eeprom/ obj-y += cb710/ -obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o +obj-$(CONFIG_VMWARE_BALLOON) += vmware_balloon.o obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o diff --git a/trunk/drivers/misc/vmw_balloon.c b/trunk/drivers/misc/vmware_balloon.c similarity index 100% rename from trunk/drivers/misc/vmw_balloon.c rename to trunk/drivers/misc/vmware_balloon.c diff --git a/trunk/drivers/mmc/host/mmci.c b/trunk/drivers/mmc/host/mmci.c index f2e02d7d9f3d..840b301b5671 100644 --- a/trunk/drivers/mmc/host/mmci.c +++ b/trunk/drivers/mmc/host/mmci.c @@ -41,35 +41,23 @@ static unsigned int fmax = 515633; * @clkreg: default value for MCICLOCK register * @clkreg_enable: enable value for MMCICLOCK register * @datalength_bits: number of bits in the MMCIDATALENGTH register - * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY - * is asserted (likewise for RX) - * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY - * is asserted (likewise for RX) */ struct variant_data { unsigned int clkreg; unsigned int clkreg_enable; unsigned int datalength_bits; - unsigned int fifosize; - unsigned int fifohalfsize; }; static struct variant_data variant_arm = { - .fifosize = 16 * 4, - .fifohalfsize = 8 * 4, .datalength_bits = 16, }; static struct variant_data variant_u300 = { - .fifosize = 16 * 4, - .fifohalfsize = 8 * 4, .clkreg_enable = 1 << 13, /* HWFCEN */ .datalength_bits = 16, }; static struct variant_data variant_ux500 = { - .fifosize = 30 * 4, - .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, .clkreg_enable = 1 << 14, /* HWFCEN */ .datalength_bits = 24, @@ -150,7 +138,6 @@ static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) { - struct variant_data *variant = host->variant; unsigned int datactrl, timeout, irqmask; unsigned long long clks; void __iomem *base; @@ -186,7 +173,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) * If we have less than a FIFOSIZE of bytes to transfer, * trigger a PIO interrupt as soon as any data is available. */ - if (host->size < variant->fifosize) + if (host->size < MCI_FIFOSIZE) irqmask |= MCI_RXDATAAVLBLMASK; } else { /* @@ -345,15 +332,13 @@ static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int rema static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) { - struct variant_data *variant = host->variant; void __iomem *base = host->base; char *ptr = buffer; do { unsigned int count, maxcnt; - maxcnt = status & MCI_TXFIFOEMPTY ? - variant->fifosize : variant->fifohalfsize; + maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE; count = min(remain, maxcnt); writesl(base + MMCIFIFO, ptr, count >> 2); @@ -377,7 +362,6 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) { struct mmci_host *host = dev_id; struct sg_mapping_iter *sg_miter = &host->sg_miter; - struct variant_data *variant = host->variant; void __iomem *base = host->base; unsigned long flags; u32 status; @@ -436,7 +420,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) * If we're nearing the end of the read, switch to * "any data available" mode. */ - if (status & MCI_RXACTIVE && host->size < variant->fifosize) + if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE) writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1); /* @@ -580,23 +564,18 @@ static int mmci_get_ro(struct mmc_host *mmc) if (host->gpio_wp == -ENOSYS) return -ENOSYS; - return gpio_get_value_cansleep(host->gpio_wp); + return gpio_get_value(host->gpio_wp); } static int mmci_get_cd(struct mmc_host *mmc) { struct mmci_host *host = mmc_priv(mmc); - struct mmci_platform_data *plat = host->plat; unsigned int status; - if (host->gpio_cd == -ENOSYS) { - if (!plat->status) - return 1; /* Assume always present */ - - status = plat->status(mmc_dev(host->mmc)); - } else - status = !!gpio_get_value_cansleep(host->gpio_cd) - ^ plat->cd_invert; + if (host->gpio_cd == -ENOSYS) + status = host->plat->status(mmc_dev(host->mmc)); + else + status = !gpio_get_value(host->gpio_cd); /* * Use positive logic throughout - status is zero for no card, @@ -605,15 +584,6 @@ static int mmci_get_cd(struct mmc_host *mmc) return status; } -static irqreturn_t mmci_cd_irq(int irq, void *dev_id) -{ - struct mmci_host *host = dev_id; - - mmc_detect_change(host->mmc, msecs_to_jiffies(500)); - - return IRQ_HANDLED; -} - static const struct mmc_host_ops mmci_ops = { .request = mmci_request, .set_ios = mmci_set_ios, @@ -650,7 +620,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) host->gpio_wp = -ENOSYS; host->gpio_cd = -ENOSYS; - host->gpio_cd_irq = -1; host->hw_designer = amba_manf(dev); host->hw_revision = amba_rev(dev); @@ -730,6 +699,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) if (host->vcc == NULL) mmc->ocr_avail = plat->ocr_mask; mmc->caps = plat->capabilities; + mmc->caps |= MMC_CAP_NEEDS_POLL; /* * We can do SGIO @@ -774,12 +744,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) host->gpio_cd = plat->gpio_cd; else if (ret != -ENOSYS) goto err_gpio_cd; - - ret = request_any_context_irq(gpio_to_irq(plat->gpio_cd), - mmci_cd_irq, 0, - DRIVER_NAME " (cd)", host); - if (ret >= 0) - host->gpio_cd_irq = gpio_to_irq(plat->gpio_cd); } if (gpio_is_valid(plat->gpio_wp)) { ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)"); @@ -791,10 +755,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) goto err_gpio_wp; } - if ((host->plat->status || host->gpio_cd != -ENOSYS) - && host->gpio_cd_irq < 0) - mmc->caps |= MMC_CAP_NEEDS_POLL; - ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host); if (ret) goto unmap; @@ -821,8 +781,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) if (host->gpio_wp != -ENOSYS) gpio_free(host->gpio_wp); err_gpio_wp: - if (host->gpio_cd_irq >= 0) - free_irq(host->gpio_cd_irq, host); if (host->gpio_cd != -ENOSYS) gpio_free(host->gpio_cd); err_gpio_cd: @@ -861,8 +819,6 @@ static int __devexit mmci_remove(struct amba_device *dev) if (host->gpio_wp != -ENOSYS) gpio_free(host->gpio_wp); - if (host->gpio_cd_irq >= 0) - free_irq(host->gpio_cd_irq, host); if (host->gpio_cd != -ENOSYS) gpio_free(host->gpio_cd); diff --git a/trunk/drivers/mmc/host/mmci.h b/trunk/drivers/mmc/host/mmci.h index 4ae887fc0189..68970cfb81e1 100644 --- a/trunk/drivers/mmc/host/mmci.h +++ b/trunk/drivers/mmc/host/mmci.h @@ -54,16 +54,10 @@ #define MCI_DPSM_MODE (1 << 2) #define MCI_DPSM_DMAENABLE (1 << 3) #define MCI_DPSM_BLOCKSIZE (1 << 4) -/* Control register extensions in the ST Micro U300 and Ux500 versions */ -#define MCI_ST_DPSM_RWSTART (1 << 8) -#define MCI_ST_DPSM_RWSTOP (1 << 9) -#define MCI_ST_DPSM_RWMOD (1 << 10) -#define MCI_ST_DPSM_SDIOEN (1 << 11) -/* Control register extensions in the ST Micro Ux500 versions */ -#define MCI_ST_DPSM_DMAREQCTL (1 << 12) -#define MCI_ST_DPSM_DBOOTMODEEN (1 << 13) -#define MCI_ST_DPSM_BUSYMODE (1 << 14) -#define MCI_ST_DPSM_DDRMODE (1 << 15) +#define MCI_DPSM_RWSTART (1 << 8) +#define MCI_DPSM_RWSTOP (1 << 9) +#define MCI_DPSM_RWMOD (1 << 10) +#define MCI_DPSM_SDIOEN (1 << 11) #define MMCIDATACNT 0x030 #define MMCISTATUS 0x034 @@ -139,6 +133,13 @@ MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK) +/* + * The size of the FIFO in bytes. + */ +#define MCI_FIFOSIZE (16*4) + +#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2) + #define NR_SG 16 struct clk; @@ -153,7 +154,6 @@ struct mmci_host { struct clk *clk; int gpio_cd; int gpio_wp; - int gpio_cd_irq; unsigned int data_xfered; diff --git a/trunk/drivers/mmc/host/sdhci-s3c.c b/trunk/drivers/mmc/host/sdhci-s3c.c index aacb862ecc8a..71ad4163b95e 100644 --- a/trunk/drivers/mmc/host/sdhci-s3c.c +++ b/trunk/drivers/mmc/host/sdhci-s3c.c @@ -241,10 +241,8 @@ static struct sdhci_ops sdhci_s3c_ops = { static void sdhci_s3c_notify_change(struct platform_device *dev, int state) { struct sdhci_host *host = platform_get_drvdata(dev); - unsigned long flags; - if (host) { - spin_lock_irqsave(&host->lock, flags); + spin_lock(&host->lock); if (state) { dev_dbg(&dev->dev, "card inserted.\n"); host->flags &= ~SDHCI_DEVICE_DEAD; @@ -255,7 +253,7 @@ static void sdhci_s3c_notify_change(struct platform_device *dev, int state) host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; } tasklet_schedule(&host->card_tasklet); - spin_unlock_irqrestore(&host->lock, flags); + spin_unlock(&host->lock); } } @@ -483,10 +481,8 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) sdhci_remove_host(host, 1); for (ptr = 0; ptr < 3; ptr++) { - if (sc->clk_bus[ptr]) { - clk_disable(sc->clk_bus[ptr]); - clk_put(sc->clk_bus[ptr]); - } + clk_disable(sc->clk_bus[ptr]); + clk_put(sc->clk_bus[ptr]); } clk_disable(sc->clk_io); clk_put(sc->clk_io); diff --git a/trunk/drivers/net/3c59x.c b/trunk/drivers/net/3c59x.c index 179871d9e71f..85671adae455 100644 --- a/trunk/drivers/net/3c59x.c +++ b/trunk/drivers/net/3c59x.c @@ -635,9 +635,6 @@ struct vortex_private { must_free_region:1, /* Flag: if zero, Cardbus owns the I/O region */ large_frames:1, /* accept large frames */ handling_irq:1; /* private in_irq indicator */ - /* {get|set}_wol operations are already serialized by rtnl. - * no additional locking is required for the enable_wol and acpi_set_WOL() - */ int drv_flags; u16 status_enable; u16 intr_enable; @@ -2942,31 +2939,28 @@ static void vortex_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) { struct vortex_private *vp = netdev_priv(dev); - if (!VORTEX_PCI(vp)) - return; - + spin_lock_irq(&vp->lock); wol->supported = WAKE_MAGIC; wol->wolopts = 0; if (vp->enable_wol) wol->wolopts |= WAKE_MAGIC; + spin_unlock_irq(&vp->lock); } static int vortex_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) { struct vortex_private *vp = netdev_priv(dev); - - if (!VORTEX_PCI(vp)) - return -EOPNOTSUPP; - if (wol->wolopts & ~WAKE_MAGIC) return -EINVAL; + spin_lock_irq(&vp->lock); if (wol->wolopts & WAKE_MAGIC) vp->enable_wol = 1; else vp->enable_wol = 0; acpi_set_WOL(dev); + spin_unlock_irq(&vp->lock); return 0; } @@ -3208,9 +3202,6 @@ static void acpi_set_WOL(struct net_device *dev) return; } - if (VORTEX_PCI(vp)->current_state < PCI_D3hot) - return; - /* Change the power state to D3; RxEnable doesn't take effect. */ pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot); } diff --git a/trunk/drivers/net/atlx/atl1.c b/trunk/drivers/net/atlx/atl1.c index c73be2848319..63b9ba0cc67e 100644 --- a/trunk/drivers/net/atlx/atl1.c +++ b/trunk/drivers/net/atlx/atl1.c @@ -1251,12 +1251,6 @@ static void atl1_free_ring_resources(struct atl1_adapter *adapter) rrd_ring->desc = NULL; rrd_ring->dma = 0; - - adapter->cmb.dma = 0; - adapter->cmb.cmb = NULL; - - adapter->smb.dma = 0; - adapter->smb.smb = NULL; } static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter) @@ -2853,11 +2847,10 @@ static int atl1_resume(struct pci_dev *pdev) pci_enable_wake(pdev, PCI_D3cold, 0); atl1_reset_hw(&adapter->hw); + adapter->cmb.cmb->int_stats = 0; - if (netif_running(netdev)) { - adapter->cmb.cmb->int_stats = 0; + if (netif_running(netdev)) atl1_up(adapter); - } netif_device_attach(netdev); return 0; diff --git a/trunk/drivers/net/bonding/bond_3ad.c b/trunk/drivers/net/bonding/bond_3ad.c index 0ddf4c66afe2..822f586d72af 100644 --- a/trunk/drivers/net/bonding/bond_3ad.c +++ b/trunk/drivers/net/bonding/bond_3ad.c @@ -2466,9 +2466,6 @@ int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct net_device *dev, struct pac if (!(dev->flags & IFF_MASTER)) goto out; - if (!pskb_may_pull(skb, sizeof(struct lacpdu))) - goto out; - read_lock(&bond->lock); slave = bond_get_slave_by_dev((struct bonding *)netdev_priv(dev), orig_dev); diff --git a/trunk/drivers/net/bonding/bond_alb.c b/trunk/drivers/net/bonding/bond_alb.c index 26bb118c4533..c746b331771d 100644 --- a/trunk/drivers/net/bonding/bond_alb.c +++ b/trunk/drivers/net/bonding/bond_alb.c @@ -362,9 +362,6 @@ static int rlb_arp_recv(struct sk_buff *skb, struct net_device *bond_dev, struct goto out; } - if (!pskb_may_pull(skb, arp_hdr_len(bond_dev))) - goto out; - if (skb->len < sizeof(struct arp_pkt)) { pr_debug("Packet is too small to be an ARP\n"); goto out; diff --git a/trunk/drivers/net/cxgb3/cxgb3_main.c b/trunk/drivers/net/cxgb3/cxgb3_main.c index f208712c0b90..ad19585d960b 100644 --- a/trunk/drivers/net/cxgb3/cxgb3_main.c +++ b/trunk/drivers/net/cxgb3/cxgb3_main.c @@ -2296,8 +2296,6 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr) case CHELSIO_GET_QSET_NUM:{ struct ch_reg edata; - memset(&edata, 0, sizeof(struct ch_reg)); - edata.cmd = CHELSIO_GET_QSET_NUM; edata.val = pi->nqsets; if (copy_to_user(useraddr, &edata, sizeof(edata))) diff --git a/trunk/drivers/net/e1000e/hw.h b/trunk/drivers/net/e1000e/hw.h index ba302a5c2c30..66ed08f726fb 100644 --- a/trunk/drivers/net/e1000e/hw.h +++ b/trunk/drivers/net/e1000e/hw.h @@ -57,7 +57,6 @@ enum e1e_registers { E1000_SCTL = 0x00024, /* SerDes Control - RW */ E1000_FCAL = 0x00028, /* Flow Control Address Low - RW */ E1000_FCAH = 0x0002C, /* Flow Control Address High -RW */ - E1000_FEXTNVM4 = 0x00024, /* Future Extended NVM 4 - RW */ E1000_FEXTNVM = 0x00028, /* Future Extended NVM - RW */ E1000_FCT = 0x00030, /* Flow Control Type - RW */ E1000_VET = 0x00038, /* VLAN Ether Type - RW */ diff --git a/trunk/drivers/net/e1000e/ich8lan.c b/trunk/drivers/net/e1000e/ich8lan.c index 57b5435599ab..63930d12711c 100644 --- a/trunk/drivers/net/e1000e/ich8lan.c +++ b/trunk/drivers/net/e1000e/ich8lan.c @@ -105,10 +105,6 @@ #define E1000_FEXTNVM_SW_CONFIG 1 #define E1000_FEXTNVM_SW_CONFIG_ICH8M (1 << 27) /* Bit redefined for ICH8M :/ */ -#define E1000_FEXTNVM4_BEACON_DURATION_MASK 0x7 -#define E1000_FEXTNVM4_BEACON_DURATION_8USEC 0x7 -#define E1000_FEXTNVM4_BEACON_DURATION_16USEC 0x3 - #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL #define E1000_ICH_RAR_ENTRIES 7 @@ -129,7 +125,6 @@ /* SMBus Address Phy Register */ #define HV_SMB_ADDR PHY_REG(768, 26) -#define HV_SMB_ADDR_MASK 0x007F #define HV_SMB_ADDR_PEC_EN 0x0200 #define HV_SMB_ADDR_VALID 0x0080 @@ -242,8 +237,6 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw); static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw); static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw); -static s32 e1000_k1_workaround_lv(struct e1000_hw *hw); -static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate); static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) { @@ -279,7 +272,7 @@ static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val) static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) { struct e1000_phy_info *phy = &hw->phy; - u32 ctrl, fwsm; + u32 ctrl; s32 ret_val = 0; phy->addr = 1; @@ -301,8 +294,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) * disabled, then toggle the LANPHYPC Value bit to force * the interconnect to PCIe mode. */ - fwsm = er32(FWSM); - if (!(fwsm & E1000_ICH_FWSM_FW_VALID)) { + if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) { ctrl = er32(CTRL); ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; @@ -311,13 +303,6 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) ctrl &= ~E1000_CTRL_LANPHYPC_OVERRIDE; ew32(CTRL, ctrl); msleep(50); - - /* - * Gate automatic PHY configuration by hardware on - * non-managed 82579 - */ - if (hw->mac.type == e1000_pch2lan) - e1000_gate_hw_phy_config_ich8lan(hw, true); } /* @@ -330,13 +315,6 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) if (ret_val) goto out; - /* Ungate automatic PHY configuration on non-managed 82579 */ - if ((hw->mac.type == e1000_pch2lan) && - !(fwsm & E1000_ICH_FWSM_FW_VALID)) { - msleep(10); - e1000_gate_hw_phy_config_ich8lan(hw, false); - } - phy->id = e1000_phy_unknown; ret_val = e1000e_get_phy_id(hw); if (ret_val) @@ -583,10 +561,13 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_adapter *adapter) if (mac->type == e1000_ich8lan) e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true); - /* Gate automatic PHY configuration by hardware on managed 82579 */ - if ((mac->type == e1000_pch2lan) && - (er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) - e1000_gate_hw_phy_config_ich8lan(hw, true); + /* Disable PHY configuration by hardware, config by software */ + if (mac->type == e1000_pch2lan) { + u32 extcnf_ctrl = er32(EXTCNF_CTRL); + + extcnf_ctrl |= E1000_EXTCNF_CTRL_GATE_PHY_CFG; + ew32(EXTCNF_CTRL, extcnf_ctrl); + } return 0; } @@ -671,12 +652,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) goto out; } - if (hw->mac.type == e1000_pch2lan) { - ret_val = e1000_k1_workaround_lv(hw); - if (ret_val) - goto out; - } - /* * Check if there was DownShift, must be checked * immediately after link-up @@ -919,34 +894,6 @@ static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) return (fwsm & E1000_ICH_FWSM_RSPCIPHY) ? 0 : E1000_BLK_PHY_RESET; } -/** - * e1000_write_smbus_addr - Write SMBus address to PHY needed during Sx states - * @hw: pointer to the HW structure - * - * Assumes semaphore already acquired. - * - **/ -static s32 e1000_write_smbus_addr(struct e1000_hw *hw) -{ - u16 phy_data; - u32 strap = er32(STRAP); - s32 ret_val = 0; - - strap &= E1000_STRAP_SMBUS_ADDRESS_MASK; - - ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data); - if (ret_val) - goto out; - - phy_data &= ~HV_SMB_ADDR_MASK; - phy_data |= (strap >> E1000_STRAP_SMBUS_ADDRESS_SHIFT); - phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; - ret_val = e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data); - -out: - return ret_val; -} - /** * e1000_sw_lcd_config_ich8lan - SW-based LCD Configuration * @hw: pointer to the HW structure @@ -956,6 +903,7 @@ static s32 e1000_write_smbus_addr(struct e1000_hw *hw) **/ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) { + struct e1000_adapter *adapter = hw->adapter; struct e1000_phy_info *phy = &hw->phy; u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask; s32 ret_val = 0; @@ -973,8 +921,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) if (phy->type != e1000_phy_igp_3) return ret_val; - if ((hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) || - (hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_C)) { + if (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) { sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; break; } @@ -1014,16 +961,21 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; - if ((!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && - (hw->mac.type == e1000_pchlan)) || - (hw->mac.type == e1000_pch2lan)) { + if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && + ((hw->mac.type == e1000_pchlan) || + (hw->mac.type == e1000_pch2lan))) { /* * HW configures the SMBus address and LEDs when the * OEM and LCD Write Enable bits are set in the NVM. * When both NVM bits are cleared, SW will configure * them instead. */ - ret_val = e1000_write_smbus_addr(hw); + data = er32(STRAP); + data &= E1000_STRAP_SMBUS_ADDRESS_MASK; + reg_data = data >> E1000_STRAP_SMBUS_ADDRESS_SHIFT; + reg_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; + ret_val = e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, + reg_data); if (ret_val) goto out; @@ -1488,6 +1440,10 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) goto out; /* Enable jumbo frame workaround in the PHY */ + e1e_rphy(hw, PHY_REG(769, 20), &data); + ret_val = e1e_wphy(hw, PHY_REG(769, 20), data & ~(1 << 14)); + if (ret_val) + goto out; e1e_rphy(hw, PHY_REG(769, 23), &data); data &= ~(0x7F << 5); data |= (0x37 << 5); @@ -1496,6 +1452,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) goto out; e1e_rphy(hw, PHY_REG(769, 16), &data); data &= ~(1 << 13); + data |= (1 << 12); ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); if (ret_val) goto out; @@ -1520,7 +1477,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) mac_reg = er32(RCTL); mac_reg &= ~E1000_RCTL_SECRC; - ew32(RCTL, mac_reg); + ew32(FFLT_DBG, mac_reg); ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_CTRL_OFFSET, @@ -1546,12 +1503,17 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) goto out; /* Write PHY register values back to h/w defaults */ + e1e_rphy(hw, PHY_REG(769, 20), &data); + ret_val = e1e_wphy(hw, PHY_REG(769, 20), data & ~(1 << 14)); + if (ret_val) + goto out; e1e_rphy(hw, PHY_REG(769, 23), &data); data &= ~(0x7F << 5); ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); if (ret_val) goto out; e1e_rphy(hw, PHY_REG(769, 16), &data); + data &= ~(1 << 12); data |= (1 << 13); ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); if (ret_val) @@ -1596,69 +1558,6 @@ static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw) return ret_val; } -/** - * e1000_k1_gig_workaround_lv - K1 Si workaround - * @hw: pointer to the HW structure - * - * Workaround to set the K1 beacon duration for 82579 parts - **/ -static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) -{ - s32 ret_val = 0; - u16 status_reg = 0; - u32 mac_reg; - - if (hw->mac.type != e1000_pch2lan) - goto out; - - /* Set K1 beacon duration based on 1Gbps speed or otherwise */ - ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg); - if (ret_val) - goto out; - - if ((status_reg & (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) - == (HV_M_STATUS_LINK_UP | HV_M_STATUS_AUTONEG_COMPLETE)) { - mac_reg = er32(FEXTNVM4); - mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK; - - if (status_reg & HV_M_STATUS_SPEED_1000) - mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC; - else - mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC; - - ew32(FEXTNVM4, mac_reg); - } - -out: - return ret_val; -} - -/** - * e1000_gate_hw_phy_config_ich8lan - disable PHY config via hardware - * @hw: pointer to the HW structure - * @gate: boolean set to true to gate, false to ungate - * - * Gate/ungate the automatic PHY configuration via hardware; perform - * the configuration via software instead. - **/ -static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate) -{ - u32 extcnf_ctrl; - - if (hw->mac.type != e1000_pch2lan) - return; - - extcnf_ctrl = er32(EXTCNF_CTRL); - - if (gate) - extcnf_ctrl |= E1000_EXTCNF_CTRL_GATE_PHY_CFG; - else - extcnf_ctrl &= ~E1000_EXTCNF_CTRL_GATE_PHY_CFG; - - ew32(EXTCNF_CTRL, extcnf_ctrl); - return; -} - /** * e1000_lan_init_done_ich8lan - Check for PHY config completion * @hw: pointer to the HW structure @@ -1703,9 +1602,6 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) if (e1000_check_reset_block(hw)) goto out; - /* Allow time for h/w to get to quiescent state after reset */ - msleep(10); - /* Perform any necessary post-reset workarounds */ switch (hw->mac.type) { case e1000_pchlan: @@ -1734,13 +1630,6 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) /* Configure the LCD with the OEM bits in NVM */ ret_val = e1000_oem_bits_config_ich8lan(hw, true); - /* Ungate automatic PHY configuration on non-managed 82579 */ - if ((hw->mac.type == e1000_pch2lan) && - !(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) { - msleep(10); - e1000_gate_hw_phy_config_ich8lan(hw, false); - } - out: return ret_val; } @@ -1757,11 +1646,6 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) { s32 ret_val = 0; - /* Gate automatic PHY configuration by hardware on non-managed 82579 */ - if ((hw->mac.type == e1000_pch2lan) && - !(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) - e1000_gate_hw_phy_config_ich8lan(hw, true); - ret_val = e1000e_phy_hw_reset_generic(hw); if (ret_val) goto out; @@ -3026,14 +2910,6 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) * external PHY is reset. */ ctrl |= E1000_CTRL_PHY_RST; - - /* - * Gate automatic PHY configuration by hardware on - * non-managed 82579 - */ - if ((hw->mac.type == e1000_pch2lan) && - !(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) - e1000_gate_hw_phy_config_ich8lan(hw, true); } ret_val = e1000_acquire_swflag_ich8lan(hw); e_dbg("Issuing a global reset to ich8lan\n"); @@ -3584,20 +3460,13 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw) void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) { u32 phy_ctrl; - s32 ret_val; phy_ctrl = er32(PHY_CTRL); phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | E1000_PHY_CTRL_GBE_DISABLE; ew32(PHY_CTRL, phy_ctrl); - if (hw->mac.type >= e1000_pchlan) { - e1000_oem_bits_config_ich8lan(hw, true); - ret_val = hw->phy.ops.acquire(hw); - if (ret_val) - return; - e1000_write_smbus_addr(hw); - hw->phy.ops.release(hw); - } + if (hw->mac.type >= e1000_pchlan) + e1000_phy_hw_reset_ich8lan(hw); } /** diff --git a/trunk/drivers/net/e1000e/netdev.c b/trunk/drivers/net/e1000e/netdev.c index e561d15c3eb1..2b8ef44bd2b1 100644 --- a/trunk/drivers/net/e1000e/netdev.c +++ b/trunk/drivers/net/e1000e/netdev.c @@ -2704,16 +2704,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter) u32 psrctl = 0; u32 pages = 0; - /* Workaround Si errata on 82579 - configure jumbo frame flow */ - if (hw->mac.type == e1000_pch2lan) { - s32 ret_val; - - if (adapter->netdev->mtu > ETH_DATA_LEN) - ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); - else - ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); - } - /* Program MC offset vector base */ rctl = er32(RCTL); rctl &= ~(3 << E1000_RCTL_MO_SHIFT); @@ -2754,6 +2744,16 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter) e1e_wphy(hw, 22, phy_data); } + /* Workaround Si errata on 82579 - configure jumbo frame flow */ + if (hw->mac.type == e1000_pch2lan) { + s32 ret_val; + + if (rctl & E1000_RCTL_LPE) + ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true); + else + ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false); + } + /* Setup buffer sizes */ rctl &= ~E1000_RCTL_SZ_4096; rctl |= E1000_RCTL_BSEX; @@ -4833,15 +4833,6 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu) return -EINVAL; } - /* Jumbo frame workaround on 82579 requires CRC be stripped */ - if ((adapter->hw.mac.type == e1000_pch2lan) && - !(adapter->flags2 & FLAG2_CRC_STRIPPING) && - (new_mtu > ETH_DATA_LEN)) { - e_err("Jumbo Frames not supported on 82579 when CRC " - "stripping is disabled.\n"); - return -EINVAL; - } - /* 82573 Errata 17 */ if (((adapter->hw.mac.type == e1000_82573) || (adapter->hw.mac.type == e1000_82574)) && diff --git a/trunk/drivers/net/eql.c b/trunk/drivers/net/eql.c index 0cb1cf9cf4b0..dda2c7944da9 100644 --- a/trunk/drivers/net/eql.c +++ b/trunk/drivers/net/eql.c @@ -555,8 +555,6 @@ static int eql_g_master_cfg(struct net_device *dev, master_config_t __user *mcp) equalizer_t *eql; master_config_t mc; - memset(&mc, 0, sizeof(master_config_t)); - if (eql_is_master(dev)) { eql = netdev_priv(dev); mc.max_slaves = eql->max_slaves; diff --git a/trunk/drivers/net/ibm_newemac/core.c b/trunk/drivers/net/ibm_newemac/core.c index 519e19e23955..3506fd6ad726 100644 --- a/trunk/drivers/net/ibm_newemac/core.c +++ b/trunk/drivers/net/ibm_newemac/core.c @@ -2928,7 +2928,7 @@ static int __devinit emac_probe(struct platform_device *ofdev, if (dev->emac_irq != NO_IRQ) irq_dispose_mapping(dev->emac_irq); err_free: - free_netdev(ndev); + kfree(ndev); err_gone: /* if we were on the bootlist, remove us as we won't show up and * wake up all waiters to notify them in case they were waiting @@ -2971,7 +2971,7 @@ static int __devexit emac_remove(struct platform_device *ofdev) if (dev->emac_irq != NO_IRQ) irq_dispose_mapping(dev->emac_irq); - free_netdev(dev->ndev); + kfree(dev->ndev); return 0; } diff --git a/trunk/drivers/net/netxen/netxen_nic_init.c b/trunk/drivers/net/netxen/netxen_nic_init.c index b075a35b85d4..cabae7bb1fc6 100644 --- a/trunk/drivers/net/netxen/netxen_nic_init.c +++ b/trunk/drivers/net/netxen/netxen_nic_init.c @@ -1540,6 +1540,7 @@ netxen_process_rcv(struct netxen_adapter *adapter, if (pkt_offset) skb_pull(skb, pkt_offset); + skb->truesize = skb->len + sizeof(struct sk_buff); skb->protocol = eth_type_trans(skb, netdev); napi_gro_receive(&sds_ring->napi, skb); @@ -1601,6 +1602,8 @@ netxen_process_lro(struct netxen_adapter *adapter, skb_put(skb, lro_length + data_offset); + skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb); + skb_pull(skb, l2_hdr_offset); skb->protocol = eth_type_trans(skb, netdev); diff --git a/trunk/drivers/net/phy/mdio_bus.c b/trunk/drivers/net/phy/mdio_bus.c index 6c58da2b882c..6a6b8199a0d6 100644 --- a/trunk/drivers/net/phy/mdio_bus.c +++ b/trunk/drivers/net/phy/mdio_bus.c @@ -308,7 +308,7 @@ static int mdio_bus_suspend(struct device *dev) * may call phy routines that try to grab the same lock, and that may * lead to a deadlock. */ - if (phydev->attached_dev && phydev->adjust_link) + if (phydev->attached_dev) phy_stop_machine(phydev); if (!mdio_bus_phy_may_suspend(phydev)) @@ -331,7 +331,7 @@ static int mdio_bus_resume(struct device *dev) return ret; no_resume: - if (phydev->attached_dev && phydev->adjust_link) + if (phydev->attached_dev) phy_start_machine(phydev, NULL); return 0; diff --git a/trunk/drivers/net/ppp_generic.c b/trunk/drivers/net/ppp_generic.c index 736b91703b3e..6695a51e09e9 100644 --- a/trunk/drivers/net/ppp_generic.c +++ b/trunk/drivers/net/ppp_generic.c @@ -1314,13 +1314,8 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) hdrlen = (ppp->flags & SC_MP_XSHORTSEQ)? MPHDRLEN_SSN: MPHDRLEN; i = 0; list_for_each_entry(pch, &ppp->channels, clist) { - if (pch->chan) { - pch->avail = 1; - navail++; - pch->speed = pch->chan->speed; - } else { - pch->avail = 0; - } + navail += pch->avail = (pch->chan != NULL); + pch->speed = pch->chan->speed; if (pch->avail) { if (skb_queue_empty(&pch->file.xq) || !pch->had_frag) { diff --git a/trunk/drivers/net/qlcnic/qlcnic_init.c b/trunk/drivers/net/qlcnic/qlcnic_init.c index 2c7cf0b64811..75ba744b173c 100644 --- a/trunk/drivers/net/qlcnic/qlcnic_init.c +++ b/trunk/drivers/net/qlcnic/qlcnic_init.c @@ -1316,7 +1316,7 @@ qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter, return -ENOMEM; } - skb_reserve(skb, NET_IP_ALIGN); + skb_reserve(skb, 2); dma = pci_map_single(pdev, skb->data, rds_ring->dma_size, PCI_DMA_FROMDEVICE); @@ -1404,6 +1404,7 @@ qlcnic_process_rcv(struct qlcnic_adapter *adapter, if (pkt_offset) skb_pull(skb, pkt_offset); + skb->truesize = skb->len + sizeof(struct sk_buff); skb->protocol = eth_type_trans(skb, netdev); napi_gro_receive(&sds_ring->napi, skb); @@ -1465,6 +1466,8 @@ qlcnic_process_lro(struct qlcnic_adapter *adapter, skb_put(skb, lro_length + data_offset); + skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb); + skb_pull(skb, l2_hdr_offset); skb->protocol = eth_type_trans(skb, netdev); @@ -1697,6 +1700,8 @@ qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter, if (pkt_offset) skb_pull(skb, pkt_offset); + skb->truesize = skb->len + sizeof(struct sk_buff); + if (!qlcnic_check_loopback_buff(skb->data)) adapter->diag_cnt++; diff --git a/trunk/drivers/net/r8169.c b/trunk/drivers/net/r8169.c index a0da4a17b025..078bbf4e6f19 100644 --- a/trunk/drivers/net/r8169.c +++ b/trunk/drivers/net/r8169.c @@ -2934,7 +2934,7 @@ static const struct rtl_cfg_info { .hw_start = rtl_hw_start_8168, .region = 2, .align = 8, - .intr_event = SYSErr | RxFIFOOver | LinkChg | RxOverflow | + .intr_event = SYSErr | LinkChg | RxOverflow | TxErr | TxOK | RxOK | RxErr, .napi_event = TxErr | TxOK | RxOK | RxOverflow, .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI, @@ -4625,7 +4625,8 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) } /* Work around for rx fifo overflow */ - if (unlikely(status & RxFIFOOver)) { + if (unlikely(status & RxFIFOOver) && + (tp->mac_version == RTL_GIGA_MAC_VER_11)) { netif_stop_queue(dev); rtl8169_tx_timeout(dev); break; diff --git a/trunk/drivers/net/rionet.c b/trunk/drivers/net/rionet.c index 44150f2f7bfd..07eb884ff982 100644 --- a/trunk/drivers/net/rionet.c +++ b/trunk/drivers/net/rionet.c @@ -384,7 +384,7 @@ static void rionet_remove(struct rio_dev *rdev) free_pages((unsigned long)rionet_active, rdev->net->hport->sys_size ? __ilog2(sizeof(void *)) + 4 : 0); unregister_netdev(ndev); - free_netdev(ndev); + kfree(ndev); list_for_each_entry_safe(peer, tmp, &rionet_peers, node) { list_del(&peer->node); diff --git a/trunk/drivers/net/sgiseeq.c b/trunk/drivers/net/sgiseeq.c index 9265315baa0b..cc4bd8c65f8b 100644 --- a/trunk/drivers/net/sgiseeq.c +++ b/trunk/drivers/net/sgiseeq.c @@ -804,7 +804,7 @@ static int __devinit sgiseeq_probe(struct platform_device *pdev) err_out_free_page: free_page((unsigned long) sp->srings); err_out_free_dev: - free_netdev(dev); + kfree(dev); err_out: return err; diff --git a/trunk/drivers/net/smsc911x.c b/trunk/drivers/net/smsc911x.c index 8150ba154116..0909ae934ad0 100644 --- a/trunk/drivers/net/smsc911x.c +++ b/trunk/drivers/net/smsc911x.c @@ -58,7 +58,6 @@ MODULE_LICENSE("GPL"); MODULE_VERSION(SMSC_DRV_VERSION); -MODULE_ALIAS("platform:smsc911x"); #if USE_DEBUG > 0 static int debug = 16; diff --git a/trunk/drivers/net/tulip/de2104x.c b/trunk/drivers/net/tulip/de2104x.c index 6888e3d41462..5efa57757a2c 100644 --- a/trunk/drivers/net/tulip/de2104x.c +++ b/trunk/drivers/net/tulip/de2104x.c @@ -243,7 +243,6 @@ enum { NWayState = (1 << 14) | (1 << 13) | (1 << 12), NWayRestart = (1 << 12), NonselPortActive = (1 << 9), - SelPortActive = (1 << 8), LinkFailStatus = (1 << 2), NetCxnErr = (1 << 1), }; @@ -364,9 +363,7 @@ static u16 t21040_csr15[] = { 0, 0, 0x0006, 0x0000, 0x0000, }; /* 21041 transceiver register settings: TP AUTO, BNC, AUI, TP, TP FD*/ static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, }; -static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, }; -/* If on-chip autonegotiation is broken, use half-duplex (FF3F) instead */ -static u16 t21041_csr14_brk[] = { 0xFF3F, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, }; +static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x6F3F, 0x6F3D, }; static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, }; @@ -1067,9 +1064,6 @@ static void de21041_media_timer (unsigned long data) unsigned int carrier; unsigned long flags; - /* clear port active bits */ - dw32(SIAStatus, NonselPortActive | SelPortActive); - carrier = (status & NetCxnErr) ? 0 : 1; if (carrier) { @@ -1164,29 +1158,14 @@ static void de21041_media_timer (unsigned long data) static void de_media_interrupt (struct de_private *de, u32 status) { if (status & LinkPass) { - /* Ignore if current media is AUI or BNC and we can't use TP */ - if ((de->media_type == DE_MEDIA_AUI || - de->media_type == DE_MEDIA_BNC) && - (de->media_lock || - !de_ok_to_advertise(de, DE_MEDIA_TP_AUTO))) - return; - /* If current media is not TP, change it to TP */ - if ((de->media_type == DE_MEDIA_AUI || - de->media_type == DE_MEDIA_BNC)) { - de->media_type = DE_MEDIA_TP_AUTO; - de_stop_rxtx(de); - de_set_media(de); - de_start_rxtx(de); - } de_link_up(de); mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK); return; } BUG_ON(!(status & LinkFail)); - /* Mark the link as down only if current media is TP */ - if (netif_carrier_ok(de->dev) && de->media_type != DE_MEDIA_AUI && - de->media_type != DE_MEDIA_BNC) { + + if (netif_carrier_ok(de->dev)) { de_link_down(de); mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK); } @@ -1250,7 +1229,6 @@ static void de_adapter_sleep (struct de_private *de) if (de->de21040) return; - dw32(CSR13, 0); /* Reset phy */ pci_read_config_dword(de->pdev, PCIPM, &pmctl); pmctl |= PM_Sleep; pci_write_config_dword(de->pdev, PCIPM, pmctl); @@ -1596,15 +1574,12 @@ static int __de_set_settings(struct de_private *de, struct ethtool_cmd *ecmd) return 0; /* nothing to change */ de_link_down(de); - mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK); de_stop_rxtx(de); de->media_type = new_media; de->media_lock = media_lock; de->media_advertise = ecmd->advertising; de_set_media(de); - if (netif_running(de->dev)) - de_start_rxtx(de); return 0; } @@ -1936,14 +1911,8 @@ static void __devinit de21041_get_srom_info (struct de_private *de) for (i = 0; i < DE_MAX_MEDIA; i++) { if (de->media[i].csr13 == 0xffff) de->media[i].csr13 = t21041_csr13[i]; - if (de->media[i].csr14 == 0xffff) { - /* autonegotiation is broken at least on some chip - revisions - rev. 0x21 works, 0x11 does not */ - if (de->pdev->revision < 0x20) - de->media[i].csr14 = t21041_csr14_brk[i]; - else - de->media[i].csr14 = t21041_csr14[i]; - } + if (de->media[i].csr14 == 0xffff) + de->media[i].csr14 = t21041_csr14[i]; if (de->media[i].csr15 == 0xffff) de->media[i].csr15 = t21041_csr15[i]; } @@ -2189,8 +2158,6 @@ static int de_resume (struct pci_dev *pdev) dev_err(&dev->dev, "pci_enable_device failed in resume\n"); goto out; } - pci_set_master(pdev); - de_init_rings(de); de_init_hw(de); out_attach: netif_device_attach(dev); diff --git a/trunk/drivers/net/usb/hso.c b/trunk/drivers/net/usb/hso.c index 1cd752f9a6e1..6efca66b8766 100644 --- a/trunk/drivers/net/usb/hso.c +++ b/trunk/drivers/net/usb/hso.c @@ -1652,8 +1652,6 @@ static int hso_get_count(struct hso_serial *serial, struct uart_icount cnow; struct hso_tiocmget *tiocmget = serial->tiocmget; - memset(&icount, 0, sizeof(struct serial_icounter_struct)); - if (!tiocmget) return -ENOENT; spin_lock_irq(&serial->serial_lock); diff --git a/trunk/drivers/net/wireless/iwlwifi/iwl-core.c b/trunk/drivers/net/wireless/iwlwifi/iwl-core.c index e23c4060a0f0..07dbc2796448 100644 --- a/trunk/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/trunk/drivers/net/wireless/iwlwifi/iwl-core.c @@ -2613,11 +2613,6 @@ int iwl_force_reset(struct iwl_priv *priv, int mode, bool external) if (test_bit(STATUS_EXIT_PENDING, &priv->status)) return -EINVAL; - if (test_bit(STATUS_SCANNING, &priv->status)) { - IWL_DEBUG_INFO(priv, "scan in progress.\n"); - return -EINVAL; - } - if (mode >= IWL_MAX_FORCE_RESET) { IWL_DEBUG_INFO(priv, "invalid reset request.\n"); return -EINVAL; diff --git a/trunk/drivers/pci/intel-iommu.c b/trunk/drivers/pci/intel-iommu.c index 4789f8e8bf7a..c3ceebb5be84 100644 --- a/trunk/drivers/pci/intel-iommu.c +++ b/trunk/drivers/pci/intel-iommu.c @@ -71,49 +71,6 @@ #define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) #define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64)) -/* page table handling */ -#define LEVEL_STRIDE (9) -#define LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1) - -static inline int agaw_to_level(int agaw) -{ - return agaw + 2; -} - -static inline int agaw_to_width(int agaw) -{ - return 30 + agaw * LEVEL_STRIDE; -} - -static inline int width_to_agaw(int width) -{ - return (width - 30) / LEVEL_STRIDE; -} - -static inline unsigned int level_to_offset_bits(int level) -{ - return (level - 1) * LEVEL_STRIDE; -} - -static inline int pfn_level_offset(unsigned long pfn, int level) -{ - return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK; -} - -static inline unsigned long level_mask(int level) -{ - return -1UL << level_to_offset_bits(level); -} - -static inline unsigned long level_size(int level) -{ - return 1UL << level_to_offset_bits(level); -} - -static inline unsigned long align_to_level(unsigned long pfn, int level) -{ - return (pfn + level_size(level) - 1) & level_mask(level); -} /* VT-d pages must always be _smaller_ than MM pages. Otherwise things are never going to work. */ @@ -477,6 +434,8 @@ void free_iova_mem(struct iova *iova) } +static inline int width_to_agaw(int width); + static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw) { unsigned long sagaw; @@ -687,6 +646,51 @@ static void free_context_table(struct intel_iommu *iommu) spin_unlock_irqrestore(&iommu->lock, flags); } +/* page table handling */ +#define LEVEL_STRIDE (9) +#define LEVEL_MASK (((u64)1 << LEVEL_STRIDE) - 1) + +static inline int agaw_to_level(int agaw) +{ + return agaw + 2; +} + +static inline int agaw_to_width(int agaw) +{ + return 30 + agaw * LEVEL_STRIDE; + +} + +static inline int width_to_agaw(int width) +{ + return (width - 30) / LEVEL_STRIDE; +} + +static inline unsigned int level_to_offset_bits(int level) +{ + return (level - 1) * LEVEL_STRIDE; +} + +static inline int pfn_level_offset(unsigned long pfn, int level) +{ + return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK; +} + +static inline unsigned long level_mask(int level) +{ + return -1UL << level_to_offset_bits(level); +} + +static inline unsigned long level_size(int level) +{ + return 1UL << level_to_offset_bits(level); +} + +static inline unsigned long align_to_level(unsigned long pfn, int level) +{ + return (pfn + level_size(level) - 1) & level_mask(level); +} + static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, unsigned long pfn) { @@ -3757,33 +3761,6 @@ static void __devinit quirk_iommu_rwbf(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); -#define GGC 0x52 -#define GGC_MEMORY_SIZE_MASK (0xf << 8) -#define GGC_MEMORY_SIZE_NONE (0x0 << 8) -#define GGC_MEMORY_SIZE_1M (0x1 << 8) -#define GGC_MEMORY_SIZE_2M (0x3 << 8) -#define GGC_MEMORY_VT_ENABLED (0x8 << 8) -#define GGC_MEMORY_SIZE_2M_VT (0x9 << 8) -#define GGC_MEMORY_SIZE_3M_VT (0xa << 8) -#define GGC_MEMORY_SIZE_4M_VT (0xb << 8) - -static void __devinit quirk_calpella_no_shadow_gtt(struct pci_dev *dev) -{ - unsigned short ggc; - - if (pci_read_config_word(dev, GGC, &ggc)) - return; - - if (!(ggc & GGC_MEMORY_VT_ENABLED)) { - printk(KERN_INFO "DMAR: BIOS has allocated no shadow GTT; disabling IOMMU for graphics\n"); - dmar_map_gfx = 0; - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040, quirk_calpella_no_shadow_gtt); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_gtt); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0062, quirk_calpella_no_shadow_gtt); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x006a, quirk_calpella_no_shadow_gtt); - /* On Tylersburg chipsets, some BIOSes have been known to enable the ISOCH DMAR unit for the Azalia sound device, but not give it any TLB entries, which causes it to deadlock. Check for that. We do diff --git a/trunk/drivers/pci/iov.c b/trunk/drivers/pci/iov.c index 553d8ee55c1c..ce6a3666b3d9 100644 --- a/trunk/drivers/pci/iov.c +++ b/trunk/drivers/pci/iov.c @@ -608,7 +608,7 @@ int pci_iov_resource_bar(struct pci_dev *dev, int resno, * the VF BAR size multiplied by the number of VFs. The alignment * is just the VF BAR size. */ -resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) +int pci_sriov_resource_alignment(struct pci_dev *dev, int resno) { struct resource tmp; enum pci_bar_type type; diff --git a/trunk/drivers/pci/pci.h b/trunk/drivers/pci/pci.h index 6beb11b617a9..7754a678ab15 100644 --- a/trunk/drivers/pci/pci.h +++ b/trunk/drivers/pci/pci.h @@ -264,8 +264,7 @@ extern int pci_iov_init(struct pci_dev *dev); extern void pci_iov_release(struct pci_dev *dev); extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type); -extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, - int resno); +extern int pci_sriov_resource_alignment(struct pci_dev *dev, int resno); extern void pci_restore_iov_state(struct pci_dev *dev); extern int pci_iov_bus_range(struct pci_bus *bus); @@ -321,7 +320,7 @@ static inline int pci_ats_enabled(struct pci_dev *dev) } #endif /* CONFIG_PCI_IOV */ -static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, +static inline int pci_resource_alignment(struct pci_dev *dev, struct resource *res) { #ifdef CONFIG_PCI_IOV diff --git a/trunk/drivers/pcmcia/pcmcia_resource.c b/trunk/drivers/pcmcia/pcmcia_resource.c index 9ba4dade69a4..a5c176598d95 100644 --- a/trunk/drivers/pcmcia/pcmcia_resource.c +++ b/trunk/drivers/pcmcia/pcmcia_resource.c @@ -595,13 +595,7 @@ int pcmcia_request_io(struct pcmcia_device *p_dev) if (c->io[1].end) { ret = alloc_io_space(s, &c->io[1], p_dev->io_lines); if (ret) { - struct resource tmp = c->io[0]; - /* release the previously allocated resource */ release_io_space(s, &c->io[0]); - /* but preserve the settings, for they worked... */ - c->io[0].end = resource_size(&tmp); - c->io[0].start = tmp.start; - c->io[0].flags = tmp.flags; goto out; } } else diff --git a/trunk/drivers/pcmcia/pd6729.c b/trunk/drivers/pcmcia/pd6729.c index deef6656ab7b..b8a869af0f44 100644 --- a/trunk/drivers/pcmcia/pd6729.c +++ b/trunk/drivers/pcmcia/pd6729.c @@ -646,7 +646,7 @@ static int __devinit pd6729_pci_probe(struct pci_dev *dev, if (!pci_resource_start(dev, 0)) { dev_warn(&dev->dev, "refusing to load the driver as the " "io_base is NULL.\n"); - goto err_out_disable; + goto err_out_free_mem; } dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " diff --git a/trunk/drivers/platform/x86/thinkpad_acpi.c b/trunk/drivers/platform/x86/thinkpad_acpi.c index 2d61186ad5a2..e35ed128bdef 100644 --- a/trunk/drivers/platform/x86/thinkpad_acpi.c +++ b/trunk/drivers/platform/x86/thinkpad_acpi.c @@ -3093,8 +3093,7 @@ static const struct tpacpi_quirk tpacpi_hotkey_qtable[] __initconst = { TPACPI_Q_IBM('1', 'D', TPACPI_HK_Q_INIMASK), /* X22, X23, X24 */ }; -typedef u16 tpacpi_keymap_entry_t; -typedef tpacpi_keymap_entry_t tpacpi_keymap_t[TPACPI_HOTKEY_MAP_LEN]; +typedef u16 tpacpi_keymap_t[TPACPI_HOTKEY_MAP_LEN]; static int __init hotkey_init(struct ibm_init_struct *iibm) { @@ -3231,7 +3230,7 @@ static int __init hotkey_init(struct ibm_init_struct *iibm) }; #define TPACPI_HOTKEY_MAP_SIZE sizeof(tpacpi_keymap_t) -#define TPACPI_HOTKEY_MAP_TYPESIZE sizeof(tpacpi_keymap_entry_t) +#define TPACPI_HOTKEY_MAP_TYPESIZE sizeof(tpacpi_keymap_t[0]) int res, i; int status; diff --git a/trunk/drivers/rtc/rtc-ab3100.c b/trunk/drivers/rtc/rtc-ab3100.c index 261a07e0fb24..d26780ea254b 100644 --- a/trunk/drivers/rtc/rtc-ab3100.c +++ b/trunk/drivers/rtc/rtc-ab3100.c @@ -235,7 +235,6 @@ static int __init ab3100_rtc_probe(struct platform_device *pdev) err = PTR_ERR(rtc); return err; } - platform_set_drvdata(pdev, rtc); return 0; } @@ -245,7 +244,6 @@ static int __exit ab3100_rtc_remove(struct platform_device *pdev) struct rtc_device *rtc = platform_get_drvdata(pdev); rtc_device_unregister(rtc); - platform_set_drvdata(pdev, NULL); return 0; } diff --git a/trunk/drivers/rtc/rtc-s3c.c b/trunk/drivers/rtc/rtc-s3c.c index f57a87f4ae96..a0d3ec89d412 100644 --- a/trunk/drivers/rtc/rtc-s3c.c +++ b/trunk/drivers/rtc/rtc-s3c.c @@ -310,6 +310,11 @@ static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) s3c_rtc_setaie(alrm->enabled); + if (alrm->enabled) + enable_irq_wake(s3c_rtc_alarmno); + else + disable_irq_wake(s3c_rtc_alarmno); + return 0; } @@ -582,10 +587,6 @@ static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) ticnt_en_save &= S3C64XX_RTCCON_TICEN; } s3c_rtc_enable(pdev, 0); - - if (device_may_wakeup(&pdev->dev)) - enable_irq_wake(s3c_rtc_alarmno); - return 0; } @@ -599,10 +600,6 @@ static int s3c_rtc_resume(struct platform_device *pdev) tmp = readb(s3c_rtc_base + S3C2410_RTCCON); writeb(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); } - - if (device_may_wakeup(&pdev->dev)) - disable_irq_wake(s3c_rtc_alarmno); - return 0; } #else diff --git a/trunk/drivers/s390/net/ctcm_main.c b/trunk/drivers/s390/net/ctcm_main.c index 2c7d2d9be4d0..6edf20b62de5 100644 --- a/trunk/drivers/s390/net/ctcm_main.c +++ b/trunk/drivers/s390/net/ctcm_main.c @@ -1154,7 +1154,7 @@ static struct net_device *ctcm_init_netdevice(struct ctcm_priv *priv) dev_fsm, dev_fsm_len, GFP_KERNEL); if (priv->fsm == NULL) { CTCMY_DBF_DEV(SETUP, dev, "init_fsm error"); - free_netdev(dev); + kfree(dev); return NULL; } fsm_newstate(priv->fsm, DEV_STATE_STOPPED); @@ -1165,7 +1165,7 @@ static struct net_device *ctcm_init_netdevice(struct ctcm_priv *priv) grp = ctcmpc_init_mpc_group(priv); if (grp == NULL) { MPC_DBF_DEV(SETUP, dev, "init_mpc_group error"); - free_netdev(dev); + kfree(dev); return NULL; } tasklet_init(&grp->mpc_tasklet2, diff --git a/trunk/drivers/serial/amba-pl010.c b/trunk/drivers/serial/amba-pl010.c index 2904aa044126..50441ffe8e38 100644 --- a/trunk/drivers/serial/amba-pl010.c +++ b/trunk/drivers/serial/amba-pl010.c @@ -472,9 +472,14 @@ pl010_set_termios(struct uart_port *port, struct ktermios *termios, spin_unlock_irqrestore(&uap->port.lock, flags); } -static void pl010_set_ldisc(struct uart_port *port, int new) +static void pl010_set_ldisc(struct uart_port *port) { - if (new == N_PPS) { + int line = port->line; + + if (line >= port->state->port.tty->driver->num) + return; + + if (port->state->port.tty->ldisc->ops->num == N_PPS) { port->flags |= UPF_HARDPPS_CD; pl010_enable_ms(port); } else diff --git a/trunk/drivers/serial/mfd.c b/trunk/drivers/serial/mfd.c index 324c385a653d..bc9af503907f 100644 --- a/trunk/drivers/serial/mfd.c +++ b/trunk/drivers/serial/mfd.c @@ -1423,6 +1423,7 @@ static void hsu_global_init(void) } phsu = hsu; + hsu_debugfs_init(hsu); return; @@ -1434,20 +1435,18 @@ static void hsu_global_init(void) static void serial_hsu_remove(struct pci_dev *pdev) { - void *priv = pci_get_drvdata(pdev); - struct uart_hsu_port *up; + struct hsu_port *hsu; + int i; - if (!priv) + hsu = pci_get_drvdata(pdev); + if (!hsu) return; - /* For port 0/1/2, priv is the address of uart_hsu_port */ - if (pdev->device != 0x081E) { - up = priv; - uart_remove_one_port(&serial_hsu_reg, &up->port); - } + for (i = 0; i < 3; i++) + uart_remove_one_port(&serial_hsu_reg, &hsu->port[i].port); pci_set_drvdata(pdev, NULL); - free_irq(pdev->irq, priv); + free_irq(hsu->irq, hsu); pci_disable_device(pdev); } diff --git a/trunk/drivers/staging/batman-adv/hard-interface.c b/trunk/drivers/staging/batman-adv/hard-interface.c index 6e973a79aa25..baa8b05b9e8d 100644 --- a/trunk/drivers/staging/batman-adv/hard-interface.c +++ b/trunk/drivers/staging/batman-adv/hard-interface.c @@ -30,6 +30,7 @@ #include "hash.h" #include +#include #define MIN(x, y) ((x) < (y) ? (x) : (y)) @@ -430,6 +431,11 @@ static int hard_if_event(struct notifier_block *this, return NOTIFY_DONE; } +static int batman_skb_recv_finish(struct sk_buff *skb) +{ + return NF_ACCEPT; +} + /* receive a packet with the batman ethertype coming on a hard * interface */ int batman_skb_recv(struct sk_buff *skb, struct net_device *dev, @@ -450,6 +456,13 @@ int batman_skb_recv(struct sk_buff *skb, struct net_device *dev, if (atomic_read(&module_state) != MODULE_ACTIVE) goto err_free; + /* if netfilter/ebtables wants to block incoming batman + * packets then give them a chance to do so here */ + ret = NF_HOOK(PF_BRIDGE, NF_BR_LOCAL_IN, skb, dev, NULL, + batman_skb_recv_finish); + if (ret != 1) + goto err_out; + /* packet should hold at least type and version */ if (unlikely(skb_headlen(skb) < 2)) goto err_free; diff --git a/trunk/drivers/staging/batman-adv/send.c b/trunk/drivers/staging/batman-adv/send.c index da3c82e47bbd..055edee7b4e4 100644 --- a/trunk/drivers/staging/batman-adv/send.c +++ b/trunk/drivers/staging/batman-adv/send.c @@ -29,6 +29,7 @@ #include "vis.h" #include "aggregation.h" +#include static void send_outstanding_bcast_packet(struct work_struct *work); @@ -91,9 +92,12 @@ int send_skb_packet(struct sk_buff *skb, /* dev_queue_xmit() returns a negative result on error. However on * congestion and traffic shaping, it drops and returns NET_XMIT_DROP - * (which is > 0). This will not be treated as an error. */ + * (which is > 0). This will not be treated as an error. + * Also, if netfilter/ebtables wants to block outgoing batman + * packets then giving them a chance to do so here */ - return dev_queue_xmit(skb); + return NF_HOOK(PF_BRIDGE, NF_BR_LOCAL_OUT, skb, NULL, skb->dev, + dev_queue_xmit); send_skb_err: kfree_skb(skb); return NET_XMIT_DROP; diff --git a/trunk/drivers/staging/ti-st/st.h b/trunk/drivers/staging/ti-st/st.h index 1b3060eb2921..9952579425b9 100644 --- a/trunk/drivers/staging/ti-st/st.h +++ b/trunk/drivers/staging/ti-st/st.h @@ -80,4 +80,5 @@ struct st_proto_s { extern long st_register(struct st_proto_s *); extern long st_unregister(enum proto_type); +extern struct platform_device *st_get_plat_device(void); #endif /* ST_H */ diff --git a/trunk/drivers/staging/ti-st/st_core.c b/trunk/drivers/staging/ti-st/st_core.c index b85d8bfdf600..063c9b1db1ab 100644 --- a/trunk/drivers/staging/ti-st/st_core.c +++ b/trunk/drivers/staging/ti-st/st_core.c @@ -38,6 +38,7 @@ #include "st_ll.h" #include "st.h" +#define VERBOSE /* strings to be used for rfkill entries and by * ST Core to be used for sysfs debug entry */ @@ -580,7 +581,7 @@ long st_register(struct st_proto_s *new_proto) long err = 0; unsigned long flags = 0; - st_kim_ref(&st_gdata, 0); + st_kim_ref(&st_gdata); pr_info("%s(%d) ", __func__, new_proto->type); if (st_gdata == NULL || new_proto == NULL || new_proto->recv == NULL || new_proto->reg_complete_cb == NULL) { @@ -712,7 +713,7 @@ long st_unregister(enum proto_type type) pr_debug("%s: %d ", __func__, type); - st_kim_ref(&st_gdata, 0); + st_kim_ref(&st_gdata); if (type < ST_BT || type >= ST_MAX) { pr_err(" protocol %d not supported", type); return -EPROTONOSUPPORT; @@ -766,7 +767,7 @@ long st_write(struct sk_buff *skb) #endif long len; - st_kim_ref(&st_gdata, 0); + st_kim_ref(&st_gdata); if (unlikely(skb == NULL || st_gdata == NULL || st_gdata->tty == NULL)) { pr_err("data/tty unavailable to perform write"); @@ -817,7 +818,7 @@ static int st_tty_open(struct tty_struct *tty) struct st_data_s *st_gdata; pr_info("%s ", __func__); - st_kim_ref(&st_gdata, 0); + st_kim_ref(&st_gdata); st_gdata->tty = tty; tty->disc_data = st_gdata; diff --git a/trunk/drivers/staging/ti-st/st_core.h b/trunk/drivers/staging/ti-st/st_core.h index 8601320a679e..e0c32d149f5f 100644 --- a/trunk/drivers/staging/ti-st/st_core.h +++ b/trunk/drivers/staging/ti-st/st_core.h @@ -117,7 +117,7 @@ int st_core_init(struct st_data_s **); void st_core_exit(struct st_data_s *); /* ask for reference from KIM */ -void st_kim_ref(struct st_data_s **, int); +void st_kim_ref(struct st_data_s **); #define GPS_STUB_TEST #ifdef GPS_STUB_TEST diff --git a/trunk/drivers/staging/ti-st/st_kim.c b/trunk/drivers/staging/ti-st/st_kim.c index 9e99463f76e8..b4a6c7fdc4e6 100644 --- a/trunk/drivers/staging/ti-st/st_kim.c +++ b/trunk/drivers/staging/ti-st/st_kim.c @@ -72,25 +72,10 @@ const unsigned char *protocol_names[] = { PROTO_ENTRY(ST_GPS, "GPS"), }; -#define MAX_ST_DEVICES 3 /* Imagine 1 on each UART for now */ -struct platform_device *st_kim_devices[MAX_ST_DEVICES]; /**********************************************************************/ /* internal functions */ -/** - * st_get_plat_device - - * function which returns the reference to the platform device - * requested by id. As of now only 1 such device exists (id=0) - * the context requesting for reference can get the id to be - * requested by a. The protocol driver which is registering or - * b. the tty device which is opened. - */ -static struct platform_device *st_get_plat_device(int id) -{ - return st_kim_devices[id]; -} - /** * validate_firmware_response - * function to return whether the firmware response was proper @@ -368,7 +353,7 @@ void st_kim_chip_toggle(enum proto_type type, enum kim_gpio_state state) struct kim_data_s *kim_gdata; pr_info(" %s ", __func__); - kim_pdev = st_get_plat_device(0); + kim_pdev = st_get_plat_device(); kim_gdata = dev_get_drvdata(&kim_pdev->dev); if (kim_gdata->gpios[type] == -1) { @@ -589,12 +574,12 @@ static int kim_toggle_radio(void *data, bool blocked) * This would enable multiple such platform devices to exist * on a given platform */ -void st_kim_ref(struct st_data_s **core_data, int id) +void st_kim_ref(struct st_data_s **core_data) { struct platform_device *pdev; struct kim_data_s *kim_gdata; /* get kim_gdata reference from platform device */ - pdev = st_get_plat_device(id); + pdev = st_get_plat_device(); kim_gdata = dev_get_drvdata(&pdev->dev); *core_data = kim_gdata->core_data; } @@ -638,7 +623,6 @@ static int kim_probe(struct platform_device *pdev) long *gpios = pdev->dev.platform_data; struct kim_data_s *kim_gdata; - st_kim_devices[pdev->id] = pdev; kim_gdata = kzalloc(sizeof(struct kim_data_s), GFP_ATOMIC); if (!kim_gdata) { pr_err("no mem to allocate"); diff --git a/trunk/drivers/staging/vt6655/wpactl.c b/trunk/drivers/staging/vt6655/wpactl.c index 4bdb8362de82..0142338bcafe 100644 --- a/trunk/drivers/staging/vt6655/wpactl.c +++ b/trunk/drivers/staging/vt6655/wpactl.c @@ -766,14 +766,9 @@ static int wpa_set_associate(PSDevice pDevice, DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "wpa_ie_len = %d\n", param->u.wpa_associate.wpa_ie_len); - if (param->u.wpa_associate.wpa_ie_len) { - if (!param->u.wpa_associate.wpa_ie) - return -EINVAL; - if (param->u.wpa_associate.wpa_ie_len > sizeof(abyWPAIE)) - return -EINVAL; - if (copy_from_user(&abyWPAIE[0], param->u.wpa_associate.wpa_ie, param->u.wpa_associate.wpa_ie_len)) - return -EFAULT; - } + if (param->u.wpa_associate.wpa_ie && + copy_from_user(&abyWPAIE[0], param->u.wpa_associate.wpa_ie, param->u.wpa_associate.wpa_ie_len)) + return -EINVAL; if (param->u.wpa_associate.mode == 1) pMgmt->eConfigMode = WMAC_CONFIG_IBSS_STA; diff --git a/trunk/drivers/usb/core/Kconfig b/trunk/drivers/usb/core/Kconfig index 9eed5b52d9de..7e594449600e 100644 --- a/trunk/drivers/usb/core/Kconfig +++ b/trunk/drivers/usb/core/Kconfig @@ -91,12 +91,12 @@ config USB_DYNAMIC_MINORS If you are unsure about this, say N here. config USB_SUSPEND - bool "USB runtime power management (autosuspend) and wakeup" + bool "USB runtime power management (suspend/resume and wakeup)" depends on USB && PM_RUNTIME help If you say Y here, you can use driver calls or the sysfs - "power/control" file to enable or disable autosuspend for - individual USB peripherals (see + "power/level" file to suspend or resume individual USB + peripherals and to enable or disable autosuspend (see Documentation/usb/power-management.txt for more details). Also, USB "remote wakeup" signaling is supported, whereby some diff --git a/trunk/drivers/usb/core/file.c b/trunk/drivers/usb/core/file.c index 1e6ccef2cf0c..f06f5dbc8cdc 100644 --- a/trunk/drivers/usb/core/file.c +++ b/trunk/drivers/usb/core/file.c @@ -159,9 +159,9 @@ void usb_major_cleanup(void) int usb_register_dev(struct usb_interface *intf, struct usb_class_driver *class_driver) { - int retval; + int retval = -EINVAL; int minor_base = class_driver->minor_base; - int minor; + int minor = 0; char name[20]; char *temp; @@ -173,17 +173,12 @@ int usb_register_dev(struct usb_interface *intf, */ minor_base = 0; #endif + intf->minor = -1; - if (class_driver->fops == NULL) - return -EINVAL; - if (intf->minor >= 0) - return -EADDRINUSE; - - retval = init_usb_class(); - if (retval) - return retval; + dbg ("looking for a minor, starting at %d", minor_base); - dev_dbg(&intf->dev, "looking for a minor, starting at %d", minor_base); + if (class_driver->fops == NULL) + goto exit; down_write(&minor_rwsem); for (minor = minor_base; minor < MAX_USB_MINORS; ++minor) { @@ -191,12 +186,20 @@ int usb_register_dev(struct usb_interface *intf, continue; usb_minors[minor] = class_driver->fops; - intf->minor = minor; + + retval = 0; break; } up_write(&minor_rwsem); - if (intf->minor < 0) - return -EXFULL; + + if (retval) + goto exit; + + retval = init_usb_class(); + if (retval) + goto exit; + + intf->minor = minor; /* create a usb class device for this usb interface */ snprintf(name, sizeof(name), class_driver->name, minor - minor_base); @@ -210,11 +213,11 @@ int usb_register_dev(struct usb_interface *intf, "%s", temp); if (IS_ERR(intf->usb_dev)) { down_write(&minor_rwsem); - usb_minors[minor] = NULL; - intf->minor = -1; + usb_minors[intf->minor] = NULL; up_write(&minor_rwsem); retval = PTR_ERR(intf->usb_dev); } +exit: return retval; } EXPORT_SYMBOL_GPL(usb_register_dev); diff --git a/trunk/drivers/usb/core/message.c b/trunk/drivers/usb/core/message.c index 9f0ce7de0e36..844683e50383 100644 --- a/trunk/drivers/usb/core/message.c +++ b/trunk/drivers/usb/core/message.c @@ -1802,7 +1802,6 @@ int usb_set_configuration(struct usb_device *dev, int configuration) intf->dev.groups = usb_interface_groups; intf->dev.dma_mask = dev->dev.dma_mask; INIT_WORK(&intf->reset_ws, __usb_queue_reset_device); - intf->minor = -1; device_initialize(&intf->dev); dev_set_name(&intf->dev, "%d-%s:%d.%d", dev->bus->busnum, dev->devpath, diff --git a/trunk/drivers/usb/host/ehci-pci.c b/trunk/drivers/usb/host/ehci-pci.c index a1e8d273103f..58b72d741d93 100644 --- a/trunk/drivers/usb/host/ehci-pci.c +++ b/trunk/drivers/usb/host/ehci-pci.c @@ -119,11 +119,6 @@ static int ehci_pci_setup(struct usb_hcd *hcd) ehci->broken_periodic = 1; ehci_info(ehci, "using broken periodic workaround\n"); } - if (pdev->device == 0x0806 || pdev->device == 0x0811 - || pdev->device == 0x0829) { - ehci_info(ehci, "disable lpm for langwell/penwell\n"); - ehci->has_lpm = 0; - } break; case PCI_VENDOR_ID_TDI: if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { diff --git a/trunk/drivers/usb/musb/cppi_dma.c b/trunk/drivers/usb/musb/cppi_dma.c index 5ab5bb89bae3..59dc3d351b60 100644 --- a/trunk/drivers/usb/musb/cppi_dma.c +++ b/trunk/drivers/usb/musb/cppi_dma.c @@ -322,7 +322,6 @@ cppi_channel_allocate(struct dma_controller *c, index, transmit ? 'T' : 'R', cppi_ch); cppi_ch->hw_ep = ep; cppi_ch->channel.status = MUSB_DMA_STATUS_FREE; - cppi_ch->channel.max_len = 0x7fffffff; DBG(4, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R'); return &cppi_ch->channel; diff --git a/trunk/drivers/usb/musb/musb_debugfs.c b/trunk/drivers/usb/musb/musb_debugfs.c index 9e8639d4e862..c79a5e30d437 100644 --- a/trunk/drivers/usb/musb/musb_debugfs.c +++ b/trunk/drivers/usb/musb/musb_debugfs.c @@ -195,14 +195,15 @@ static const struct file_operations musb_regdump_fops = { static int musb_test_mode_open(struct inode *inode, struct file *file) { + file->private_data = inode->i_private; + return single_open(file, musb_test_mode_show, inode->i_private); } static ssize_t musb_test_mode_write(struct file *file, const char __user *ubuf, size_t count, loff_t *ppos) { - struct seq_file *s = file->private_data; - struct musb *musb = s->private; + struct musb *musb = file->private_data; u8 test = 0; char buf[18]; diff --git a/trunk/drivers/usb/musb/musb_gadget.c b/trunk/drivers/usb/musb/musb_gadget.c index d065e23f123e..6fca870e957e 100644 --- a/trunk/drivers/usb/musb/musb_gadget.c +++ b/trunk/drivers/usb/musb/musb_gadget.c @@ -300,11 +300,6 @@ static void txstate(struct musb *musb, struct musb_request *req) #ifndef CONFIG_MUSB_PIO_ONLY if (is_dma_capable() && musb_ep->dma) { struct dma_controller *c = musb->dma_controller; - size_t request_size; - - /* setup DMA, then program endpoint CSR */ - request_size = min_t(size_t, request->length - request->actual, - musb_ep->dma->max_len); use_dma = (request->dma != DMA_ADDR_INVALID); @@ -312,6 +307,11 @@ static void txstate(struct musb *musb, struct musb_request *req) #ifdef CONFIG_USB_INVENTRA_DMA { + size_t request_size; + + /* setup DMA, then program endpoint CSR */ + request_size = min_t(size_t, request->length, + musb_ep->dma->max_len); if (request_size < musb_ep->packet_sz) musb_ep->dma->desired_mode = 0; else @@ -373,8 +373,8 @@ static void txstate(struct musb *musb, struct musb_request *req) use_dma = use_dma && c->channel_program( musb_ep->dma, musb_ep->packet_sz, 0, - request->dma + request->actual, - request_size); + request->dma, + request->length); if (!use_dma) { c->channel_release(musb_ep->dma); musb_ep->dma = NULL; @@ -386,8 +386,8 @@ static void txstate(struct musb *musb, struct musb_request *req) use_dma = use_dma && c->channel_program( musb_ep->dma, musb_ep->packet_sz, request->zero, - request->dma + request->actual, - request_size); + request->dma, + request->length); #endif } #endif @@ -501,14 +501,26 @@ void musb_g_tx(struct musb *musb, u8 epnum) request->zero = 0; } - if (request->actual == request->length) { - musb_g_giveback(musb_ep, request, 0); - request = musb_ep->desc ? next_request(musb_ep) : NULL; - if (!request) { - DBG(4, "%s idle now\n", - musb_ep->end_point.name); - return; - } + /* ... or if not, then complete it. */ + musb_g_giveback(musb_ep, request, 0); + + /* + * Kickstart next transfer if appropriate; + * the packet that just completed might not + * be transmitted for hours or days. + * REVISIT for double buffering... + * FIXME revisit for stalls too... + */ + musb_ep_select(mbase, epnum); + csr = musb_readw(epio, MUSB_TXCSR); + if (csr & MUSB_TXCSR_FIFONOTEMPTY) + return; + + request = musb_ep->desc ? next_request(musb_ep) : NULL; + if (!request) { + DBG(4, "%s idle now\n", + musb_ep->end_point.name); + return; } } @@ -556,19 +568,11 @@ static void rxstate(struct musb *musb, struct musb_request *req) { const u8 epnum = req->epnum; struct usb_request *request = &req->request; - struct musb_ep *musb_ep; + struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out; void __iomem *epio = musb->endpoints[epnum].regs; unsigned fifo_count = 0; - u16 len; + u16 len = musb_ep->packet_sz; u16 csr = musb_readw(epio, MUSB_RXCSR); - struct musb_hw_ep *hw_ep = &musb->endpoints[epnum]; - - if (hw_ep->is_shared_fifo) - musb_ep = &hw_ep->ep_in; - else - musb_ep = &hw_ep->ep_out; - - len = musb_ep->packet_sz; /* We shouldn't get here while DMA is active, but we do... */ if (dma_channel_status(musb_ep->dma) == MUSB_DMA_STATUS_BUSY) { @@ -643,8 +647,8 @@ static void rxstate(struct musb *musb, struct musb_request *req) */ csr |= MUSB_RXCSR_DMAENAB; - csr |= MUSB_RXCSR_AUTOCLEAR; #ifdef USE_MODE1 + csr |= MUSB_RXCSR_AUTOCLEAR; /* csr |= MUSB_RXCSR_DMAMODE; */ /* this special sequence (enabling and then @@ -659,11 +663,10 @@ static void rxstate(struct musb *musb, struct musb_request *req) if (request->actual < request->length) { int transfer_size = 0; #ifdef USE_MODE1 - transfer_size = min(request->length - request->actual, + transfer_size = min(request->length, channel->max_len); #else - transfer_size = min(request->length - request->actual, - (unsigned)len); + transfer_size = len; #endif if (transfer_size <= musb_ep->packet_sz) musb_ep->dma->desired_mode = 0; @@ -737,15 +740,9 @@ void musb_g_rx(struct musb *musb, u8 epnum) u16 csr; struct usb_request *request; void __iomem *mbase = musb->mregs; - struct musb_ep *musb_ep; + struct musb_ep *musb_ep = &musb->endpoints[epnum].ep_out; void __iomem *epio = musb->endpoints[epnum].regs; struct dma_channel *dma; - struct musb_hw_ep *hw_ep = &musb->endpoints[epnum]; - - if (hw_ep->is_shared_fifo) - musb_ep = &hw_ep->ep_in; - else - musb_ep = &hw_ep->ep_out; musb_ep_select(mbase, epnum); @@ -1084,7 +1081,7 @@ struct free_record { /* * Context: controller locked, IRQs blocked. */ -void musb_ep_restart(struct musb *musb, struct musb_request *req) +static void musb_ep_restart(struct musb *musb, struct musb_request *req) { DBG(3, "<== %s request %p len %u on hw_ep%d\n", req->tx ? "TX/IN" : "RX/OUT", diff --git a/trunk/drivers/usb/musb/musb_gadget.h b/trunk/drivers/usb/musb/musb_gadget.h index 572b1da7f2dc..c8b140325d82 100644 --- a/trunk/drivers/usb/musb/musb_gadget.h +++ b/trunk/drivers/usb/musb/musb_gadget.h @@ -105,6 +105,4 @@ extern void musb_gadget_cleanup(struct musb *); extern void musb_g_giveback(struct musb_ep *, struct usb_request *, int); -extern void musb_ep_restart(struct musb *, struct musb_request *); - #endif /* __MUSB_GADGET_H */ diff --git a/trunk/drivers/usb/musb/musb_gadget_ep0.c b/trunk/drivers/usb/musb/musb_gadget_ep0.c index 6dd03f4c5f49..59bef8f3a358 100644 --- a/trunk/drivers/usb/musb/musb_gadget_ep0.c +++ b/trunk/drivers/usb/musb/musb_gadget_ep0.c @@ -261,7 +261,6 @@ __acquires(musb->lock) ctrlrequest->wIndex & 0x0f; struct musb_ep *musb_ep; struct musb_hw_ep *ep; - struct musb_request *request; void __iomem *regs; int is_in; u16 csr; @@ -303,14 +302,6 @@ __acquires(musb->lock) musb_writew(regs, MUSB_RXCSR, csr); } - /* Maybe start the first request in the queue */ - request = to_musb_request( - next_request(musb_ep)); - if (!musb_ep->busy && request) { - DBG(3, "restarting the request\n"); - musb_ep_restart(musb, request); - } - /* select ep0 again */ musb_ep_select(mbase, 0); } break; diff --git a/trunk/drivers/usb/musb/musb_host.c b/trunk/drivers/usb/musb/musb_host.c index 9e65c47cc98b..877d20b1dff9 100644 --- a/trunk/drivers/usb/musb/musb_host.c +++ b/trunk/drivers/usb/musb/musb_host.c @@ -660,12 +660,6 @@ static bool musb_tx_dma_program(struct dma_controller *dma, qh->segsize = length; - /* - * Ensure the data reaches to main memory before starting - * DMA transfer - */ - wmb(); - if (!dma->channel_program(channel, pkt_size, mode, urb->transfer_dma + offset, length)) { dma->channel_release(channel); diff --git a/trunk/drivers/usb/otg/twl4030-usb.c b/trunk/drivers/usb/otg/twl4030-usb.c index 0bc97698af15..05aaac1c3861 100644 --- a/trunk/drivers/usb/otg/twl4030-usb.c +++ b/trunk/drivers/usb/otg/twl4030-usb.c @@ -347,20 +347,11 @@ static void twl4030_i2c_access(struct twl4030_usb *twl, int on) } } -static void __twl4030_phy_power(struct twl4030_usb *twl, int on) -{ - u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); - - if (on) - pwr &= ~PHY_PWR_PHYPWD; - else - pwr |= PHY_PWR_PHYPWD; - - WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0); -} - static void twl4030_phy_power(struct twl4030_usb *twl, int on) { + u8 pwr; + + pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); if (on) { regulator_enable(twl->usb3v1); regulator_enable(twl->usb1v8); @@ -374,13 +365,15 @@ static void twl4030_phy_power(struct twl4030_usb *twl, int on) twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2); regulator_enable(twl->usb1v5); - __twl4030_phy_power(twl, 1); + pwr &= ~PHY_PWR_PHYPWD; + WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0); twl4030_usb_write(twl, PHY_CLK_CTRL, twl4030_usb_read(twl, PHY_CLK_CTRL) | (PHY_CLK_CTRL_CLOCKGATING_EN | PHY_CLK_CTRL_CLK32K_EN)); - } else { - __twl4030_phy_power(twl, 0); + } else { + pwr |= PHY_PWR_PHYPWD; + WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0); regulator_disable(twl->usb1v5); regulator_disable(twl->usb1v8); regulator_disable(twl->usb3v1); @@ -394,25 +387,19 @@ static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off) twl4030_phy_power(twl, 0); twl->asleep = 1; - dev_dbg(twl->dev, "%s\n", __func__); } -static void __twl4030_phy_resume(struct twl4030_usb *twl) +static void twl4030_phy_resume(struct twl4030_usb *twl) { + if (!twl->asleep) + return; + twl4030_phy_power(twl, 1); twl4030_i2c_access(twl, 1); twl4030_usb_set_mode(twl, twl->usb_mode); if (twl->usb_mode == T2_USB_MODE_ULPI) twl4030_i2c_access(twl, 0); -} - -static void twl4030_phy_resume(struct twl4030_usb *twl) -{ - if (!twl->asleep) - return; - __twl4030_phy_resume(twl); twl->asleep = 0; - dev_dbg(twl->dev, "%s\n", __func__); } static int twl4030_usb_ldo_init(struct twl4030_usb *twl) @@ -421,8 +408,8 @@ static int twl4030_usb_ldo_init(struct twl4030_usb *twl) twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY); twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY); - /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/ - /*twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/ + /* put VUSB3V1 LDO in active state */ + twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2); /* input to VUSB3V1 LDO is from VBAT, not VBUS */ twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1); @@ -515,26 +502,6 @@ static irqreturn_t twl4030_usb_irq(int irq, void *_twl) return IRQ_HANDLED; } -static void twl4030_usb_phy_init(struct twl4030_usb *twl) -{ - int status; - - status = twl4030_usb_linkstat(twl); - if (status >= 0) { - if (status == USB_EVENT_NONE) { - __twl4030_phy_power(twl, 0); - twl->asleep = 1; - } else { - __twl4030_phy_resume(twl); - twl->asleep = 0; - } - - blocking_notifier_call_chain(&twl->otg.notifier, status, - twl->otg.gadget); - } - sysfs_notify(&twl->dev->kobj, NULL, "vbus"); -} - static int twl4030_set_suspend(struct otg_transceiver *x, int suspend) { struct twl4030_usb *twl = xceiv_to_twl(x); @@ -583,6 +550,7 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev) struct twl4030_usb_data *pdata = pdev->dev.platform_data; struct twl4030_usb *twl; int status, err; + u8 pwr; if (!pdata) { dev_dbg(&pdev->dev, "platform_data not available\n"); @@ -601,7 +569,10 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev) twl->otg.set_peripheral = twl4030_set_peripheral; twl->otg.set_suspend = twl4030_set_suspend; twl->usb_mode = pdata->usb_mode; - twl->asleep = 1; + + pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); + + twl->asleep = (pwr & PHY_PWR_PHYPWD); /* init spinlock for workqueue */ spin_lock_init(&twl->lock); @@ -639,10 +610,15 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev) return status; } - /* Power down phy or make it work according to - * current link state. + /* The IRQ handler just handles changes from the previous states + * of the ID and VBUS pins ... in probe() we must initialize that + * previous state. The easy way: fake an IRQ. + * + * REVISIT: a real IRQ might have happened already, if PREEMPT is + * enabled. Else the IRQ may not yet be configured or enabled, + * because of scheduling delays. */ - twl4030_usb_phy_init(twl); + twl4030_usb_irq(twl->irq, twl); dev_info(&pdev->dev, "Initialized TWL4030 USB module\n"); return 0; diff --git a/trunk/drivers/usb/serial/mos7720.c b/trunk/drivers/usb/serial/mos7720.c index aa665817a272..30922a7e3347 100644 --- a/trunk/drivers/usb/serial/mos7720.c +++ b/trunk/drivers/usb/serial/mos7720.c @@ -2024,9 +2024,6 @@ static int mos7720_ioctl(struct tty_struct *tty, struct file *file, case TIOCGICOUNT: cnow = mos7720_port->icount; - - memset(&icount, 0, sizeof(struct serial_icounter_struct)); - icount.cts = cnow.cts; icount.dsr = cnow.dsr; icount.rng = cnow.rng; diff --git a/trunk/drivers/usb/serial/mos7840.c b/trunk/drivers/usb/serial/mos7840.c index 1a42bc213799..1c9b6e9b2386 100644 --- a/trunk/drivers/usb/serial/mos7840.c +++ b/trunk/drivers/usb/serial/mos7840.c @@ -2285,9 +2285,6 @@ static int mos7840_ioctl(struct tty_struct *tty, struct file *file, case TIOCGICOUNT: cnow = mos7840_port->icount; smp_rmb(); - - memset(&icount, 0, sizeof(struct serial_icounter_struct)); - icount.cts = cnow.cts; icount.dsr = cnow.dsr; icount.rng = cnow.rng; diff --git a/trunk/drivers/vhost/net.c b/trunk/drivers/vhost/net.c index 7c8008225ee3..29e850a7a2f9 100644 --- a/trunk/drivers/vhost/net.c +++ b/trunk/drivers/vhost/net.c @@ -243,7 +243,7 @@ static int get_rx_bufs(struct vhost_virtqueue *vq, int r, nlogs = 0; while (datalen > 0) { - if (unlikely(seg >= VHOST_NET_MAX_SG)) { + if (unlikely(headcount >= VHOST_NET_MAX_SG)) { r = -ENOBUFS; goto err; } diff --git a/trunk/drivers/vhost/vhost.c b/trunk/drivers/vhost/vhost.c index dd3d6f7406f8..c579dcc9200c 100644 --- a/trunk/drivers/vhost/vhost.c +++ b/trunk/drivers/vhost/vhost.c @@ -858,12 +858,11 @@ int vhost_log_write(struct vhost_virtqueue *vq, struct vhost_log *log, if (r < 0) return r; len -= l; - if (!len) { - if (vq->log_ctx) - eventfd_signal(vq->log_ctx, 1); + if (!len) return 0; - } } + if (vq->log_ctx) + eventfd_signal(vq->log_ctx, 1); /* Length written exceeds what we have stored. This is a bug. */ BUG(); return 0; diff --git a/trunk/drivers/video/console/fbcon.c b/trunk/drivers/video/console/fbcon.c index 7ccc967831f0..84f842331dfa 100644 --- a/trunk/drivers/video/console/fbcon.c +++ b/trunk/drivers/video/console/fbcon.c @@ -3508,7 +3508,7 @@ static void fbcon_exit(void) softback_buf = 0UL; for (i = 0; i < FB_MAX; i++) { - int pending = 0; + int pending; mapped = 0; info = registered_fb[i]; @@ -3516,8 +3516,7 @@ static void fbcon_exit(void) if (info == NULL) continue; - if (info->queue.func) - pending = cancel_work_sync(&info->queue); + pending = cancel_work_sync(&info->queue); DPRINTK("fbcon: %s pending work\n", (pending ? "canceled" : "no")); diff --git a/trunk/drivers/video/efifb.c b/trunk/drivers/video/efifb.c index 70477c2e4b61..815f84b07933 100644 --- a/trunk/drivers/video/efifb.c +++ b/trunk/drivers/video/efifb.c @@ -13,7 +13,7 @@ #include #include #include -#include + #include