From 1d4fee6451b20890dfc40ae57e2c6ffb5098c41a Mon Sep 17 00:00:00 2001 From: Giuseppe CAVALLARO Date: Mon, 4 Jun 2012 05:51:18 +0000 Subject: [PATCH] --- yaml --- r: 310709 b: refs/heads/master c: 9ec0db71af04f4560e27a3c2f5a0411ba3155198 h: refs/heads/master i: 310707: e788a5ff9cda959ab102f57e73181188543be5a8 v: v3 --- [refs] | 2 +- trunk/drivers/net/phy/icplus.c | 7 +++++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 4ef6a79f4640..fdfde0ddc10e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3ab2cdd02850d53d32369e51c0ae2dbcf8a66e55 +refs/heads/master: 9ec0db71af04f4560e27a3c2f5a0411ba3155198 diff --git a/trunk/drivers/net/phy/icplus.c b/trunk/drivers/net/phy/icplus.c index 5ac46f5226f3..47f8e8939266 100644 --- a/trunk/drivers/net/phy/icplus.c +++ b/trunk/drivers/net/phy/icplus.c @@ -41,6 +41,8 @@ MODULE_LICENSE("GPL"); #define IP1001_APS_ON 11 /* IP1001 APS Mode bit */ #define IP101A_G_APS_ON 2 /* IP101A/G APS Mode bit */ #define IP101A_G_IRQ_CONF_STATUS 0x11 /* Conf Info IRQ & Status Reg */ +#define IP101A_G_IRQ_PIN_USED (1<<15) /* INTR pin used */ +#define IP101A_G_IRQ_DEFAULT IP101A_G_IRQ_PIN_USED static int ip175c_config_init(struct phy_device *phydev) { @@ -136,6 +138,11 @@ static int ip1001_config_init(struct phy_device *phydev) if (c < 0) return c; + /* INTR pin used: speed/link/duplex will cause an interrupt */ + c = phy_write(phydev, IP101A_G_IRQ_CONF_STATUS, IP101A_G_IRQ_DEFAULT); + if (c < 0) + return c; + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { /* Additional delay (2ns) used to adjust RX clock phase * at RGMII interface */