From 1e40a413b4de8fbb870256d410f44e8a9abcf37b Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 21 Jul 2010 19:37:21 -0400 Subject: [PATCH] --- yaml --- r: 201164 b: refs/heads/master c: 15cb02c0a0338ee724bf23e31c7c410ecbffeeba h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 757879eacadb..f38ec44e52d0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 29508eb66bfacdef324d2199eeaea31e0cdfaa29 +refs/heads/master: 15cb02c0a0338ee724bf23e31c7c410ecbffeeba diff --git a/trunk/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/trunk/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index bad77f40a9da..5688a0cf6bbe 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_legacy_encoders.c @@ -108,6 +108,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) udelay(panel_pwr_delay * 1000); WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); + udelay(panel_pwr_delay * 1000); break; }