From 1e8d79fc00fa454b99b52b7b47b0b6e38372ed9c Mon Sep 17 00:00:00 2001
From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 22 Aug 2011 08:43:04 +0100
Subject: [PATCH] --- yaml --- r: 269407 b: refs/heads/master c:
 257af9f9725aa8a863b306659208a031135d59e7 h: refs/heads/master i:   269405:
 911c2df61af740d8726c18df7c6d8cada667ce88   269403:
 a7c52a66fb6ca5d2f8310dc7253d38b15c54bcee   269399:
 bb157d90fbaad6f393df8cba08066d0e0883f1a0   269391:
 547966075d32537e01e15f89dbce8e9f0cf9a3ad   269375:
 1f9a88c2205abe1fd9379c2011fcedfdd41a20d0 v: v3

---
 [refs]                                        |  2 +-
 .../arch/arm/mach-ep93xx/include/mach/gpio.h  |  9 +--------
 trunk/drivers/gpio/gpio-ep93xx.c              | 19 ++++++++++++++++++-
 3 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/[refs] b/[refs]
index fd2256f6372f..577a59d9659b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5f3fcf9649dbb010ccac41259d04147775ec8fc2
+refs/heads/master: 257af9f9725aa8a863b306659208a031135d59e7
diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/gpio.h b/trunk/arch/arm/mach-ep93xx/include/mach/gpio.h
index 071f676c6e09..76c68faca943 100644
--- a/trunk/arch/arm/mach-ep93xx/include/mach/gpio.h
+++ b/trunk/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -99,14 +99,7 @@
 /* maximum value for irq capable line identifiers */
 #define EP93XX_GPIO_LINE_MAX_IRQ	EP93XX_GPIO_LINE_F(7)
 
-/*
- * Map GPIO A0..A7  (0..7)  to irq 64..71,
- *          B0..B7  (7..15) to irq 72..79, and
- *          F0..F7 (16..24) to irq 80..87.
- */
-#define gpio_to_irq(gpio)	\
-	(((gpio) <= EP93XX_GPIO_LINE_MAX_IRQ) ? (64 + (gpio)) : -EINVAL)
-
+#define gpio_to_irq		__gpio_to_irq
 #define irq_to_gpio(irq)	((irq) - gpio_to_irq(0))
 
 #endif
diff --git a/trunk/drivers/gpio/gpio-ep93xx.c b/trunk/drivers/gpio/gpio-ep93xx.c
index 72fb9c665320..fbd6a6066777 100644
--- a/trunk/drivers/gpio/gpio-ep93xx.c
+++ b/trunk/drivers/gpio/gpio-ep93xx.c
@@ -307,6 +307,21 @@ static int ep93xx_gpio_set_debounce(struct gpio_chip *chip,
 	return 0;
 }
 
+/*
+ * Map GPIO A0..A7  (0..7)  to irq 64..71,
+ *          B0..B7  (7..15) to irq 72..79, and
+ *          F0..F7 (16..24) to irq 80..87.
+ */
+static int ep93xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+	int gpio = chip->base + offset;
+
+	if (gpio > EP93XX_GPIO_LINE_MAX_IRQ)
+		return -EINVAL;
+
+	return 64 + gpio;
+}
+
 static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev,
 	void __iomem *mmio_base, struct ep93xx_gpio_bank *bank)
 {
@@ -321,8 +336,10 @@ static int ep93xx_gpio_add_bank(struct bgpio_chip *bgc, struct device *dev,
 	bgc->gc.label = bank->label;
 	bgc->gc.base = bank->base;
 
-	if (bank->has_debounce)
+	if (bank->has_debounce) {
 		bgc->gc.set_debounce = ep93xx_gpio_set_debounce;
+		bgc->gc.to_irq = ep93xx_gpio_to_irq;
+	}
 
 	return gpiochip_add(&bgc->gc);
 }