From 1ef07755fe2cbc2ad5a82e677b4dd7f6e4084c4e Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Aug 2011 21:02:01 +0530 Subject: [PATCH] --- yaml --- r: 272910 b: refs/heads/master c: 189892f496cd01bf1af149bd6f7f380fcf67489d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/boot/dts/omap3.dtsi | 44 ++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) create mode 100644 trunk/arch/arm/boot/dts/omap3.dtsi diff --git a/[refs] b/[refs] index f00d70e70a4c..96b1f55a4216 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 492beedfd80e48be48211b5e7bce9b85fb141a81 +refs/heads/master: 189892f496cd01bf1af149bd6f7f380fcf67489d diff --git a/trunk/arch/arm/boot/dts/omap3.dtsi b/trunk/arch/arm/boot/dts/omap3.dtsi new file mode 100644 index 000000000000..d558785c8b2c --- /dev/null +++ b/trunk/arch/arm/boot/dts/omap3.dtsi @@ -0,0 +1,44 @@ +/* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,omap3430", "ti,omap3"; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + }; + + /* + * XXX: Use a flat representation of the OMAP3 interconnect. + * The real OMAP interconnect network is quite complex. + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main"; + + intc: interrupt-controller@1 { + compatible = "ti,omap3-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +};