From 2078f0af2b2ab4d172da8cbf3b977a64eab016a0 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Tue, 29 Sep 2009 15:10:23 -0700 Subject: [PATCH] --- yaml --- r: 166910 b: refs/heads/master c: 6e804251d119bbd5522d76bdb0f48f5c9a7abf51 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/sparc/kernel/perf_event.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 427d070978b2..2565921bf3b5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d29862f03575cdfa8819f78b0f3f78eec3b44629 +refs/heads/master: 6e804251d119bbd5522d76bdb0f48f5c9a7abf51 diff --git a/trunk/arch/sparc/kernel/perf_event.c b/trunk/arch/sparc/kernel/perf_event.c index 03b041c4d95c..32fc974bf8b5 100644 --- a/trunk/arch/sparc/kernel/perf_event.c +++ b/trunk/arch/sparc/kernel/perf_event.c @@ -214,7 +214,7 @@ static const struct sparc_pmu ultra3_pmu = { /* Niagara1 is very limited. The upper PIC is hard-locked to count * only instructions, so it is free running which creates all kinds of - * problems. Some hardware designs make one wonder if the creastor + * problems. Some hardware designs make one wonder if the creator * even looked at how this stuff gets used by software. */ static const struct perf_event_map niagara1_perfmon_event_map[] = {