From 21c31da1de02219eb4dcd538f0e7cf2b0579c2db Mon Sep 17 00:00:00 2001
From: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Sun, 12 Aug 2012 19:27:09 +0200
Subject: [PATCH] --- yaml --- r: 329324 b: refs/heads/master c:
 a37b9b349ef26cb44f0e8d59c3efbcd9485018b4 h: refs/heads/master v: v3

---
 [refs]                                     | 2 +-
 trunk/drivers/gpu/drm/i915/dvo_ns2501.c    | 7 -------
 trunk/drivers/gpu/drm/i915/intel_display.c | 2 +-
 3 files changed, 2 insertions(+), 9 deletions(-)

diff --git a/[refs] b/[refs]
index 79ccd0f2f7ad..a26915343553 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: dcdaed6eae0d7ed0c68aaa1ebfceb242625b3bf0
+refs/heads/master: a37b9b349ef26cb44f0e8d59c3efbcd9485018b4
diff --git a/trunk/drivers/gpu/drm/i915/dvo_ns2501.c b/trunk/drivers/gpu/drm/i915/dvo_ns2501.c
index 1a0bad9a5fab..6bd383dfbb09 100644
--- a/trunk/drivers/gpu/drm/i915/dvo_ns2501.c
+++ b/trunk/drivers/gpu/drm/i915/dvo_ns2501.c
@@ -74,11 +74,6 @@ struct ns2501_priv {
 
 #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr))
 
-/*
- * Include the PLL launcher prototype
- */
-extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
-
 /*
  * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens
  * laptops does not react on the i2c bus unless
@@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo)
 	I915_WRITE(DVOC_SRCDIM, 0x400300);	// 1024x768
 	I915_WRITE(FW_BLC, 0x1080304);
 
-	intel_enable_pll(dev_priv, 0);
-
 	I915_WRITE(DVOC, 0x90004084);
 }
 
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index dd760f43f577..a55f6642be20 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -1432,7 +1432,7 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
  *
  * Unfortunately needed by dvo_ns2501 since the dvo depends on it running.
  */
-void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
+static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
 	int reg;
 	u32 val;