From 221610348f0d836ea010376f3759f448641a8380 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 9 Sep 2010 16:37:29 -0700 Subject: [PATCH] --- yaml --- r: 210442 b: refs/heads/master c: b6de860651d5a9e56ba4f4e3edc1aa52ac2ac849 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/rtc/rtc-bfin.c | 13 +++++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 5ea9595c7f84..7b7b34113a57 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 110b7e9698601b28f313c2c560d51a8b1c742002 +refs/heads/master: b6de860651d5a9e56ba4f4e3edc1aa52ac2ac849 diff --git a/trunk/drivers/rtc/rtc-bfin.c b/trunk/drivers/rtc/rtc-bfin.c index 65facfbe70fb..d4fb82d85e9b 100644 --- a/trunk/drivers/rtc/rtc-bfin.c +++ b/trunk/drivers/rtc/rtc-bfin.c @@ -435,8 +435,17 @@ static int bfin_rtc_resume(struct platform_device *pdev) { if (device_may_wakeup(&pdev->dev)) disable_irq_wake(IRQ_RTC); - else - bfin_write_RTC_ISTAT(-1); + + /* + * Since only some of the RTC bits are maintained externally in the + * Vbat domain, we need to wait for the RTC MMRs to be synced into + * the core after waking up. This happens every RTC 1HZ. Once that + * has happened, we can go ahead and re-enable the important write + * complete interrupt event. + */ + while (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_SEC)) + continue; + bfin_rtc_int_set(RTC_ISTAT_WRITE_COMPLETE); return 0; }