diff --git a/[refs] b/[refs]
index e7984aabd6fc..dcce70fc92e2 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 2a2c3e451965aca35c2d0d1b2db1dbd1d839c75e
+refs/heads/master: 7a8341969fe0df4a1fffa141435e742456270ffd
diff --git a/trunk/arch/mips/mips-boards/generic/init.c b/trunk/arch/mips/mips-boards/generic/init.c
index 17dfe6a8cab9..df4e94735604 100644
--- a/trunk/arch/mips/mips-boards/generic/init.c
+++ b/trunk/arch/mips/mips-boards/generic/init.c
@@ -337,6 +337,7 @@ void __init prom_init(void)
 	case MIPS_REVISION_CORID_CORE_MSC:
 	case MIPS_REVISION_CORID_CORE_FPGA2:
 	case MIPS_REVISION_CORID_CORE_FPGA3:
+	case MIPS_REVISION_CORID_CORE_24K:
 	case MIPS_REVISION_CORID_CORE_EMUL_MSC:
 		_pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
 
diff --git a/trunk/arch/mips/mips-boards/generic/pci.c b/trunk/arch/mips/mips-boards/generic/pci.c
index 1f6f9df74ab2..9337f6c8873a 100644
--- a/trunk/arch/mips/mips-boards/generic/pci.c
+++ b/trunk/arch/mips/mips-boards/generic/pci.c
@@ -198,6 +198,7 @@ void __init mips_pcibios_init(void)
 	case MIPS_REVISION_CORID_CORE_MSC:
 	case MIPS_REVISION_CORID_CORE_FPGA2:
 	case MIPS_REVISION_CORID_CORE_FPGA3:
+	case MIPS_REVISION_CORID_CORE_24K:
 	case MIPS_REVISION_CORID_CORE_EMUL_MSC:
 		/* Set up resource ranges from the controller's registers.  */
 		MSC_READ(MSC01_PCI_SC2PMBASL, start);
diff --git a/trunk/arch/mips/mips-boards/malta/malta_int.c b/trunk/arch/mips/mips-boards/malta/malta_int.c
index 64db07d4dbe5..7cc0ba4f553a 100644
--- a/trunk/arch/mips/mips-boards/malta/malta_int.c
+++ b/trunk/arch/mips/mips-boards/malta/malta_int.c
@@ -57,6 +57,7 @@ static inline int mips_pcibios_iack(void)
 	case MIPS_REVISION_CORID_CORE_MSC:
 	case MIPS_REVISION_CORID_CORE_FPGA2:
 	case MIPS_REVISION_CORID_CORE_FPGA3:
+	case MIPS_REVISION_CORID_CORE_24K:
 	case MIPS_REVISION_CORID_CORE_EMUL_MSC:
 	        MSC_READ(MSC01_PCI_IACK, irq);
 		irq &= 0xff;
@@ -143,6 +144,7 @@ void corehi_irqdispatch(struct pt_regs *regs)
         case MIPS_REVISION_CORID_CORE_MSC:
         case MIPS_REVISION_CORID_CORE_FPGA2:
         case MIPS_REVISION_CORID_CORE_FPGA3:
+        case MIPS_REVISION_CORID_CORE_24K:
         case MIPS_REVISION_CORID_CORE_EMUL_MSC:
                 ll_msc_irq(regs);
                 break;
@@ -309,6 +311,7 @@ void __init arch_init_irq(void)
         case MIPS_REVISION_CORID_CORE_MSC:
         case MIPS_REVISION_CORID_CORE_FPGA2:
         case MIPS_REVISION_CORID_CORE_FPGA3:
+        case MIPS_REVISION_CORID_CORE_24K:
         case MIPS_REVISION_CORID_CORE_EMUL_MSC:
 		if (cpu_has_veic)
 			init_msc_irqs (MSC01E_INT_BASE, msc_eicirqmap, msc_nr_eicirqs);
diff --git a/trunk/include/asm-mips/mips-boards/generic.h b/trunk/include/asm-mips/mips-boards/generic.h
index 25b6ffc26623..fa8b913cc3e0 100644
--- a/trunk/include/asm-mips/mips-boards/generic.h
+++ b/trunk/include/asm-mips/mips-boards/generic.h
@@ -67,6 +67,7 @@
 #define MIPS_REVISION_CORID_CORE_FPGA2     7
 #define MIPS_REVISION_CORID_CORE_FPGAR2    8
 #define MIPS_REVISION_CORID_CORE_FPGA3     9
+#define MIPS_REVISION_CORID_CORE_24K       10
 
 /**** Artificial corid defines ****/
 /*