From 2382e15511078c17c0f21971e82b7a253d8b89aa Mon Sep 17 00:00:00 2001
From: Eugene Surovegin <ebs@ebshome.net>
Date: Thu, 9 Jun 2005 12:36:29 -0700
Subject: [PATCH] --- yaml --- r: 1942 b: refs/heads/master c:
 7fbdf1a23be1837b8bc5bcec096015ca99e00aa7 h: refs/heads/master v: v3

---
 [refs]                           |  2 +-
 trunk/arch/ppc/kernel/cputable.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index d8275ccfe2aa..7062e702d165 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 04dc9ba882d224612f8db50fd60c8a45b843e77c
+refs/heads/master: 7fbdf1a23be1837b8bc5bcec096015ca99e00aa7
diff --git a/trunk/arch/ppc/kernel/cputable.c b/trunk/arch/ppc/kernel/cputable.c
index 17abf6cd0d90..ce2618ac8ac2 100644
--- a/trunk/arch/ppc/kernel/cputable.c
+++ b/trunk/arch/ppc/kernel/cputable.c
@@ -860,6 +860,17 @@ struct cpu_spec	cpu_specs[] = {
 		.icache_bsize		= 32,
 		.dcache_bsize		= 32,
 	},
+	{	/* 405EP */
+		.pvr_mask		= 0xffff0000,
+		.pvr_value		= 0x51210000,
+		.cpu_name		= "405EP",
+		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
+			CPU_FTR_USE_TB,
+		.cpu_user_features	= PPC_FEATURE_32 |
+			PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
 
 #endif /* CONFIG_40x */
 #ifdef CONFIG_44x