From 238b8c3045d181ae66eff634b6461a66273ee8f3 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Thu, 25 Feb 2010 04:23:31 +0000 Subject: [PATCH] --- yaml --- r: 185631 b: refs/heads/master c: d964fc54ed06cea45dfd10832ed3d34f3ddb661b h: refs/heads/master i: 185629: 70a2a9ce3be61b6700ce1c787cb081ed39e494d5 185627: 4868db983d853f7bea9c9de400163305975f33d2 185623: 0c8261b2b8c53a00a0d17fbba41688ebfdf73cdc 185615: ab1d67c37ce028f13ffc206c6e0000e978d8e16c 185599: 470f89e6649455058892a4cd50f0ad44c9bf39e1 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r600_blit.c | 2 +- trunk/drivers/gpu/drm/radeon/r600_blit_kms.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 53b04ca2b191..52503d55d1bb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 32b3c2abaf8c61c80a8b02071c73f05252122ffe +refs/heads/master: d964fc54ed06cea45dfd10832ed3d34f3ddb661b diff --git a/trunk/drivers/gpu/drm/radeon/r600_blit.c b/trunk/drivers/gpu/drm/radeon/r600_blit.c index 5ea432347589..f4fb88ece2bb 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_blit.c +++ b/trunk/drivers/gpu/drm/radeon/r600_blit.c @@ -49,7 +49,7 @@ set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 RING_LOCALS; DRM_DEBUG("\n"); - h = (h + 7) & ~7; + h = ALIGN(h, 8); if (h < 8) h = 8; diff --git a/trunk/drivers/gpu/drm/radeon/r600_blit_kms.c b/trunk/drivers/gpu/drm/radeon/r600_blit_kms.c index de8bbbcfe117..f6c6c77db7e0 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/trunk/drivers/gpu/drm/radeon/r600_blit_kms.c @@ -25,7 +25,7 @@ set_render_target(struct radeon_device *rdev, int format, u32 cb_color_info; int pitch, slice; - h = (h + 7) & ~7; + h = ALIGN(h, 8); if (h < 8) h = 8; @@ -396,7 +396,7 @@ set_default_state(struct radeon_device *rdev) NUM_ES_STACK_ENTRIES(num_es_stack_entries)); /* emit an IB pointing at default state */ - dwords = (rdev->r600_blit.state_len + 0xf) & ~0xf; + dwords = ALIGN(rdev->r600_blit.state_len, 0x10); gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC);