From 23b381dfe0651928f74daa8123e73b5eabaec737 Mon Sep 17 00:00:00 2001 From: Jonas Bonn Date: Thu, 14 Feb 2013 07:42:30 +0100 Subject: [PATCH] --- yaml --- r: 359120 b: refs/heads/master c: 8668480eb79f0cbd79d6b584a10604d743853062 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/openrisc/mm/init.c | 17 ++++++++++++++--- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index d8aa160e2048..470aca86b47a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a81252d75e14cc2cf0ee45078ef143562a0bc279 +refs/heads/master: 8668480eb79f0cbd79d6b584a10604d743853062 diff --git a/trunk/arch/openrisc/mm/init.c b/trunk/arch/openrisc/mm/init.c index 79dea9740a3c..e7fdc50c4bf0 100644 --- a/trunk/arch/openrisc/mm/init.c +++ b/trunk/arch/openrisc/mm/init.c @@ -167,15 +167,26 @@ void __init paging_init(void) unsigned long *dtlb_vector = __va(0x900); unsigned long *itlb_vector = __va(0xa00); + printk(KERN_INFO "itlb_miss_handler %p\n", &itlb_miss_handler); + *itlb_vector = ((unsigned long)&itlb_miss_handler - + (unsigned long)itlb_vector) >> 2; + + /* Soft ordering constraint to ensure that dtlb_vector is + * the last thing updated + */ + barrier(); + printk(KERN_INFO "dtlb_miss_handler %p\n", &dtlb_miss_handler); *dtlb_vector = ((unsigned long)&dtlb_miss_handler - (unsigned long)dtlb_vector) >> 2; - printk(KERN_INFO "itlb_miss_handler %p\n", &itlb_miss_handler); - *itlb_vector = ((unsigned long)&itlb_miss_handler - - (unsigned long)itlb_vector) >> 2; } + /* Soft ordering constraint to ensure that cache invalidation and + * TLB flush really happen _after_ code has been modified. + */ + barrier(); + /* Invalidate instruction caches after code modification */ mtspr(SPR_ICBIR, 0x900); mtspr(SPR_ICBIR, 0xa00);