From 23c789934d3bfef8b7ecc626be5b5386b870a8b5 Mon Sep 17 00:00:00 2001 From: Steven Fuerst Date: Wed, 15 Aug 2012 15:07:16 -0700 Subject: [PATCH] --- yaml --- r: 329523 b: refs/heads/master c: 9e9eb7c60d57620bfe46b2a489e7f56a5925115a h: refs/heads/master i: 329521: 2d1aa200b467ee7de6da1ca807d7e3fdf8036d75 329519: d44eded499582ae4c8edbd9223e1a0e0cfb50520 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r600_blit.c | 2 +- trunk/drivers/gpu/drm/radeon/r600_blit_shaders.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 3a34a935f75d..eb8d045c5431 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 747f49ba67b8895a5831ab539de551b916f3738c +refs/heads/master: 9e9eb7c60d57620bfe46b2a489e7f56a5925115a diff --git a/trunk/drivers/gpu/drm/radeon/r600_blit.c b/trunk/drivers/gpu/drm/radeon/r600_blit.c index 7d8ac42e3846..661fec2a2cc1 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_blit.c +++ b/trunk/drivers/gpu/drm/radeon/r600_blit.c @@ -499,7 +499,7 @@ set_default_state(drm_radeon_private_t *dev_priv) * as the fractional bits will not fit in a float. (It would be better to * round towards even as the fpu does, but that is slower.) */ -uint32_t int2float(uint32_t x) +__pure uint32_t int2float(uint32_t x) { uint32_t msb, exponent, fraction; diff --git a/trunk/drivers/gpu/drm/radeon/r600_blit_shaders.h b/trunk/drivers/gpu/drm/radeon/r600_blit_shaders.h index e17c2cbc6627..2f3ce7a75976 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_blit_shaders.h +++ b/trunk/drivers/gpu/drm/radeon/r600_blit_shaders.h @@ -35,5 +35,5 @@ extern const u32 r6xx_default_state[]; extern const u32 r6xx_ps_size, r6xx_vs_size; extern const u32 r6xx_default_size, r7xx_default_size; -uint32_t int2float(uint32_t x); +__pure uint32_t int2float(uint32_t x); #endif