From 23f6b3dc083cdd8ebf70d5ddb4d1871cb64142b8 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 10 Jul 2012 16:40:55 -0700 Subject: [PATCH] --- yaml --- r: 317887 b: refs/heads/master c: 67e50c6ce031ab0e2309478c330655cd9c3b98ec h: refs/heads/master i: 317885: d1433e671e7c8f92226dc02cb05e2faa83e01ef7 317883: d18324a2f1975a83f42e281121af9e3f686ecab9 317879: b43d837dc2c3caac50506462164d836ba30ec9b6 317871: 7f1f398a44202cb23fc814971e191db433fc29f7 317855: 949af641cfd41aaa03ec68d829882df0ef04ceb8 317823: d9eaa1377b3ca7dc59fbb3be9ae16d0143c7f2f2 v: v3 --- [refs] | 2 +- trunk/drivers/staging/comedi/drivers/rtd520.c | 9 +++------ 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index bce6fcb2b845..321a8b34f9bc 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a8cb975ffe6fa93dd091de9d08596742f51c9009 +refs/heads/master: 67e50c6ce031ab0e2309478c330655cd9c3b98ec diff --git a/trunk/drivers/staging/comedi/drivers/rtd520.c b/trunk/drivers/staging/comedi/drivers/rtd520.c index ff30253bcd52..781f0812b2cc 100644 --- a/trunk/drivers/staging/comedi/drivers/rtd520.c +++ b/trunk/drivers/staging/comedi/drivers/rtd520.c @@ -406,10 +406,6 @@ struct rtdPrivate { /* Macros to access registers */ -/* Reset channel gain table read and write pointers */ -#define RtdClearCGT(dev) \ - writel(0, devpriv->las0+LAS0_CGT_CLEAR) - /* Reset channel gain table read and write pointers */ #define RtdEnableCGT(dev, v) \ writel((v > 0) ? 1 : 0, devpriv->las0+LAS0_CGT_ENABLE) @@ -797,7 +793,8 @@ static void rtd_load_channelgain_list(struct comedi_device *dev, { if (n_chan > 1) { /* setup channel gain table */ int ii; - RtdClearCGT(dev); + + writel(0, devpriv->las0 + LAS0_CGT_CLEAR); RtdEnableCGT(dev, 1); /* enable table */ for (ii = 0; ii < n_chan; ii++) { RtdWriteCGTable(dev, rtdConvertChanGain(dev, list[ii], @@ -2049,7 +2046,7 @@ static int rtd_attach(struct comedi_device *dev, struct comedi_devconfig *it) RtdInterruptClearMask(dev, ~0); /* and sets shadow */ RtdInterruptClear(dev); /* clears bits set by mask */ RtdInterruptOverrunClear(dev); - RtdClearCGT(dev); + writel(0, devpriv->las0 + LAS0_CGT_CLEAR); RtdAdcClearFifo(dev); RtdDacClearFifo(dev, 0); RtdDacClearFifo(dev, 1);