From 241c7d92a74a426d11ac104b47911842f4391f9c Mon Sep 17 00:00:00 2001
From: Giridhar Maruthy <[giridhar.maruthy@linaro.org]>
Date: Thu, 4 Apr 2013 15:25:00 +0900
Subject: [PATCH] --- yaml --- r: 374101 b: refs/heads/master c:
 3279dd3675c6eeb968a52d649709f93b83e85e72 h: refs/heads/master i:   374099:
 88aa30cd94e9b365df8dc082c1c95c1ddb8fb835 v: v3

---
 [refs]                                  | 2 +-
 trunk/arch/arm/boot/dts/exynos5440.dtsi | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index f2c559651916..db4625cd3ec1 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 319c51068cdf2ca785778f1fff8cc3142d3d64bb
+refs/heads/master: 3279dd3675c6eeb968a52d649709f93b83e85e72
diff --git a/trunk/arch/arm/boot/dts/exynos5440.dtsi b/trunk/arch/arm/boot/dts/exynos5440.dtsi
index c374a31e9c3d..25c6134ee633 100644
--- a/trunk/arch/arm/boot/dts/exynos5440.dtsi
+++ b/trunk/arch/arm/boot/dts/exynos5440.dtsi
@@ -26,7 +26,11 @@
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
 		interrupt-controller;
-		reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
+		reg =	<0x2E1000 0x1000>,
+			<0x2E2000 0x1000>,
+			<0x2E4000 0x2000>,
+			<0x2E6000 0x2000>;
+		interrupts = <1 9 0xf04>;
 	};
 
 	cpus {