From 24314e1659f6ae23b300985c4a6f1d87e5766184 Mon Sep 17 00:00:00 2001
From: Harvey Harrison <harvey.harrison@gmail.com>
Date: Wed, 6 Feb 2008 22:39:44 +0100
Subject: [PATCH] --- yaml --- r: 83700 b: refs/heads/master c:
 deef79ef351225a9fe02e41a40cb125ed03a3e6b h: refs/heads/master v: v3

---
 [refs]                           |  2 +-
 trunk/arch/x86/kernel/traps_32.c | 15 +++++----------
 2 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/[refs] b/[refs]
index bd89300358ff..038756f0b463 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4a5a77d106d6b43183662d4ad37a613bbaa9b829
+refs/heads/master: deef79ef351225a9fe02e41a40cb125ed03a3e6b
diff --git a/trunk/arch/x86/kernel/traps_32.c b/trunk/arch/x86/kernel/traps_32.c
index 3cf72977d012..b22c01e05a18 100644
--- a/trunk/arch/x86/kernel/traps_32.c
+++ b/trunk/arch/x86/kernel/traps_32.c
@@ -1176,17 +1176,12 @@ void __init trap_init(void)
 #endif
 	set_trap_gate(19,&simd_coprocessor_error);
 
+	/*
+	 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
+	 * Generate a build-time error if the alignment is wrong.
+	 */
+	BUILD_BUG_ON(offsetof(struct task_struct, thread.i387.fxsave) & 15);
 	if (cpu_has_fxsr) {
-		/*
-		 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
-		 * Generates a compile-time "error: zero width for bit-field" if
-		 * the alignment is wrong.
-		 */
-		struct fxsrAlignAssert {
-			int _:!(offsetof(struct task_struct,
-					thread.i387.fxsave) & 15);
-		};
-
 		printk(KERN_INFO "Enabling fast FPU save and restore... ");
 		set_in_cr4(X86_CR4_OSFXSR);
 		printk("done.\n");