From 24d8ad6d12466a32b29f9e70c2f0f74ecbea6e38 Mon Sep 17 00:00:00 2001 From: Borislav Petkov Date: Mon, 15 Mar 2010 19:39:18 +0100 Subject: [PATCH] --- yaml --- r: 202558 b: refs/heads/master c: 695426506ebba6acc87843cca075595a775e8866 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/edac/amd64_edac.h | 43 ++++++--------------------------- 2 files changed, 9 insertions(+), 36 deletions(-) diff --git a/[refs] b/[refs] index 9de92e7fd499..09bf91b6b938 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 935ab88e341ccb1507b2b0b1f1e9adcbbd693265 +refs/heads/master: 695426506ebba6acc87843cca075595a775e8866 diff --git a/trunk/drivers/edac/amd64_edac.h b/trunk/drivers/edac/amd64_edac.h index 707745b36733..613b9381e71a 100644 --- a/trunk/drivers/edac/amd64_edac.h +++ b/trunk/drivers/edac/amd64_edac.h @@ -244,44 +244,17 @@ #define F10_DCTL_SEL_LOW 0x110 - -#define dct_sel_baseaddr(pvt) \ - ((pvt->dram_ctl_select_low) & 0xFFFFF800) - -#define dct_sel_interleave_addr(pvt) \ - (((pvt->dram_ctl_select_low) >> 6) & 0x3) - -enum { - F10_DCTL_SEL_LOW_DctSelHiRngEn = BIT(0), - F10_DCTL_SEL_LOW_DctSelIntLvEn = BIT(2), - F10_DCTL_SEL_LOW_DctGangEn = BIT(4), - F10_DCTL_SEL_LOW_DctDatIntLv = BIT(5), - F10_DCTL_SEL_LOW_DramEnable = BIT(8), - F10_DCTL_SEL_LOW_MemCleared = BIT(10), -}; - -#define dct_high_range_enabled(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelHiRngEn) - -#define dct_interleave_enabled(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctSelIntLvEn) - -#define dct_ganging_enabled(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctGangEn) - -#define dct_data_intlv_enabled(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DctDatIntLv) - -#define dct_dram_enabled(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_DramEnable) - -#define dct_memory_cleared(pvt) \ - (pvt->dram_ctl_select_low & F10_DCTL_SEL_LOW_MemCleared) - +#define dct_sel_baseaddr(pvt) ((pvt->dram_ctl_select_low) & 0xFFFFF800) +#define dct_sel_interleave_addr(pvt) (((pvt->dram_ctl_select_low) >> 6) & 0x3) +#define dct_high_range_enabled(pvt) (pvt->dram_ctl_select_low & BIT(0)) +#define dct_interleave_enabled(pvt) (pvt->dram_ctl_select_low & BIT(2)) +#define dct_ganging_enabled(pvt) (pvt->dram_ctl_select_low & BIT(4)) +#define dct_data_intlv_enabled(pvt) (pvt->dram_ctl_select_low & BIT(5)) +#define dct_dram_enabled(pvt) (pvt->dram_ctl_select_low & BIT(8)) +#define dct_memory_cleared(pvt) (pvt->dram_ctl_select_low & BIT(10)) #define F10_DCTL_SEL_HIGH 0x114 - /* * Function 3 - Misc Control */