From 24eb85e1cf389eccd4c79c99125409499d3a6a34 Mon Sep 17 00:00:00 2001
From: Venu Byravarasu <vbyravarasu@nvidia.com>
Date: Thu, 24 Jan 2013 15:46:46 +0530
Subject: [PATCH] --- yaml --- r: 355569 b: refs/heads/master c:
 40e8b3a690ec0ef574c458a991eb647e56683b7d h: refs/heads/master i:   355567:
 fad142dc0606a5153ce6d94f387ed016adac6682 v: v3

---
 [refs]                                                        | 2 +-
 .../devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt        | 3 +++
 trunk/arch/arm/boot/dts/tegra20-harmony.dts                   | 4 ++++
 trunk/arch/arm/boot/dts/tegra20-paz00.dts                     | 4 ++++
 trunk/arch/arm/boot/dts/tegra20-seaboard.dts                  | 4 ++++
 trunk/arch/arm/boot/dts/tegra20-trimslice.dts                 | 4 ++++
 trunk/arch/arm/boot/dts/tegra20-ventana.dts                   | 4 ++++
 7 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 13e65ead79b4..c88c0a448f18 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 9304512151b0933c454f0842cdb19bec23422bc5
+refs/heads/master: 40e8b3a690ec0ef574c458a991eb647e56683b7d
diff --git a/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
index 84a4c12943af..6bdaba2f0aa1 100644
--- a/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
+++ b/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -7,6 +7,9 @@ Required properties :
  - reg : Address and length of the register set for the USB PHY interface.
  - phy_type : Should be one of "ulpi" or "utmi".
 
+Required properties for phy_type == ulpi:
+  - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
+
 Optional properties:
   - nvidia,has-legacy-mode : boolean indicates whether this controller can
     operate in legacy mode (as APX 2500 / 2600). In legacy mode some
diff --git a/trunk/arch/arm/boot/dts/tegra20-harmony.dts b/trunk/arch/arm/boot/dts/tegra20-harmony.dts
index 43eb72af8948..2b4169702c8d 100644
--- a/trunk/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-harmony.dts
@@ -432,6 +432,10 @@
 		status = "okay";
 	};
 
+	usb-phy@c5004400 {
+		nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+	};
+
 	sdhci@c8000200 {
 		status = "okay";
 		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
diff --git a/trunk/arch/arm/boot/dts/tegra20-paz00.dts b/trunk/arch/arm/boot/dts/tegra20-paz00.dts
index a965fe9c7aa1..11b30db63ff2 100644
--- a/trunk/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-paz00.dts
@@ -420,6 +420,10 @@
 		status = "okay";
 	};
 
+	usb-phy@c5004400 {
+		nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+	};
+
 	sdhci@c8000000 {
 		status = "okay";
 		cd-gpios = <&gpio 173 0>; /* gpio PV5 */
diff --git a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts
index 420459825b46..607bf0c6bf9c 100644
--- a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -561,6 +561,10 @@
 		status = "okay";
 	};
 
+	usb-phy@c5004400 {
+		nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+	};
+
 	sdhci@c8000000 {
 		status = "okay";
 		power-gpios = <&gpio 86 0>; /* gpio PK6 */
diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
index b70b4cb754c8..e47cf6a58b6f 100644
--- a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -310,6 +310,10 @@
 		status = "okay";
 	};
 
+	usb-phy@c5004400 {
+		nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+	};
+
 	sdhci@c8000000 {
 		status = "okay";
 		bus-width = <4>;
diff --git a/trunk/arch/arm/boot/dts/tegra20-ventana.dts b/trunk/arch/arm/boot/dts/tegra20-ventana.dts
index adc47547eaae..f6c61d10fd27 100644
--- a/trunk/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/trunk/arch/arm/boot/dts/tegra20-ventana.dts
@@ -497,6 +497,10 @@
 		status = "okay";
 	};
 
+	usb-phy@c5004400 {
+		nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+	};
+
 	sdhci@c8000000 {
 		status = "okay";
 		power-gpios = <&gpio 86 0>; /* gpio PK6 */