From 2507786903be3479bf4ddcd7a9c357b8130c1bc0 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 8 Jun 2007 15:14:32 +0200 Subject: [PATCH] --- yaml --- r: 57529 b: refs/heads/master c: 278978e953a35a2ddf27f197003b29da54e31908 h: refs/heads/master i: 57527: 0089895523e5aa060a81281c71e9ad68121f5ce9 v: v3 --- [refs] | 2 +- trunk/drivers/ide/pci/hpt366.c | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index ee813e73f16a..4bdc4fbf1c4d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ea30759643b423933ced48acdd78e5299f05295b +refs/heads/master: 278978e953a35a2ddf27f197003b29da54e31908 diff --git a/trunk/drivers/ide/pci/hpt366.c b/trunk/drivers/ide/pci/hpt366.c index fcbc5605b38e..ce8a5449a574 100644 --- a/trunk/drivers/ide/pci/hpt366.c +++ b/trunk/drivers/ide/pci/hpt366.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/hpt366.c Version 1.03 May 4, 2007 + * linux/drivers/ide/pci/hpt366.c Version 1.04 Jun 4, 2007 * * Copyright (C) 1999-2003 Andre Hedrick * Portions Copyright (C) 2001 Sun Microsystems, Inc. @@ -106,7 +106,8 @@ * switch to calculating PCI clock frequency based on the chip's base DPLL * frequency * - switch to using the DPLL clock and enable UltraATA/133 mode by default on - * anything newer than HPT370/A + * anything newer than HPT370/A (except HPT374 that is not capable of this + * mode according to the manual) * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(), * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips; * unify HPT36x/37x timing setup code and the speedproc handlers by joining @@ -365,7 +366,6 @@ static u32 sixty_six_base_hpt37x[] = { }; #define HPT366_DEBUG_DRIVE_INFO 0 -#define HPT374_ALLOW_ATA133_6 1 #define HPT371_ALLOW_ATA133_6 1 #define HPT302_ALLOW_ATA133_6 1 #define HPT372_ALLOW_ATA133_6 1 @@ -450,7 +450,7 @@ static struct hpt_info hpt370a __devinitdata = { static struct hpt_info hpt374 __devinitdata = { .chip_type = HPT374, - .max_mode = HPT374_ALLOW_ATA133_6 ? 4 : 3, + .max_mode = 3, .dpll_clk = 48, .settings = hpt37x_settings };