From 906fd84ee7c1080240a4aa687449d18fd83939c7 Mon Sep 17 00:00:00 2001 From: Yuvaraj Kumar C D Date: Mon, 21 Oct 2013 05:47:14 +0900 Subject: [PATCH 01/12] ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi Exynos5 series SOC's 5250 and 5420 have different versions of DWMMC controller.So there is a new compatible string to distinguish between them.So these nodes should be moved out of Exynos5 series common device tree source to SOC specific device tree source. Signed-off-by: Yuvaraj Kumar C D Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5.dtsi | 21 --------------------- arch/arm/boot/dts/exynos5250.dtsi | 12 ++++++++++++ 2 files changed, 12 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 074739d39e2d..e52b038a7a11 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -50,27 +50,6 @@ interrupts = <1 9 0xf04>; }; - dwmmc_0: dwmmc0@12200000 { - compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 75 0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - dwmmc_1: dwmmc1@12210000 { - compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 76 0>; - #address-cells = <1>; - #size-cells = <0>; - }; - - dwmmc_2: dwmmc2@12220000 { - compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 77 0>; - #address-cells = <1>; - #size-cells = <0>; - }; - serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 9db5047812f3..e613da11ce73 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -393,18 +393,30 @@ }; dwmmc_0: dwmmc0@12200000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 75 0>; + #address-cells = <1>; + #size-cells = <0>; reg = <0x12200000 0x1000>; clocks = <&clock 280>, <&clock 139>; clock-names = "biu", "ciu"; }; dwmmc_1: dwmmc1@12210000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 76 0>; + #address-cells = <1>; + #size-cells = <0>; reg = <0x12210000 0x1000>; clocks = <&clock 281>, <&clock 140>; clock-names = "biu", "ciu"; }; dwmmc_2: dwmmc2@12220000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <0 77 0>; + #address-cells = <1>; + #size-cells = <0>; reg = <0x12220000 0x1000>; clocks = <&clock 282>, <&clock 141>; clock-names = "biu", "ciu"; From e908d5c5dc3b9258449b3c4d926e347c4247ce09 Mon Sep 17 00:00:00 2001 From: Yuvaraj Kumar C D Date: Mon, 21 Oct 2013 05:48:06 +0900 Subject: [PATCH 02/12] ARM: dts: change status property of dwmmc nodes for exynos5250 According to ePAPR, chapter 2.3.4, the status property has defined that it should be set to "disabled" when "the device is not presently operational, but it might become operational in the future". So this patch disable dwmmc node by "status = disabled" in SOC dts file and enable dwmmc node by "status = okay" in board specific dts file. Signed-off-by: Yuvaraj Kumar C D Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 10 ++-------- arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++-------- arch/arm/boot/dts/exynos5250.dtsi | 4 ++++ 3 files changed, 8 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 684527087aa4..18e3e93e4b3d 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -385,6 +385,7 @@ }; dwmmc_0: dwmmc0@12200000 { + status = "okay"; num-slots = <1>; supports-highspeed; broken-cd; @@ -403,11 +404,8 @@ }; }; - dwmmc_1: dwmmc1@12210000 { - status = "disabled"; - }; - dwmmc_2: dwmmc2@12220000 { + status = "okay"; num-slots = <1>; supports-highspeed; fifo-depth = <0x80>; @@ -426,10 +424,6 @@ }; }; - dwmmc_3: dwmmc3@12230000 { - status = "disabled"; - }; - i2s0: i2s@03830000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index f86d56760a45..78ecc7510c2b 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -141,6 +141,7 @@ }; dwmmc0@12200000 { + status = "okay"; num-slots = <1>; supports-highspeed; broken-cd; @@ -158,11 +159,8 @@ }; }; - dwmmc1@12210000 { - status = "disabled"; - }; - dwmmc2@12220000 { + status = "okay"; num-slots = <1>; supports-highspeed; fifo-depth = <0x80>; @@ -180,10 +178,6 @@ }; }; - dwmmc3@12230000 { - status = "disabled"; - }; - spi_0: spi@12d20000 { status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index e613da11ce73..2507281141ef 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -400,6 +400,7 @@ reg = <0x12200000 0x1000>; clocks = <&clock 280>, <&clock 139>; clock-names = "biu", "ciu"; + status = "disabled"; }; dwmmc_1: dwmmc1@12210000 { @@ -410,6 +411,7 @@ reg = <0x12210000 0x1000>; clocks = <&clock 281>, <&clock 140>; clock-names = "biu", "ciu"; + status = "disabled"; }; dwmmc_2: dwmmc2@12220000 { @@ -420,6 +422,7 @@ reg = <0x12220000 0x1000>; clocks = <&clock 282>, <&clock 141>; clock-names = "biu", "ciu"; + status = "disabled"; }; dwmmc_3: dwmmc3@12230000 { @@ -430,6 +433,7 @@ #size-cells = <0>; clocks = <&clock 283>, <&clock 142>; clock-names = "biu", "ciu"; + status = "disabled"; }; i2s0: i2s@03830000 { From 46285a90f21541539164e06963c3069a91c9963f Mon Sep 17 00:00:00 2001 From: Yuvaraj Kumar C D Date: Mon, 21 Oct 2013 05:48:11 +0900 Subject: [PATCH 03/12] ARM: dts: Move fifo-depth property from exynos5250 board dts As fifo-depth property in dw_mmc device tree node is SOC specific, move this property to exynos5250 SOC specific file. Signed-off-by: Yuvaraj Kumar C D Reviewed-by: Tomasz Figa [kgene.kim@samsung.com: squashed fifo-depth patch for cros5250-common] Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/cros5250-common.dtsi | 3 --- arch/arm/boot/dts/exynos5250-arndale.dts | 2 -- arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 -- arch/arm/boot/dts/exynos5250.dtsi | 4 ++++ 4 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index dc259e8b8a73..a18833dded55 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi @@ -233,7 +233,6 @@ num-slots = <1>; supports-highspeed; broken-cd; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; @@ -254,7 +253,6 @@ dwmmc2@12220000 { num-slots = <1>; supports-highspeed; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; @@ -273,7 +271,6 @@ num-slots = <1>; supports-highspeed; broken-cd; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 18e3e93e4b3d..169a13a3f85a 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -389,7 +389,6 @@ num-slots = <1>; supports-highspeed; broken-cd; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; @@ -408,7 +407,6 @@ status = "okay"; num-slots = <1>; supports-highspeed; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 78ecc7510c2b..ae1562f98a25 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -145,7 +145,6 @@ num-slots = <1>; supports-highspeed; broken-cd; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; @@ -163,7 +162,6 @@ status = "okay"; num-slots = <1>; supports-highspeed; - fifo-depth = <0x80>; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 2507281141ef..0f8c0bd5ac55 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -400,6 +400,7 @@ reg = <0x12200000 0x1000>; clocks = <&clock 280>, <&clock 139>; clock-names = "biu", "ciu"; + fifo-depth = <0x80>; status = "disabled"; }; @@ -411,6 +412,7 @@ reg = <0x12210000 0x1000>; clocks = <&clock 281>, <&clock 140>; clock-names = "biu", "ciu"; + fifo-depth = <0x80>; status = "disabled"; }; @@ -422,6 +424,7 @@ reg = <0x12220000 0x1000>; clocks = <&clock 282>, <&clock 141>; clock-names = "biu", "ciu"; + fifo-depth = <0x80>; status = "disabled"; }; @@ -433,6 +436,7 @@ #size-cells = <0>; clocks = <&clock 283>, <&clock 142>; clock-names = "biu", "ciu"; + fifo-depth = <0x80>; status = "disabled"; }; From c8149df0f3bad21c27fb6289e5408e8c7ff9c817 Mon Sep 17 00:00:00 2001 From: Yuvaraj Kumar C D Date: Mon, 21 Oct 2013 05:48:16 +0900 Subject: [PATCH 04/12] ARM: dts: rename mmc dts node for exynos5 series This patch rename's the device tree mmc node's from "dwmmc" to "mmc". According to ePAPR chapter 2.2.2 generic node name recommendation, it has been opted change from dwmmc to mmc.Also this patch remove the instance index from the node name. Signed-off-by: Yuvaraj Kumar C D Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/cros5250-common.dtsi | 8 ++++---- arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++-- arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++-- arch/arm/boot/dts/exynos5250-snow.dts | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 16 ++++++++-------- 5 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index a18833dded55..03cb897465b5 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi @@ -229,7 +229,7 @@ }; }; - dwmmc0@12200000 { + mmc@12200000 { num-slots = <1>; supports-highspeed; broken-cd; @@ -246,11 +246,11 @@ }; }; - dwmmc1@12210000 { + mmc@12210000 { status = "disabled"; }; - dwmmc2@12220000 { + mmc@12220000 { num-slots = <1>; supports-highspeed; card-detect-delay = <200>; @@ -267,7 +267,7 @@ }; }; - dwmmc3@12230000 { + mmc@12230000 { num-slots = <1>; supports-highspeed; broken-cd; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 169a13a3f85a..b77a37ec81c2 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -384,7 +384,7 @@ status = "disabled"; }; - dwmmc_0: dwmmc0@12200000 { + mmc_0: mmc@12200000 { status = "okay"; num-slots = <1>; supports-highspeed; @@ -403,7 +403,7 @@ }; }; - dwmmc_2: dwmmc2@12220000 { + mmc_2: mmc@12220000 { status = "okay"; num-slots = <1>; supports-highspeed; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index ae1562f98a25..13746dfb20aa 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -140,7 +140,7 @@ }; }; - dwmmc0@12200000 { + mmc@12200000 { status = "okay"; num-slots = <1>; supports-highspeed; @@ -158,7 +158,7 @@ }; }; - dwmmc2@12220000 { + mmc@12220000 { status = "okay"; num-slots = <1>; supports-highspeed; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index fd711e245e8d..a9395c426db4 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -175,7 +175,7 @@ * On Snow we've got SIP WiFi and so can keep drive strengths low to * reduce EMI. */ - dwmmc3@12230000 { + mmc@12230000 { slot@0 { pinctrl-names = "default"; pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 0f8c0bd5ac55..b98ffc3a5fe2 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -33,10 +33,10 @@ gsc1 = &gsc_1; gsc2 = &gsc_2; gsc3 = &gsc_3; - mshc0 = &dwmmc_0; - mshc1 = &dwmmc_1; - mshc2 = &dwmmc_2; - mshc3 = &dwmmc_3; + mshc0 = &mmc_0; + mshc1 = &mmc_1; + mshc2 = &mmc_2; + mshc3 = &mmc_3; i2c0 = &i2c_0; i2c1 = &i2c_1; i2c2 = &i2c_2; @@ -392,7 +392,7 @@ pinctrl-0 = <&spi2_bus>; }; - dwmmc_0: dwmmc0@12200000 { + mmc_0: mmc@12200000 { compatible = "samsung,exynos5250-dw-mshc"; interrupts = <0 75 0>; #address-cells = <1>; @@ -404,7 +404,7 @@ status = "disabled"; }; - dwmmc_1: dwmmc1@12210000 { + mmc_1: mmc@12210000 { compatible = "samsung,exynos5250-dw-mshc"; interrupts = <0 76 0>; #address-cells = <1>; @@ -416,7 +416,7 @@ status = "disabled"; }; - dwmmc_2: dwmmc2@12220000 { + mmc_2: mmc@12220000 { compatible = "samsung,exynos5250-dw-mshc"; interrupts = <0 77 0>; #address-cells = <1>; @@ -428,7 +428,7 @@ status = "disabled"; }; - dwmmc_3: dwmmc3@12230000 { + mmc_3: mmc@12230000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12230000 0x1000>; interrupts = <0 78 0>; From 0e2c5915911253bf92eca5a228da4535934b6c58 Mon Sep 17 00:00:00 2001 From: Yuvaraj Kumar C D Date: Mon, 21 Oct 2013 05:57:00 +0900 Subject: [PATCH 05/12] ARM: dts: Add dwmmc DT nodes for exynos5420 SOC This patch adds the mmc device tree node entries for exynos5420 SOC. Exynos5420 has a different version of DWMMC controller,so a new compatible string is used to distinguish it from the prior SOC's. Signed-off-by: Yuvaraj Kumar C D Signed-off-by: Kukjin Kim --- .../bindings/mmc/exynos-dw-mshc.txt | 2 + arch/arm/boot/dts/exynos5420-smdk5420.dts | 33 ++++++++++++++++ arch/arm/boot/dts/exynos5420.dtsi | 39 +++++++++++++++++++ 3 files changed, 74 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt index c67b975c8906..532b1d440abc 100644 --- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt @@ -16,6 +16,8 @@ Required Properties: specific extensions. - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 specific extensions. + - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 + specific extensions. * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface unit (ciu) clock. This property is applicable only for Exynos5 SoC's and diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index 79524c74c603..fb5a1e25c632 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -31,6 +31,39 @@ }; }; + mmc@12200000 { + status = "okay"; + broken-cd; + supports-highspeed; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; + }; + + mmc@12220000 { + status = "okay"; + supports-highspeed; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; + dp-controller@145B0000 { pinctrl-names = "default"; pinctrl-0 = <&dp_hpd>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 09aa06cb3d3a..3ac3afe0c609 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -22,6 +22,9 @@ compatible = "samsung,exynos5420"; aliases { + mshc0 = &mmc_0; + mshc1 = &mmc_1; + mshc2 = &mmc_2; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; @@ -88,6 +91,42 @@ clock-names = "mfc"; }; + mmc_0: mmc@12200000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + interrupts = <0 75 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12200000 0x2000>; + clocks = <&clock 351>, <&clock 132>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc_1: mmc@12210000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + interrupts = <0 76 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12210000 0x2000>; + clocks = <&clock 352>, <&clock 133>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc_2: mmc@12220000 { + compatible = "samsung,exynos5420-dw-mshc"; + interrupts = <0 77 0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12220000 0x1000>; + clocks = <&clock 353>, <&clock 134>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + mct@101C0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; From 01eb46364104925e6f3e66e05203882a519f2c79 Mon Sep 17 00:00:00 2001 From: Leela Krishna Amudala Date: Mon, 21 Oct 2013 05:59:06 +0900 Subject: [PATCH 06/12] ARM: dts: Add device nodes for GScaler blocks for exynos5420 Adds G-Scaler device nodes to the DT device list Signed-off-by: Leela Krishna Amudala Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 3ac3afe0c609..6ffefd163fa0 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -34,6 +34,8 @@ i2c1 = &i2c_1; i2c2 = &i2c_2; i2c3 = &i2c_3; + gsc0 = &gsc_0; + gsc1 = &gsc_1; }; cpus { @@ -349,4 +351,22 @@ clocks = <&clock 431>, <&clock 143>; clock-names = "mixer", "sclk_hdmi"; }; + + gsc_0: video-scaler@13e00000 { + compatible = "samsung,exynos5-gsc"; + reg = <0x13e00000 0x1000>; + interrupts = <0 85 0>; + clocks = <&clock 465>; + clock-names = "gscl"; + samsung,power-domain = <&gsc_pd>; + }; + + gsc_1: video-scaler@13e10000 { + compatible = "samsung,exynos5-gsc"; + reg = <0x13e10000 0x1000>; + interrupts = <0 86 0>; + clocks = <&clock 466>; + clock-names = "gscl"; + samsung,power-domain = <&gsc_pd>; + }; }; From 6c16dedfd4c49c6a7f410f171c6da3116834a23d Mon Sep 17 00:00:00 2001 From: Chander Kashyap Date: Mon, 2 Dec 2013 07:48:23 +0900 Subject: [PATCH 07/12] clocksource: mct: extend mct to support 8 local interrupts for Exynos5420 Exynos5420 is octa-core SoC from Samsung. Hence extend exynos-mct clocksource driver to support 8 local interrupts. Also extend dts entries for 8 interrupts. Signed-off-by: Chander Kashyap Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 9 +++++++-- drivers/clocksource/exynos_mct.c | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 6ffefd163fa0..f909d82bc453 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -135,7 +135,8 @@ interrupt-controller; #interrups-cells = <1>; interrupt-parent = <&mct_map>; - interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; + interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, + <8>, <9>, <10>, <11>; clocks = <&clock 1>, <&clock 315>; clock-names = "fin_pll", "mct"; @@ -150,7 +151,11 @@ <4 &gic 0 120 0>, <5 &gic 0 121 0>, <6 &gic 0 122 0>, - <7 &gic 0 123 0>; + <7 &gic 0 123 0>, + <8 &gic 0 128 0>, + <9 &gic 0 129 0>, + <10 &gic 0 130 0>, + <11 &gic 0 131 0>; }; }; diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 62b0de6a1837..48f76bc05da0 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -71,6 +71,10 @@ enum { MCT_L1_IRQ, MCT_L2_IRQ, MCT_L3_IRQ, + MCT_L4_IRQ, + MCT_L5_IRQ, + MCT_L6_IRQ, + MCT_L7_IRQ, MCT_NR_IRQS, }; From 1c0e085444dd8adfd93945f693f11fa43b215603 Mon Sep 17 00:00:00 2001 From: Chander Kashyap Date: Mon, 2 Dec 2013 07:49:59 +0900 Subject: [PATCH 08/12] ARM: dts: populate cpu node entries to 8 cpus for exynos5420 Exynos5420 is octa-core SoC from Samsung. Hence populate all the CPU node entries. Signed-off-by: Chander Kashyap Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index f909d82bc453..b1fa334ec6d7 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -69,6 +69,34 @@ reg = <0x3>; clock-frequency = <1800000000>; }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + clock-frequency = <1000000000>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + clock-frequency = <1000000000>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + clock-frequency = <1000000000>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + clock-frequency = <1000000000>; + }; }; clock: clock-controller@10010000 { From bb28205adeb835f6cd0cdd78d0d03083bdd97c02 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Thu, 12 Dec 2013 06:51:39 +0900 Subject: [PATCH 09/12] ARM: dts: Update min voltage for vdd_arm on Arndale The minimum recommended ARM voltage for Exynos5250 at 200MHz on Arndale board is 0.9125V. Update accordingly. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-arndale.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b77a37ec81c2..9322652440d9 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -266,7 +266,7 @@ buck2_reg: BUCK2 { regulator-name = "vdd_arm"; - regulator-min-microvolt = <925000>; + regulator-min-microvolt = <912500>; regulator-max-microvolt = <1300000>; regulator-always-on; regulator-boot-on; From 1a9110d6ddaa4e4533b71ed178b1e1e8b894ab91 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Thu, 12 Dec 2013 07:01:11 +0900 Subject: [PATCH 10/12] ARM: dts: Add hs-i2c nodes to exynos5420 Added high speed I2C nodes to Exynos5420 DT file. Signed-off-by: Sachin Kamat Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 98 +++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index b1fa334ec6d7..76f4e0bed039 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -34,6 +34,13 @@ i2c1 = &i2c_1; i2c2 = &i2c_2; i2c3 = &i2c_3; + i2c4 = &hsi2c_4; + i2c5 = &hsi2c_5; + i2c6 = &hsi2c_6; + i2c7 = &hsi2c_7; + i2c8 = &hsi2c_8; + i2c9 = &hsi2c_9; + i2c10 = &hsi2c_10; gsc0 = &gsc_0; gsc1 = &gsc_1; }; @@ -366,6 +373,97 @@ status = "disabled"; }; + hsi2c_4: i2c@12CA0000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12CA0000 0x1000>; + interrupts = <0 60 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_hs_bus>; + clocks = <&clock 265>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_5: i2c@12CB0000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12CB0000 0x1000>; + interrupts = <0 61 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_hs_bus>; + clocks = <&clock 266>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_6: i2c@12CC0000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12CC0000 0x1000>; + interrupts = <0 62 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_hs_bus>; + clocks = <&clock 267>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_7: i2c@12CD0000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12CD0000 0x1000>; + interrupts = <0 63 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_hs_bus>; + clocks = <&clock 268>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_8: i2c@12E00000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12E00000 0x1000>; + interrupts = <0 87 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_hs_bus>; + clocks = <&clock 281>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_9: i2c@12E10000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12E10000 0x1000>; + interrupts = <0 88 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c9_hs_bus>; + clocks = <&clock 282>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_10: i2c@12E20000 { + compatible = "samsung,exynos5-hsi2c"; + reg = <0x12E20000 0x1000>; + interrupts = <0 203 0>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c10_hs_bus>; + clocks = <&clock 283>; + clock-names = "hsi2c"; + status = "disabled"; + }; + hdmi@14530000 { compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; From 9f052d0c5fcabbe4ece6cf166502127d2a0b8c5c Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Thu, 12 Dec 2013 07:39:18 +0900 Subject: [PATCH 11/12] ARM: dts: Fix sysreg node name in exynos4.dtsi Fix the name as per DT node naming convention. - rename the node to syscon which is a more generic name. - append the register value to the node name. Signed-off-by: Sachin Kamat Reviewed-by: Tomasz Figa Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index a73eeb5f258f..c2a99645394e 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -99,7 +99,7 @@ reg = <0x10440000 0x1000>; }; - sys_reg: sysreg { + sys_reg: syscon@10010000 { compatible = "samsung,exynos4-sysreg", "syscon"; reg = <0x10010000 0x400>; }; From e0b51c2eae8ebf10d80530b7a306818252206325 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Thu, 12 Dec 2013 07:39:27 +0900 Subject: [PATCH 12/12] ARM: dts: Update Samsung sysreg binding document Added a binding example for reference and updated the node name. While at it also removed the name description as it is not necessary. Signed-off-by: Sachin Kamat Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- Documentation/devicetree/bindings/arm/samsung/sysreg.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt b/Documentation/devicetree/bindings/arm/samsung/sysreg.txt index 5039c0a12f55..0ab3251a6ec2 100644 --- a/Documentation/devicetree/bindings/arm/samsung/sysreg.txt +++ b/Documentation/devicetree/bindings/arm/samsung/sysreg.txt @@ -1,7 +1,12 @@ SAMSUNG S5P/Exynos SoC series System Registers (SYSREG) Properties: - - name : should be 'sysreg'; - compatible : should contain "samsung,-sysreg", "syscon"; For Exynos4 SoC series it should be "samsung,exynos4-sysreg", "syscon"; - reg : offset and length of the register set. + +Example: + syscon@10010000 { + compatible = "samsung,exynos4-sysreg", "syscon"; + reg = <0x10010000 0x400>; + };