From 2678899586183f63e64587d53233b5ee0207df51 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Tue, 16 Nov 2010 09:41:07 +0000 Subject: [PATCH] --- yaml --- r: 228454 b: refs/heads/master c: 84e97c1014a2afe1a07beb1b6de5f2d867b368fd h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/blackfin/mach-bf561/include/mach/anomaly.h | 6 +++++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 766098612505..630c74e01214 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 503f3d30c6f29c58fce77bfe47b04e3c667e7640 +refs/heads/master: 84e97c1014a2afe1a07beb1b6de5f2d867b368fd diff --git a/trunk/arch/blackfin/mach-bf561/include/mach/anomaly.h b/trunk/arch/blackfin/mach-bf561/include/mach/anomaly.h index 4c108c99cb6e..6a3499b02097 100644 --- a/trunk/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/trunk/arch/blackfin/mach-bf561/include/mach/anomaly.h @@ -181,7 +181,11 @@ /* Incorrect Timer Pulse Width in Single-Shot PWM_OUT Mode with External Clock */ #define ANOMALY_05000254 (__SILICON_REVISION__ > 3) /* Interrupt/Exception During Short Hardware Loop May Cause Bad Instruction Fetches */ -#define ANOMALY_05000257 (__SILICON_REVISION__ < 5) +/* Tempoary work around for kgdb bug 6333 in SMP kernel. It looks coreb hangs in exception + * without handling anomaly 05000257 properly on bf561 v0.5. This work around may change + * after the behavior and the root cause are confirmed with hardware team. + */ +#define ANOMALY_05000257 (__SILICON_REVISION__ < 5 || (__SILICON_REVISION__ == 5 && CONFIG_SMP)) /* Instruction Cache Is Corrupted When Bits 9 and 12 of the ICPLB Data Registers Differ */ #define ANOMALY_05000258 (__SILICON_REVISION__ < 5) /* ICPLB_STATUS MMR Register May Be Corrupted */