From 26817ac8af32c3a08bfb968d544b06b64f625459 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime.ripard@free-electrons.com>
Date: Mon, 10 Sep 2012 22:35:40 +0200
Subject: [PATCH] --- yaml --- r: 328459 b: refs/heads/master c:
 a7ff477bb7e5ec9536e8aac02e8856a4bcc595a3 h: refs/heads/master i:   328457:
 cc755ea7f1516eb11fb20cac1a3327d78ce1e294   328455:
 675bd7b72245f28f4cf96a5304bf3707b69834f4 v: v3

---
 [refs]                                        |  2 +-
 .../devicetree/bindings/gpio/gpio-74x164.txt  | 22 +++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 trunk/Documentation/devicetree/bindings/gpio/gpio-74x164.txt

diff --git a/[refs] b/[refs]
index f208cdc8bd26..fea35187a86c 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4485a12937c936a5973601bb9921d30a0630299d
+refs/heads/master: a7ff477bb7e5ec9536e8aac02e8856a4bcc595a3
diff --git a/trunk/Documentation/devicetree/bindings/gpio/gpio-74x164.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio-74x164.txt
new file mode 100644
index 000000000000..cc2608021f26
--- /dev/null
+++ b/trunk/Documentation/devicetree/bindings/gpio/gpio-74x164.txt
@@ -0,0 +1,22 @@
+* Generic 8-bits shift register GPIO driver
+
+Required properties:
+- compatible : Should be "fairchild,74hc595"
+- reg : chip select number
+- gpio-controller : Marks the device node as a gpio controller.
+- #gpio-cells : Should be two.  The first cell is the pin number and
+  the second cell is used to specify the gpio polarity:
+      0 = active high
+      1 = active low
+- registers-number: Number of daisy-chained shift registers
+
+Example:
+
+gpio5: gpio5@0 {
+	compatible = "fairchild,74hc595";
+	reg = <0>;
+	gpio-controller;
+	#gpio-cells = <2>;
+	registers-number = <4>;
+	spi-max-frequency = <100000>;
+};