From 26e025d2572d74265832b1667441422e3fcf2c6d Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 28 Sep 2005 15:15:16 -0600 Subject: [PATCH] --- yaml --- r: 10668 b: refs/heads/master c: c8920f0c8b3b42537ab4a54ff92c11daf48fdfec h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/hotplug/cpcihp_zt5550.c | 25 +++++++++++++++++++---- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 44a90802b685..50358f9b536d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d3535fbbce0eef8faa8de30d187fc83b11b858ef +refs/heads/master: c8920f0c8b3b42537ab4a54ff92c11daf48fdfec diff --git a/trunk/drivers/pci/hotplug/cpcihp_zt5550.c b/trunk/drivers/pci/hotplug/cpcihp_zt5550.c index e9928024be78..790abadd816c 100644 --- a/trunk/drivers/pci/hotplug/cpcihp_zt5550.c +++ b/trunk/drivers/pci/hotplug/cpcihp_zt5550.c @@ -78,11 +78,20 @@ static void __iomem *csr_int_mask; static int zt5550_hc_config(struct pci_dev *pdev) { + int ret; + /* Since we know that no boards exist with two HC chips, treat it as an error */ if(hc_dev) { err("too many host controller devices?"); return -EBUSY; } + + ret = pci_enable_device(pdev); + if(ret) { + err("cannot enable %s\n", pci_name(pdev)); + return ret; + } + hc_dev = pdev; dbg("hc_dev = %p", hc_dev); dbg("pci resource start %lx", pci_resource_start(hc_dev, 1)); @@ -91,7 +100,8 @@ static int zt5550_hc_config(struct pci_dev *pdev) if(!request_mem_region(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1), MY_NAME)) { err("cannot reserve MMIO region"); - return -ENOMEM; + ret = -ENOMEM; + goto exit_disable_device; } hc_registers = @@ -99,9 +109,8 @@ static int zt5550_hc_config(struct pci_dev *pdev) if(!hc_registers) { err("cannot remap MMIO region %lx @ %lx", pci_resource_len(hc_dev, 1), pci_resource_start(hc_dev, 1)); - release_mem_region(pci_resource_start(hc_dev, 1), - pci_resource_len(hc_dev, 1)); - return -ENODEV; + ret = -ENODEV; + goto exit_release_region; } csr_hc_index = hc_registers + CSR_HCINDEX; @@ -124,6 +133,13 @@ static int zt5550_hc_config(struct pci_dev *pdev) writeb((u8) ALL_DIRECT_INTS_MASK, csr_int_mask); dbg("disabled timer0, timer1 and ENUM interrupts"); return 0; + +exit_release_region: + release_mem_region(pci_resource_start(hc_dev, 1), + pci_resource_len(hc_dev, 1)); +exit_disable_device: + pci_disable_device(hc_dev); + return ret; } static int zt5550_hc_cleanup(void) @@ -134,6 +150,7 @@ static int zt5550_hc_cleanup(void) iounmap(hc_registers); release_mem_region(pci_resource_start(hc_dev, 1), pci_resource_len(hc_dev, 1)); + pci_disable_device(hc_dev); return 0; }