From 27fd11d3de13c3a54f7fa45a490a72539f4add24 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 7 May 2010 02:55:33 -0700 Subject: [PATCH] --- yaml --- r: 194814 b: refs/heads/master c: e0e33280fedcfa9dd70a54085c4d44d9d53b788f h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/microblaze/include/asm/system.h | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 61c229e9b488..f85ee8bf204b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a33fa66bcf365ffe5b79d1ae1d3582cc261ae56e +refs/heads/master: e0e33280fedcfa9dd70a54085c4d44d9d53b788f diff --git a/trunk/arch/microblaze/include/asm/system.h b/trunk/arch/microblaze/include/asm/system.h index b1e2f0710098..48c4f0335e3f 100644 --- a/trunk/arch/microblaze/include/asm/system.h +++ b/trunk/arch/microblaze/include/asm/system.h @@ -97,4 +97,14 @@ extern struct dentry *of_debugfs_root; #define arch_align_stack(x) (x) +/* + * MicroBlaze doesn't handle unaligned accesses in hardware. + * + * Based on this we force the IP header alignment in network drivers. + * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining + * cacheline alignment of buffers. + */ +#define NET_IP_ALIGN 2 +#define NET_SKB_PAD L1_CACHE_BYTES + #endif /* _ASM_MICROBLAZE_SYSTEM_H */