From 283fc4a85d31956ef8a058d765769fa20a51363a Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 20 Apr 2012 17:22:11 +0100 Subject: [PATCH] --- yaml --- r: 299871 b: refs/heads/master c: ab4d536890853ab6675ede65db40e2c0980cb0ea h: refs/heads/master i: 299869: c613d87568ca8f9e107af189fcb21a42893b0804 299867: 5751628be3ceb568a1d37963742f7390f179624b 299863: 442865367b6efa93748aeaed2060e5eb317fa094 299855: cd231b8ef38c40648c1633258f002ba735c622e6 299839: 33e819c23a640609ed5e30556ac2a5864d3c439c v: v3 --- [refs] | 2 +- trunk/arch/arm/mm/cache-l2x0.c | 13 ++++++++----- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 324252cdd06a..c727df5b324a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f154fe9b806574437b47f08e924ad10c0e240b23 +refs/heads/master: ab4d536890853ab6675ede65db40e2c0980cb0ea diff --git a/trunk/arch/arm/mm/cache-l2x0.c b/trunk/arch/arm/mm/cache-l2x0.c index a8d02c048a1f..2a8e380501e8 100644 --- a/trunk/arch/arm/mm/cache-l2x0.c +++ b/trunk/arch/arm/mm/cache-l2x0.c @@ -81,10 +81,13 @@ static inline void l2x0_inv_line(unsigned long addr) } #if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915) +static inline void debug_writel(unsigned long val) +{ + if (outer_cache.set_debug) + outer_cache.set_debug(val); +} -#define debug_writel(val) outer_cache.set_debug(val) - -static void l2x0_set_debug(unsigned long val) +static void pl310_set_debug(unsigned long val) { writel_relaxed(val, l2x0_base + L2X0_DEBUG_CTRL); } @@ -94,7 +97,7 @@ static inline void debug_writel(unsigned long val) { } -#define l2x0_set_debug NULL +#define pl310_set_debug NULL #endif #ifdef CONFIG_PL310_ERRATA_588369 @@ -331,6 +334,7 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) /* Unmapped register. */ sync_reg_offset = L2X0_DUMMY_REG; #endif + outer_cache.set_debug = pl310_set_debug; break; case L2X0_CACHE_ID_PART_L210: ways = (aux >> 13) & 0xf; @@ -379,7 +383,6 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask) outer_cache.flush_all = l2x0_flush_all; outer_cache.inv_all = l2x0_inv_all; outer_cache.disable = l2x0_disable; - outer_cache.set_debug = l2x0_set_debug; printk(KERN_INFO "%s cache controller enabled\n", type); printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",