From 28a6bbc34936113901618a70c800aad5c7678438 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 6 Jul 2012 21:09:33 +0200 Subject: [PATCH] --- yaml --- r: 313254 b: refs/heads/master c: 3858f8f91a3dc846ed053579c2a1204bc5d0f18e h: refs/heads/master v: v3 --- [refs] | 2 +- .../devicetree/bindings/arm/olimex.txt | 6 + .../devicetree/bindings/fb/mxsfb.txt | 19 ++ .../devicetree/bindings/rtc/stmp3xxx-rtc.txt | 16 ++ .../bindings/tty/serial/fsl-mxs-auart.txt | 27 ++ trunk/arch/arm/Kconfig | 4 +- trunk/arch/arm/boot/dts/cfa10036.dts | 52 ++++ trunk/arch/arm/boot/dts/ea3250.dts | 174 ++++++++++++ trunk/arch/arm/boot/dts/imx23-evk.dts | 66 ++++- trunk/arch/arm/boot/dts/imx23-olinuxino.dts | 44 +++ trunk/arch/arm/boot/dts/imx23.dtsi | 169 ++++++++++- trunk/arch/arm/boot/dts/imx28-evk.dts | 100 +++++++ trunk/arch/arm/boot/dts/imx28.dtsi | 267 ++++++++++++++++-- trunk/arch/arm/boot/dts/lpc32xx.dtsi | 74 +++-- trunk/arch/arm/boot/dts/phy3250.dts | 61 ++++ trunk/arch/arm/configs/lpc32xx_defconfig | 24 +- trunk/arch/arm/mach-lpc32xx/Kconfig | 32 --- trunk/arch/arm/mach-lpc32xx/Makefile.boot | 1 + trunk/arch/arm/mach-lpc32xx/clock.c | 21 +- .../arch/arm/mach-lpc32xx/include/mach/gpio.h | 2 - trunk/arch/arm/mach-lpc32xx/phy3250.c | 158 +++++------ trunk/arch/arm/mach-lpc32xx/serial.c | 90 +----- trunk/arch/arm/mach-mxs/Kconfig | 1 + trunk/arch/arm/mach-mxs/devices-mx23.h | 2 +- trunk/arch/arm/mach-mxs/devices-mx28.h | 2 +- .../arm/mach-mxs/devices/platform-mxsfb.c | 2 +- trunk/arch/arm/mach-mxs/mach-mxs.c | 128 ++++++++- trunk/arch/arm/mach-nomadik/Makefile | 2 - trunk/arch/arm/mach-nomadik/board-nhk8815.c | 67 ++++- trunk/arch/arm/mach-nomadik/clock.c | 75 ----- trunk/arch/arm/mach-nomadik/clock.h | 15 - trunk/arch/arm/mach-nomadik/cpu-8815.c | 126 ++++----- trunk/arch/arm/mach-nomadik/i2c-8815nhk.c | 38 ++- .../arch/arm/mach-nomadik/include/mach/irqs.h | 85 +++--- trunk/drivers/clk/Makefile | 1 + trunk/drivers/clk/clk-nomadik.c | 47 +++ trunk/drivers/rtc/rtc-stmp3xxx.c | 8 + trunk/drivers/tty/serial/mxs-auart.c | 42 ++- trunk/drivers/video/mxsfb.c | 62 +++- .../include/mach => include/linux}/mxsfb.h | 6 +- .../include/linux/platform_data/clk-nomadik.h | 2 + 41 files changed, 1577 insertions(+), 543 deletions(-) create mode 100644 trunk/Documentation/devicetree/bindings/arm/olimex.txt create mode 100644 trunk/Documentation/devicetree/bindings/fb/mxsfb.txt create mode 100644 trunk/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt create mode 100644 trunk/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt create mode 100644 trunk/arch/arm/boot/dts/cfa10036.dts create mode 100644 trunk/arch/arm/boot/dts/ea3250.dts create mode 100644 trunk/arch/arm/boot/dts/imx23-olinuxino.dts delete mode 100644 trunk/arch/arm/mach-lpc32xx/Kconfig delete mode 100644 trunk/arch/arm/mach-nomadik/clock.c delete mode 100644 trunk/arch/arm/mach-nomadik/clock.h create mode 100644 trunk/drivers/clk/clk-nomadik.c rename trunk/{arch/arm/mach-mxs/include/mach => include/linux}/mxsfb.h (95%) create mode 100644 trunk/include/linux/platform_data/clk-nomadik.h diff --git a/[refs] b/[refs] index a0709ba7c397..8a52b499e658 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 77ac32ad2b03baa7638aadda1650200287ca6f5d +refs/heads/master: 3858f8f91a3dc846ed053579c2a1204bc5d0f18e diff --git a/trunk/Documentation/devicetree/bindings/arm/olimex.txt b/trunk/Documentation/devicetree/bindings/arm/olimex.txt new file mode 100644 index 000000000000..007fb5c685a1 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/arm/olimex.txt @@ -0,0 +1,6 @@ +Olimex i.MX Platforms Device Tree Bindings +------------------------------------------ + +i.MX23 Olinuxino Low Cost Board +Required root node properties: + - compatible = "olimex,imx23-olinuxino", "fsl,imx23"; diff --git a/trunk/Documentation/devicetree/bindings/fb/mxsfb.txt b/trunk/Documentation/devicetree/bindings/fb/mxsfb.txt new file mode 100644 index 000000000000..b41e5e52a676 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/fb/mxsfb.txt @@ -0,0 +1,19 @@ +* Freescale MXS LCD Interface (LCDIF) + +Required properties: +- compatible: Should be "fsl,-lcdif". Supported chips include + imx23 and imx28. +- reg: Address and length of the register set for lcdif +- interrupts: Should contain lcdif interrupts + +Optional properties: +- panel-enable-gpios : Should specify the gpio for panel enable + +Examples: + +lcdif@80030000 { + compatible = "fsl,imx28-lcdif"; + reg = <0x80030000 2000>; + interrupts = <38 86>; + panel-enable-gpios = <&gpio3 30 0>; +}; diff --git a/trunk/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt b/trunk/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt new file mode 100644 index 000000000000..b800070fe6e9 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/rtc/stmp3xxx-rtc.txt @@ -0,0 +1,16 @@ +* STMP3xxx/i.MX28 Time Clock controller + +Required properties: +- compatible: should be one of the following. + * "fsl,stmp3xxx-rtc" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: rtc alarm interrupt + +Example: + +rtc@80056000 { + compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; + reg = <0x80056000 2000>; + interrupts = <29>; +}; diff --git a/trunk/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt b/trunk/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt new file mode 100644 index 000000000000..2ee903fad25c --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/tty/serial/fsl-mxs-auart.txt @@ -0,0 +1,27 @@ +* Freescale MXS Application UART (AUART) + +Required properties: +- compatible : Should be "fsl,-auart". The supported SoCs include + imx23 and imx28. +- reg : Address and length of the register set for the device +- interrupts : Should contain the auart interrupt numbers + +Example: +auart0: serial@8006a000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; + reg = <0x8006a000 0x2000>; + interrupts = <112 70 71>; +}; + +Note: Each auart port should have an alias correctly numbered in "aliases" +node. + +Example: + +aliases { + serial0 = &auart0; + serial1 = &auart1; + serial2 = &auart2; + serial3 = &auart3; + serial4 = &auart4; +}; diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index a91009c61870..8b0b743b4fb1 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -913,7 +913,7 @@ config ARCH_NOMADIK select ARM_AMBA select ARM_VIC select CPU_ARM926T - select CLKDEV_LOOKUP + select COMMON_CLK select GENERIC_CLOCKEVENTS select PINCTRL select MIGHT_HAVE_CACHE_L2X0 @@ -1021,8 +1021,6 @@ source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-ks8695/Kconfig" -source "arch/arm/mach-lpc32xx/Kconfig" - source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" diff --git a/trunk/arch/arm/boot/dts/cfa10036.dts b/trunk/arch/arm/boot/dts/cfa10036.dts new file mode 100644 index 000000000000..c03a577beca3 --- /dev/null +++ b/trunk/arch/arm/boot/dts/cfa10036.dts @@ -0,0 +1,52 @@ +/* + * Copyright 2012 Free Electrons + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx28.dtsi" + +/ { + model = "Crystalfontz CFA-10036 Board"; + compatible = "crystalfontz,cfa10036", "fsl,imx28"; + + memory { + reg = <0x40000000 0x08000000>; + }; + + apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx28-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bit_pins_a + &mmc0_cd_cfg &mmc0_sck_cfg>; + bus-width = <4>; + status = "okay"; + }; + }; + + apbx@80040000 { + duart: serial@80074000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_b>; + status = "okay"; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + power { + gpios = <&gpio3 4 1>; + default-state = "on"; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/ea3250.dts b/trunk/arch/arm/boot/dts/ea3250.dts new file mode 100644 index 000000000000..d79b28d9c963 --- /dev/null +++ b/trunk/arch/arm/boot/dts/ea3250.dts @@ -0,0 +1,174 @@ +/* + * Embedded Artists LPC3250 board + * + * Copyright 2012 Roland Stigge + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "lpc32xx.dtsi" + +/ { + model = "Embedded Artists LPC3250 board based on NXP LPC3250"; + compatible = "ea,ea3250", "nxp,lpc3250"; + #address-cells = <1>; + #size-cells = <1>; + + memory { + device_type = "memory"; + reg = <0 0x4000000>; + }; + + ahb { + mac: ethernet@31060000 { + phy-mode = "rmii"; + use-iram; + }; + + /* Here, choose exactly one from: ohci, usbd */ + ohci@31020000 { + transceiver = <&isp1301>; + status = "okay"; + }; + +/* + usbd@31020000 { + transceiver = <&isp1301>; + status = "okay"; + }; +*/ + + /* 128MB Flash via SLC NAND controller */ + slc: flash@20020000 { + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + nxp,wdr-clks = <14>; + nxp,wwidth = <260000000>; + nxp,whold = <104000000>; + nxp,wsetup = <200000000>; + nxp,rdr-clks = <14>; + nxp,rwidth = <34666666>; + nxp,rhold = <104000000>; + nxp,rsetup = <200000000>; + nand-on-flash-bbt; + gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ + + mtd0@00000000 { + label = "ea3250-boot"; + reg = <0x00000000 0x00080000>; + read-only; + }; + + mtd1@00080000 { + label = "ea3250-uboot"; + reg = <0x00080000 0x000c0000>; + read-only; + }; + + mtd2@00140000 { + label = "ea3250-kernel"; + reg = <0x00140000 0x00400000>; + }; + + mtd3@00540000 { + label = "ea3250-rootfs"; + reg = <0x00540000 0x07ac0000>; + }; + }; + + apb { + uart5: serial@40090000 { + status = "okay"; + }; + + uart3: serial@40080000 { + status = "okay"; + }; + + uart6: serial@40098000 { + status = "okay"; + }; + + i2c1: i2c@400A0000 { + clock-frequency = <100000>; + + eeprom@50 { + compatible = "at,24c256"; + reg = <0x50>; + }; + + eeprom@57 { + compatible = "at,24c64"; + reg = <0x57>; + }; + + uda1380: uda1380@18 { + compatible = "nxp,uda1380"; + reg = <0x18>; + power-gpio = <&gpio 0x59 0>; + reset-gpio = <&gpio 0x51 0>; + dac-clk = "wspll"; + }; + + pca9532: pca9532@60 { + compatible = "nxp,pca9532"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x60>; + }; + }; + + i2c2: i2c@400A8000 { + clock-frequency = <100000>; + }; + + i2cusb: i2c@31020300 { + clock-frequency = <100000>; + + isp1301: usb-transceiver@2d { + compatible = "nxp,isp1301"; + reg = <0x2d>; + }; + }; + + sd@20098000 { + wp-gpios = <&pca9532 5 0>; + cd-gpios = <&pca9532 4 0>; + cd-inverted; + bus-width = <4>; + status = "okay"; + }; + }; + + fab { + uart1: serial@40014000 { + status = "okay"; + }; + + /* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */ + adc@40048000 { + status = "okay"; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + button@21 { + label = "GPIO Key UP"; + linux,code = <103>; + gpios = <&gpio 4 1 0>; /* GPI_P3 1 */ + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx23-evk.dts b/trunk/arch/arm/boot/dts/imx23-evk.dts index 70bffa929b65..e3486f486b40 100644 --- a/trunk/arch/arm/boot/dts/imx23-evk.dts +++ b/trunk/arch/arm/boot/dts/imx23-evk.dts @@ -22,17 +22,60 @@ apb@80000000 { apbh@80000000 { + gpmi-nand@8000c000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpmi_pins_a &gpmi_pins_fixup>; + status = "okay"; + }; + ssp0: ssp@80010000 { compatible = "fsl,imx23-mmc"; pinctrl-names = "default"; - pinctrl-0 = <&mmc0_8bit_pins_a &mmc0_pins_fixup>; - bus-width = <8>; + pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; + bus-width = <4>; wp-gpios = <&gpio1 30 0>; + vmmc-supply = <®_vddio_sd0>; + status = "okay"; + }; + + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_a>; + + hog_pins_a: hog-gpios@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1123 /* MX23_PAD_LCD_RESET__GPIO_1_18 */ + 0x11d3 /* MX23_PAD_PWM3__GPIO_1_29 */ + 0x11e3 /* MX23_PAD_PWM4__GPIO_1_30 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + + lcdif@80030000 { + pinctrl-names = "default"; + pinctrl-0 = <&lcdif_24bit_pins_a>; + panel-enable-gpios = <&gpio1 18 0>; status = "okay"; }; }; apbx@80040000 { + pwm: pwm@80064000 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_pins_a>; + status = "okay"; + }; + + auart0: serial@8006c000 { + pinctrl-names = "default"; + pinctrl-0 = <&auart0_pins_a>; + status = "okay"; + }; + duart: serial@80070000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_a>; @@ -40,4 +83,23 @@ }; }; }; + + regulators { + compatible = "simple-bus"; + + reg_vddio_sd0: vddio-sd0 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 29 0>; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 2 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; }; diff --git a/trunk/arch/arm/boot/dts/imx23-olinuxino.dts b/trunk/arch/arm/boot/dts/imx23-olinuxino.dts new file mode 100644 index 000000000000..20912b1d8893 --- /dev/null +++ b/trunk/arch/arm/boot/dts/imx23-olinuxino.dts @@ -0,0 +1,44 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx23.dtsi" + +/ { + model = "i.MX23 Olinuxino Low Cost Board"; + compatible = "olimex,imx23-olinuxino", "fsl,imx23"; + + memory { + reg = <0x40000000 0x04000000>; + }; + + apb@80000000 { + apbh@80000000 { + ssp0: ssp@80010000 { + compatible = "fsl,imx23-mmc"; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_pins_fixup>; + bus-width = <4>; + status = "okay"; + }; + }; + + apbx@80040000 { + duart: serial@80070000 { + pinctrl-names = "default"; + pinctrl-0 = <&duart_pins_a>; + status = "okay"; + }; + }; + }; +}; diff --git a/trunk/arch/arm/boot/dts/imx23.dtsi b/trunk/arch/arm/boot/dts/imx23.dtsi index 8c5f9994f3fc..a874dbfb5ae6 100644 --- a/trunk/arch/arm/boot/dts/imx23.dtsi +++ b/trunk/arch/arm/boot/dts/imx23.dtsi @@ -18,6 +18,8 @@ gpio0 = &gpio0; gpio1 = &gpio1; gpio2 = &gpio2; + serial0 = &auart0; + serial1 = &auart1; }; cpus { @@ -57,13 +59,15 @@ status = "disabled"; }; - bch@8000a000 { - reg = <0x8000a000 2000>; - status = "disabled"; - }; - - gpmi@8000c000 { - reg = <0x8000c000 2000>; + gpmi-nand@8000c000 { + compatible = "fsl,imx23-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x8000c000 2000>, <0x8000a000 2000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <13>, <56>; + interrupt-names = "gpmi-dma", "bch"; + fsl,gpmi-dma-channel = <4>; status = "disabled"; }; @@ -114,24 +118,151 @@ duart_pins_a: duart@0 { reg = <0>; - fsl,pinmux-ids = <0x11a2 0x11b2>; + fsl,pinmux-ids = < + 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ + 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + auart0_pins_a: auart0@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ + 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ + 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ + 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ + >; fsl,drive-strength = <0>; fsl,voltage = <1>; fsl,pull-up = <0>; }; + gpmi_pins_a: gpmi-nand@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */ + 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */ + 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */ + 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */ + 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */ + 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */ + 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */ + 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */ + 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */ + 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */ + 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */ + 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */ + 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ + 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ + 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ + 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */ + 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + gpmi_pins_fixup: gpmi-pins-fixup { + fsl,pinmux-ids = < + 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ + 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ + 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ + >; + fsl,drive-strength = <2>; + }; + + mmc0_4bit_pins_a: mmc0-4bit@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ + 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ + 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ + 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ + 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + mmc0_8bit_pins_a: mmc0-8bit@0 { reg = <0>; - fsl,pinmux-ids = <0x2020 0x2030 0x2040 - 0x2050 0x0082 0x0092 0x00a2 - 0x00b2 0x2000 0x2010 0x2060>; + fsl,pinmux-ids = < + 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ + 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ + 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ + 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ + 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ + 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ + 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ + 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ + 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ + >; fsl,drive-strength = <1>; fsl,voltage = <1>; fsl,pull-up = <1>; }; mmc0_pins_fixup: mmc0-pins-fixup { - fsl,pinmux-ids = <0x2010 0x2060>; + fsl,pinmux-ids = < + 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ + 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ + >; + fsl,pull-up = <0>; + }; + + pwm2_pins_a: pwm2@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x11c0 /* MX23_PAD_PWM2__PWM2 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + lcdif_24bit_pins_a: lcdif-24bit@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ + 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ + 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ + 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ + 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ + 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ + 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ + 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ + 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ + 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ + 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; fsl,pull-up = <0>; }; }; @@ -172,7 +303,9 @@ }; lcdif@80030000 { + compatible = "fsl,imx23-lcdif"; reg = <0x80030000 2000>; + interrupts = <46 45>; status = "disabled"; }; @@ -242,12 +375,16 @@ }; rtc@8005c000 { + compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; reg = <0x8005c000 2000>; - status = "disabled"; + interrupts = <22>; }; - pwm@80064000 { + pwm: pwm@80064000 { + compatible = "fsl,imx23-pwm"; reg = <0x80064000 2000>; + #pwm-cells = <2>; + fsl,pwm-number = <5>; status = "disabled"; }; @@ -257,12 +394,16 @@ }; auart0: serial@8006c000 { + compatible = "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; + interrupts = <24 25 23>; status = "disabled"; }; auart1: serial@8006e000 { + compatible = "fsl,imx23-auart"; reg = <0x8006e000 0x2000>; + interrupts = <59 60 58>; status = "disabled"; }; diff --git a/trunk/arch/arm/boot/dts/imx28-evk.dts b/trunk/arch/arm/boot/dts/imx28-evk.dts index ee520a529cb4..0d8739dda1af 100644 --- a/trunk/arch/arm/boot/dts/imx28-evk.dts +++ b/trunk/arch/arm/boot/dts/imx28-evk.dts @@ -22,6 +22,12 @@ apb@80000000 { apbh@80000000 { + gpmi-nand@8000c000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; + status = "okay"; + }; + ssp0: ssp@80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default"; @@ -29,6 +35,7 @@ &mmc0_cd_cfg &mmc0_sck_cfg>; bus-width = <8>; wp-gpios = <&gpio2 12 0>; + vmmc-supply = <®_vddio_sd0>; status = "okay"; }; @@ -36,6 +43,45 @@ compatible = "fsl,imx28-mmc"; bus-width = <8>; wp-gpios = <&gpio0 28 0>; + }; + + pinctrl@80018000 { + pinctrl-names = "default"; + pinctrl-0 = <&hog_pins_a>; + + hog_pins_a: hog-gpios@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */ + 0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */ + 0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */ + 0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */ + 0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */ + 0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */ + 0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + }; + + lcdif@80030000 { + pinctrl-names = "default"; + pinctrl-0 = <&lcdif_24bit_pins_a>; + panel-enable-gpios = <&gpio3 30 0>; + status = "okay"; + }; + + can0: can@80032000 { + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins_a>; + status = "okay"; + }; + + can1: can@80034000 { + pinctrl-names = "default"; + pinctrl-0 = <&can1_pins_a>; status = "okay"; }; }; @@ -68,11 +114,29 @@ }; }; + pwm: pwm@80064000 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm2_pins_a>; + status = "okay"; + }; + duart: serial@80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_a>; status = "okay"; }; + + auart0: serial@8006a000 { + pinctrl-names = "default"; + pinctrl-0 = <&auart0_pins_a>; + status = "okay"; + }; + + auart3: serial@80070000 { + pinctrl-names = "default"; + pinctrl-0 = <&auart3_pins_a>; + status = "okay"; + }; }; }; @@ -81,6 +145,9 @@ phy-mode = "rmii"; pinctrl-names = "default"; pinctrl-0 = <&mac0_pins_a>; + phy-supply = <®_fec_3v3>; + phy-reset-gpios = <&gpio4 13 0>; + phy-reset-duration = <100>; status = "okay"; }; @@ -102,6 +169,22 @@ regulator-max-microvolt = <3300000>; regulator-always-on; }; + + reg_vddio_sd0: vddio-sd0 { + compatible = "regulator-fixed"; + regulator-name = "vddio-sd0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 28 0>; + }; + + reg_fec_3v3: fec-3v3 { + compatible = "regulator-fixed"; + regulator-name = "fec-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 15 0>; + }; }; sound { @@ -111,4 +194,21 @@ saif-controllers = <&saif0 &saif1>; audio-codec = <&sgtl5000>; }; + + leds { + compatible = "gpio-leds"; + + user { + label = "Heartbeat"; + gpios = <&gpio3 5 0>; + linux,default-trigger = "heartbeat"; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 2 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; }; diff --git a/trunk/arch/arm/boot/dts/imx28.dtsi b/trunk/arch/arm/boot/dts/imx28.dtsi index 4634cb861a59..adb5ffc2ff0d 100644 --- a/trunk/arch/arm/boot/dts/imx28.dtsi +++ b/trunk/arch/arm/boot/dts/imx28.dtsi @@ -22,6 +22,11 @@ gpio4 = &gpio4; saif0 = &saif0; saif1 = &saif1; + serial0 = &auart0; + serial1 = &auart1; + serial2 = &auart2; + serial3 = &auart3; + serial4 = &auart4; }; cpus { @@ -68,15 +73,15 @@ status = "disabled"; }; - bch@8000a000 { - reg = <0x8000a000 2000>; - interrupts = <41>; - status = "disabled"; - }; - - gpmi@8000c000 { - reg = <0x8000c000 2000>; - interrupts = <42 88>; + gpmi-nand@8000c000 { + compatible = "fsl,imx28-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x8000c000 2000>, <0x8000a000 2000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <88>, <41>; + interrupt-names = "gpmi-dma", "bch"; + fsl,gpmi-dma-channel = <4>; status = "disabled"; }; @@ -161,7 +166,82 @@ duart_pins_a: duart@0 { reg = <0>; - fsl,pinmux-ids = <0x3102 0x3112>; + fsl,pinmux-ids = < + 0x3102 /* MX28_PAD_PWM0__DUART_RX */ + 0x3112 /* MX28_PAD_PWM1__DUART_TX */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + duart_pins_b: duart@1 { + reg = <1>; + fsl,pinmux-ids = < + 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */ + 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + gpmi_pins_a: gpmi-nand@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */ + 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */ + 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */ + 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */ + 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */ + 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */ + 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */ + 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */ + 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */ + 0x0110 /* MX28_PAD_GPMI_CE1N__GPMI_CE1N */ + 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */ + 0x0150 /* MX28_PAD_GPMI_RDY1__GPMI_READY1 */ + 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ + 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ + 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */ + 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */ + 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + gpmi_status_cfg: gpmi-status-cfg { + fsl,pinmux-ids = < + 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */ + 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */ + 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */ + >; + fsl,drive-strength = <2>; + }; + + auart0_pins_a: auart0@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */ + 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */ + 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */ + 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + auart3_pins_a: auart3@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */ + 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */ + 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */ + 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */ + >; fsl,drive-strength = <0>; fsl,voltage = <1>; fsl,pull-up = <0>; @@ -169,9 +249,17 @@ mac0_pins_a: mac0@0 { reg = <0>; - fsl,pinmux-ids = <0x4000 0x4010 0x4020 - 0x4030 0x4040 0x4060 0x4070 - 0x4080 0x4100>; + fsl,pinmux-ids = < + 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */ + 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */ + 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */ + 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */ + 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */ + 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */ + 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */ + 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */ + 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */ + >; fsl,drive-strength = <1>; fsl,voltage = <1>; fsl,pull-up = <1>; @@ -179,8 +267,14 @@ mac1_pins_a: mac1@0 { reg = <0>; - fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 - 0x40e1 0x40b1 0x40c1>; + fsl,pinmux-ids = < + 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */ + 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */ + 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */ + 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */ + 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */ + 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */ + >; fsl,drive-strength = <1>; fsl,voltage = <1>; fsl,pull-up = <1>; @@ -188,28 +282,61 @@ mmc0_8bit_pins_a: mmc0-8bit@0 { reg = <0>; - fsl,pinmux-ids = <0x2000 0x2010 0x2020 - 0x2030 0x2040 0x2050 0x2060 - 0x2070 0x2080 0x2090 0x20a0>; + fsl,pinmux-ids = < + 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ + 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ + 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ + 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ + 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */ + 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */ + 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */ + 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */ + 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + mmc0_4bit_pins_a: mmc0-4bit@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ + 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ + 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ + 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ + 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ + >; fsl,drive-strength = <1>; fsl,voltage = <1>; fsl,pull-up = <1>; }; mmc0_cd_cfg: mmc0-cd-cfg { - fsl,pinmux-ids = <0x2090>; + fsl,pinmux-ids = < + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + >; fsl,pull-up = <0>; }; mmc0_sck_cfg: mmc0-sck-cfg { - fsl,pinmux-ids = <0x20a0>; + fsl,pinmux-ids = < + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ + >; fsl,drive-strength = <2>; fsl,pull-up = <0>; }; i2c0_pins_a: i2c0@0 { reg = <0>; - fsl,pinmux-ids = <0x3180 0x3190>; + fsl,pinmux-ids = < + 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */ + 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */ + >; fsl,drive-strength = <1>; fsl,voltage = <1>; fsl,pull-up = <1>; @@ -217,8 +344,12 @@ saif0_pins_a: saif0@0 { reg = <0>; - fsl,pinmux-ids = - <0x3140 0x3150 0x3160 0x3170>; + fsl,pinmux-ids = < + 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */ + 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */ + 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */ + 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */ + >; fsl,drive-strength = <2>; fsl,voltage = <1>; fsl,pull-up = <1>; @@ -226,11 +357,82 @@ saif1_pins_a: saif1@0 { reg = <0>; - fsl,pinmux-ids = <0x31a0>; + fsl,pinmux-ids = < + 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */ + >; fsl,drive-strength = <2>; fsl,voltage = <1>; fsl,pull-up = <1>; }; + + pwm2_pins_a: pwm2@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x3120 /* MX28_PAD_PWM2__PWM_2 */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + lcdif_24bit_pins_a: lcdif-24bit@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */ + 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */ + 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */ + 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */ + 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */ + 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */ + 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */ + 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */ + 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */ + 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */ + 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */ + 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */ + 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */ + 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */ + 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */ + 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */ + 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */ + 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */ + 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */ + 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */ + 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */ + 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */ + 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */ + 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */ + 0x1181 /* MX28_PAD_LCD_RD_E__LCD_VSYNC */ + 0x1191 /* MX28_PAD_LCD_WR_RWN__LCD_HSYNC */ + 0x11a1 /* MX28_PAD_LCD_RS__LCD_DOTCLK */ + 0x11b1 /* MX28_PAD_LCD_CS__LCD_ENABLE */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + can0_pins_a: can0@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */ + 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + can1_pins_a: can1@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */ + 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */ + >; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; }; digctl@8001c000 { @@ -272,18 +474,21 @@ }; lcdif@80030000 { + compatible = "fsl,imx28-lcdif"; reg = <0x80030000 2000>; interrupts = <38 86>; status = "disabled"; }; can0: can@80032000 { + compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; reg = <0x80032000 2000>; interrupts = <8>; status = "disabled"; }; can1: can@80034000 { + compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; reg = <0x80034000 2000>; interrupts = <9>; status = "disabled"; @@ -370,9 +575,9 @@ }; rtc@80056000 { + compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; reg = <0x80056000 2000>; - interrupts = <28 29>; - status = "disabled"; + interrupts = <29>; }; i2c0: i2c@80058000 { @@ -393,8 +598,11 @@ status = "disabled"; }; - pwm@80064000 { + pwm: pwm@80064000 { + compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; reg = <0x80064000 2000>; + #pwm-cells = <2>; + fsl,pwm-number = <8>; status = "disabled"; }; @@ -404,30 +612,35 @@ }; auart0: serial@8006a000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006a000 0x2000>; interrupts = <112 70 71>; status = "disabled"; }; auart1: serial@8006c000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; interrupts = <113 72 73>; status = "disabled"; }; auart2: serial@8006e000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x8006e000 0x2000>; interrupts = <114 74 75>; status = "disabled"; }; auart3: serial@80070000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80070000 0x2000>; interrupts = <115 76 77>; status = "disabled"; }; auart4: serial@80072000 { + compatible = "fsl,imx28-auart", "fsl,imx23-auart"; reg = <0x80072000 0x2000>; interrupts = <116 78 79>; status = "disabled"; diff --git a/trunk/arch/arm/boot/dts/lpc32xx.dtsi b/trunk/arch/arm/boot/dts/lpc32xx.dtsi index 3f5dad801a98..c5f37fbd33e6 100644 --- a/trunk/arch/arm/boot/dts/lpc32xx.dtsi +++ b/trunk/arch/arm/boot/dts/lpc32xx.dtsi @@ -35,13 +35,14 @@ slc: flash@20020000 { compatible = "nxp,lpc3220-slc"; reg = <0x20020000 0x1000>; - status = "disable"; + status = "disabled"; }; - mlc: flash@200B0000 { + mlc: flash@200a8000 { compatible = "nxp,lpc3220-mlc"; - reg = <0x200B0000 0x1000>; - status = "disable"; + reg = <0x200a8000 0x11000>; + interrupts = <11 0>; + status = "disabled"; }; dma@31000000 { @@ -57,21 +58,21 @@ compatible = "nxp,ohci-nxp", "usb-ohci"; reg = <0x31020000 0x300>; interrupts = <0x3b 0>; - status = "disable"; + status = "disabled"; }; usbd@31020000 { compatible = "nxp,lpc3220-udc"; reg = <0x31020000 0x300>; interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; - status = "disable"; + status = "disabled"; }; clcd@31040000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <0x0e 0>; - status = "disable"; + status = "disabled"; }; mac: ethernet@31060000 { @@ -114,9 +115,10 @@ }; sd@20098000 { - compatible = "arm,pl180", "arm,primecell"; + compatible = "arm,pl18x", "arm,primecell"; reg = <0x20098000 0x1000>; interrupts = <0x0f 0>, <0x0d 0>; + status = "disabled"; }; i2s1: i2s@2009C000 { @@ -124,24 +126,42 @@ reg = <0x2009C000 0x1000>; }; + /* UART5 first since it is the default console, ttyS0 */ + uart5: serial@40090000 { + /* actually, ns16550a w/ 64 byte fifos! */ + compatible = "nxp,lpc3220-uart"; + reg = <0x40090000 0x1000>; + interrupts = <9 0>; + clock-frequency = <13000000>; + reg-shift = <2>; + status = "disabled"; + }; + uart3: serial@40080000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-uart"; reg = <0x40080000 0x1000>; + interrupts = <7 0>; + clock-frequency = <13000000>; + reg-shift = <2>; + status = "disabled"; }; uart4: serial@40088000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-uart"; reg = <0x40088000 0x1000>; - }; - - uart5: serial@40090000 { - compatible = "nxp,serial"; - reg = <0x40090000 0x1000>; + interrupts = <8 0>; + clock-frequency = <13000000>; + reg-shift = <2>; + status = "disabled"; }; uart6: serial@40098000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-uart"; reg = <0x40098000 0x1000>; + interrupts = <10 0>; + clock-frequency = <13000000>; + reg-shift = <2>; + status = "disabled"; }; i2c1: i2c@400A0000 { @@ -192,18 +212,24 @@ }; uart1: serial@40014000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40014000 0x1000>; + interrupts = <26 0>; + status = "disabled"; }; uart2: serial@40018000 { - compatible = "nxp,serial"; + compatible = "nxp,lpc3220-hsuart"; reg = <0x40018000 0x1000>; + interrupts = <25 0>; + status = "disabled"; }; - uart7: serial@4001C000 { - compatible = "nxp,serial"; - reg = <0x4001C000 0x1000>; + uart7: serial@4001c000 { + compatible = "nxp,lpc3220-hsuart"; + reg = <0x4001c000 0x1000>; + interrupts = <24 0>; + status = "disabled"; }; rtc@40024000 { @@ -235,19 +261,21 @@ compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; - status = "disable"; + status = "disabled"; }; tsc@40048000 { compatible = "nxp,lpc3220-tsc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; - status = "disable"; + status = "disabled"; }; key@40050000 { compatible = "nxp,lpc3220-key"; reg = <0x40050000 0x1000>; + interrupts = <54 0>; + status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/phy3250.dts b/trunk/arch/arm/boot/dts/phy3250.dts index c4ff6d1a018b..802ec5b2fd00 100644 --- a/trunk/arch/arm/boot/dts/phy3250.dts +++ b/trunk/arch/arm/boot/dts/phy3250.dts @@ -54,6 +54,17 @@ #address-cells = <1>; #size-cells = <1>; + nxp,wdr-clks = <14>; + nxp,wwidth = <40000000>; + nxp,whold = <100000000>; + nxp,wsetup = <100000000>; + nxp,rdr-clks = <14>; + nxp,rwidth = <40000000>; + nxp,rhold = <66666666>; + nxp,rsetup = <100000000>; + nand-on-flash-bbt; + gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ + mtd0@00000000 { label = "phy3250-boot"; reg = <0x00000000 0x00064000>; @@ -83,6 +94,14 @@ }; apb { + uart5: serial@40090000 { + status = "okay"; + }; + + uart3: serial@40080000 { + status = "okay"; + }; + i2c1: i2c@400A0000 { clock-frequency = <100000>; @@ -114,16 +133,58 @@ }; ssp0: ssp@20084000 { + #address-cells = <1>; + #size-cells = <0>; + pl022,num-chipselects = <1>; + cs-gpios = <&gpio 3 5 0>; + eeprom: at25@0 { + pl022,hierarchy = <0>; + pl022,interface = <0>; + pl022,slave-tx-disable = <0>; + pl022,com-mode = <0>; + pl022,rx-level-trig = <1>; + pl022,tx-level-trig = <1>; + pl022,ctrl-len = <11>; + pl022,wait-state = <0>; + pl022,duplex = <0>; + + at25,byte-len = <0x8000>; + at25,addr-mode = <2>; + at25,page-size = <64>; + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <5000000>; }; }; + + sd@20098000 { + wp-gpios = <&gpio 3 0 0>; + cd-gpios = <&gpio 3 1 0>; + cd-inverted; + bus-width = <4>; + status = "okay"; + }; }; fab { + uart2: serial@40018000 { + status = "okay"; + }; + tsc@40048000 { status = "okay"; }; + + key@40050000 { + status = "okay"; + keypad,num-rows = <1>; + keypad,num-columns = <1>; + nxp,debounce-delay-ms = <3>; + nxp,scan-delay-ms = <34>; + linux,keymap = <0x00000002>; + }; }; }; diff --git a/trunk/arch/arm/configs/lpc32xx_defconfig b/trunk/arch/arm/configs/lpc32xx_defconfig index 4fa60547494a..eceed186a3c1 100644 --- a/trunk/arch/arm/configs/lpc32xx_defconfig +++ b/trunk/arch/arm/configs/lpc32xx_defconfig @@ -1,5 +1,7 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 @@ -16,8 +18,6 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_LPC32XX=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT=y CONFIG_AEABI=y CONFIG_ZBOOT_ROM_TEXT=0x0 @@ -52,13 +52,17 @@ CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y +CONFIG_MTD_M25P80=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_MUSEUM_IDS=y +CONFIG_MTD_NAND_SLC_LPC32XX=y +CONFIG_MTD_NAND_MLC_LPC32XX=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_CRYPTOLOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=1 CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y @@ -79,16 +83,22 @@ CONFIG_LPC_ENET=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_SMSC_PHY=y # CONFIG_WLAN is not set +CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=240 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320 CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_LPC32XX=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_LPC32XX=y +CONFIG_SERIO_LIBPS2=y # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_HS_LPC32XX=y +CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y @@ -96,7 +106,8 @@ CONFIG_I2C_PNX=y CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_GPIO_SYSFS=y -# CONFIG_HWMON is not set +CONFIG_SENSORS_DS620=y +CONFIG_SENSORS_MAX6639=y CONFIG_WATCHDOG=y CONFIG_PNX4008_WATCHDOG=y CONFIG_FB=y @@ -133,6 +144,8 @@ CONFIG_MMC=y CONFIG_MMC_ARMMMCI=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y +CONFIG_LEDS_PCA9532=y +CONFIG_LEDS_PCA9532_GPIO=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y @@ -146,10 +159,10 @@ CONFIG_RTC_DRV_DS1374=y CONFIG_RTC_DRV_PCF8563=y CONFIG_RTC_DRV_LPC32XX=y CONFIG_DMADEVICES=y -CONFIG_AMBA_PL08X=y CONFIG_STAGING=y -CONFIG_IIO=y CONFIG_LPC32XX_ADC=y +CONFIG_MAX517=y +CONFIG_IIO=y CONFIG_EXT2_FS=y CONFIG_AUTOFS4_FS=y CONFIG_MSDOS_FS=y @@ -159,7 +172,6 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_WBUF_VERIFY=y CONFIG_CRAMFS=y CONFIG_NFS_FS=y -CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y diff --git a/trunk/arch/arm/mach-lpc32xx/Kconfig b/trunk/arch/arm/mach-lpc32xx/Kconfig deleted file mode 100644 index e0b3eee83834..000000000000 --- a/trunk/arch/arm/mach-lpc32xx/Kconfig +++ /dev/null @@ -1,32 +0,0 @@ -if ARCH_LPC32XX - -menu "Individual UART enable selections" - -config ARCH_LPC32XX_UART3_SELECT - bool "Add support for standard UART3" - help - Adds support for standard UART 3 when the 8250 serial support - is enabled. - -config ARCH_LPC32XX_UART4_SELECT - bool "Add support for standard UART4" - help - Adds support for standard UART 4 when the 8250 serial support - is enabled. - -config ARCH_LPC32XX_UART5_SELECT - bool "Add support for standard UART5" - default y - help - Adds support for standard UART 5 when the 8250 serial support - is enabled. - -config ARCH_LPC32XX_UART6_SELECT - bool "Add support for standard UART6" - help - Adds support for standard UART 6 when the 8250 serial support - is enabled. - -endmenu - -endif diff --git a/trunk/arch/arm/mach-lpc32xx/Makefile.boot b/trunk/arch/arm/mach-lpc32xx/Makefile.boot index 2cfe0ee635c5..697323b5f92d 100644 --- a/trunk/arch/arm/mach-lpc32xx/Makefile.boot +++ b/trunk/arch/arm/mach-lpc32xx/Makefile.boot @@ -2,3 +2,4 @@ params_phys-y := 0x80000100 initrd_phys-y := 0x82000000 +dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb diff --git a/trunk/arch/arm/mach-lpc32xx/clock.c b/trunk/arch/arm/mach-lpc32xx/clock.c index f6a3ffec1f4b..e8d315e6db09 100644 --- a/trunk/arch/arm/mach-lpc32xx/clock.c +++ b/trunk/arch/arm/mach-lpc32xx/clock.c @@ -691,10 +691,21 @@ static struct clk clk_nand = { .parent = &clk_hclk, .enable = local_onoff_enable, .enable_reg = LPC32XX_CLKPWR_NAND_CLK_CTRL, - .enable_mask = LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN, + .enable_mask = LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN | + LPC32XX_CLKPWR_NANDCLK_SEL_SLC, .get_rate = local_return_parent_rate, }; +static struct clk clk_nand_mlc = { + .parent = &clk_hclk, + .enable = local_onoff_enable, + .enable_reg = LPC32XX_CLKPWR_NAND_CLK_CTRL, + .enable_mask = LPC32XX_CLKPWR_NANDCLK_MLCCLK_EN | + LPC32XX_CLKPWR_NANDCLK_DMA_INT | + LPC32XX_CLKPWR_NANDCLK_INTSEL_MLC, + .get_rate = local_return_parent_rate, +}; + static struct clk clk_i2s0 = { .parent = &clk_hclk, .enable = local_onoff_enable, @@ -707,7 +718,8 @@ static struct clk clk_i2s1 = { .parent = &clk_hclk, .enable = local_onoff_enable, .enable_reg = LPC32XX_CLKPWR_I2S_CLK_CTRL, - .enable_mask = LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN, + .enable_mask = LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN | + LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA, .get_rate = local_return_parent_rate, }; @@ -1120,8 +1132,9 @@ static struct clk_lookup lookups[] = { CLKDEV_INIT("31020300.i2c", NULL, &clk_i2c2), CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0), CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1), - CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan), - CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand), + CLKDEV_INIT("40050000.key", NULL, &clk_kscan), + CLKDEV_INIT("20020000.flash", NULL, &clk_nand), + CLKDEV_INIT("200a8000.flash", NULL, &clk_nand_mlc), CLKDEV_INIT("40048000.adc", NULL, &clk_adc), CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0), CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1), diff --git a/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h b/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h index 2ba6ca412bef..0052e7a76179 100644 --- a/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h +++ b/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h @@ -3,6 +3,4 @@ #include "gpio-lpc32xx.h" -#define ARCH_NR_GPIOS (LPC32XX_GPO_P3_GRP + LPC32XX_GPO_P3_MAX) - #endif /* __MACH_GPIO_H */ diff --git a/trunk/arch/arm/mach-lpc32xx/phy3250.c b/trunk/arch/arm/mach-lpc32xx/phy3250.c index 540106cdb9ec..c1aabfcbde49 100644 --- a/trunk/arch/arm/mach-lpc32xx/phy3250.c +++ b/trunk/arch/arm/mach-lpc32xx/phy3250.c @@ -30,12 +30,13 @@ #include #include #include +#include +#include #include #include #include #include #include -#include #include #include @@ -50,9 +51,12 @@ /* * Mapped GPIOLIB GPIOs */ -#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) -#define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0) -#define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4) +#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) +#define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0) +#define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4) +#define MMC_PWR_ENABLE_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 5) +#define MMC_CD_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 1) +#define MMC_WP_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 0) /* * AMBA LCD controller @@ -158,24 +162,6 @@ static struct clcd_board lpc32xx_clcd_data = { /* * AMBA SSP (SPI) */ -static void phy3250_spi_cs_set(u32 control) -{ - gpio_set_value(SPI0_CS_GPIO, (int) control); -} - -static struct pl022_config_chip spi0_chip_info = { - .com_mode = INTERRUPT_TRANSFER, - .iface = SSP_INTERFACE_MOTOROLA_SPI, - .hierarchy = SSP_MASTER, - .slave_tx_disable = 0, - .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, - .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, - .ctrl_len = SSP_BITS_8, - .wait_state = SSP_MWIRE_WAIT_ZERO, - .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, - .cs_control = phy3250_spi_cs_set, -}; - static struct pl022_ssp_controller lpc32xx_ssp0_data = { .bus_id = 0, .num_chipselect = 1, @@ -188,45 +174,57 @@ static struct pl022_ssp_controller lpc32xx_ssp1_data = { .enable_dma = 0, }; -/* AT25 driver registration */ -static int __init phy3250_spi_board_register(void) +static struct pl08x_channel_data pl08x_slave_channels[] = { + { + .bus_id = "nand-slc", + .min_signal = 1, /* SLC NAND Flash */ + .max_signal = 1, + .periph_buses = PL08X_AHB1, + }, + { + .bus_id = "nand-mlc", + .min_signal = 12, /* MLC NAND Flash */ + .max_signal = 12, + .periph_buses = PL08X_AHB1, + }, +}; + +/* NOTE: These will change, according to RMK */ +static int pl08x_get_signal(struct pl08x_dma_chan *ch) +{ + return ch->cd->min_signal; +} + +static void pl08x_put_signal(struct pl08x_dma_chan *ch) { -#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) - static struct spi_board_info info[] = { - { - .modalias = "spidev", - .max_speed_hz = 5000000, - .bus_num = 0, - .chip_select = 0, - .controller_data = &spi0_chip_info, - }, - }; - -#else - static struct spi_eeprom eeprom = { - .name = "at25256a", - .byte_len = 0x8000, - .page_size = 64, - .flags = EE_ADDR2, - }; - - static struct spi_board_info info[] = { - { - .modalias = "at25", - .max_speed_hz = 5000000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - .platform_data = &eeprom, - .controller_data = &spi0_chip_info, - }, - }; -#endif - return spi_register_board_info(info, ARRAY_SIZE(info)); } -arch_initcall(phy3250_spi_board_register); static struct pl08x_platform_data pl08x_pd = { + .slave_channels = &pl08x_slave_channels[0], + .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels), + .get_signal = pl08x_get_signal, + .put_signal = pl08x_put_signal, + .lli_buses = PL08X_AHB1, + .mem_buses = PL08X_AHB1, +}; + +static int mmc_handle_ios(struct device *dev, struct mmc_ios *ios) +{ + /* Only on and off are supported */ + if (ios->power_mode == MMC_POWER_OFF) + gpio_set_value(MMC_PWR_ENABLE_GPIO, 0); + else + gpio_set_value(MMC_PWR_ENABLE_GPIO, 1); + return 0; +} + +static struct mmci_platform_data lpc32xx_mmci_data = { + .ocr_mask = MMC_VDD_30_31 | MMC_VDD_31_32 | + MMC_VDD_32_33 | MMC_VDD_33_34, + .ios_handler = mmc_handle_ios, + .dma_filter = NULL, + /* No DMA for now since AMBA PL080 dmaengine driver only does scatter + * gather, and the MMCI driver doesn't do it this way */ }; static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { @@ -234,6 +232,8 @@ static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data), OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data), OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), + OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd", + &lpc32xx_mmci_data), { } }; @@ -241,10 +241,6 @@ static void __init lpc3250_machine_init(void) { u32 tmp; - /* Setup SLC NAND controller muxing */ - __raw_writel(LPC32XX_CLKPWR_NANDCLK_SEL_SLC, - LPC32XX_CLKPWR_NAND_CLK_CTRL); - /* Setup LCD muxing to RGB565 */ tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) & ~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK | @@ -264,34 +260,12 @@ static void __init lpc3250_machine_init(void) LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE; __raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL); - /* Disable IrDA pulsing support on UART6 */ - tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); - tmp |= LPC32XX_UART_UART6_IRDAMOD_BYPASS; - __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); - - /* Enable DMA for I2S1 channel */ - tmp = __raw_readl(LPC32XX_CLKPWR_I2S_CLK_CTRL); - tmp = LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA; - __raw_writel(tmp, LPC32XX_CLKPWR_I2S_CLK_CTRL); - lpc32xx_serial_init(); - /* - * AMBA peripheral clocks need to be enabled prior to AMBA device - * detection or a data fault will occur, so enable the clocks - * here. - */ - tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_LCDCTRL_CLK_EN), - LPC32XX_CLKPWR_LCDCLK_CTRL); - - tmp = __raw_readl(LPC32XX_CLKPWR_SSP_CLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN), - LPC32XX_CLKPWR_SSP_CLK_CTRL); - - tmp = __raw_readl(LPC32XX_CLKPWR_DMA_CLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN), - LPC32XX_CLKPWR_DMA_CLK_CTRL); + tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); + tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN | + LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN; + __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); /* Test clock needed for UDA1380 initial init */ __raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC | @@ -302,12 +276,10 @@ static void __init lpc3250_machine_init(void) lpc32xx_auxdata_lookup, NULL); /* Register GPIOs used on this board */ - if (gpio_request(SPI0_CS_GPIO, "spi0 cs")) - printk(KERN_ERR "Error requesting gpio %u", - SPI0_CS_GPIO); - else if (gpio_direction_output(SPI0_CS_GPIO, 1)) - printk(KERN_ERR "Error setting gpio %u to output", - SPI0_CS_GPIO); + if (gpio_request(MMC_PWR_ENABLE_GPIO, "mmc_power_en")) + pr_err("Error requesting gpio %u", MMC_PWR_ENABLE_GPIO); + else if (gpio_direction_output(MMC_PWR_ENABLE_GPIO, 1)) + pr_err("Error setting gpio %u to output", MMC_PWR_ENABLE_GPIO); } static char const *lpc32xx_dt_compat[] __initdata = { diff --git a/trunk/arch/arm/mach-lpc32xx/serial.c b/trunk/arch/arm/mach-lpc32xx/serial.c index f2735281616a..05621a29fba2 100644 --- a/trunk/arch/arm/mach-lpc32xx/serial.c +++ b/trunk/arch/arm/mach-lpc32xx/serial.c @@ -31,59 +31,6 @@ #define LPC32XX_SUART_FIFO_SIZE 64 -/* Standard 8250/16550 compatible serial ports */ -static struct plat_serial8250_port serial_std_platform_data[] = { -#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT - { - .membase = io_p2v(LPC32XX_UART5_BASE), - .mapbase = LPC32XX_UART5_BASE, - .irq = IRQ_LPC32XX_UART_IIR5, - .uartclk = LPC32XX_MAIN_OSC_FREQ, - .regshift = 2, - .iotype = UPIO_MEM32, - .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | - UPF_SKIP_TEST, - }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT - { - .membase = io_p2v(LPC32XX_UART3_BASE), - .mapbase = LPC32XX_UART3_BASE, - .irq = IRQ_LPC32XX_UART_IIR3, - .uartclk = LPC32XX_MAIN_OSC_FREQ, - .regshift = 2, - .iotype = UPIO_MEM32, - .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | - UPF_SKIP_TEST, - }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT - { - .membase = io_p2v(LPC32XX_UART4_BASE), - .mapbase = LPC32XX_UART4_BASE, - .irq = IRQ_LPC32XX_UART_IIR4, - .uartclk = LPC32XX_MAIN_OSC_FREQ, - .regshift = 2, - .iotype = UPIO_MEM32, - .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | - UPF_SKIP_TEST, - }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT - { - .membase = io_p2v(LPC32XX_UART6_BASE), - .mapbase = LPC32XX_UART6_BASE, - .irq = IRQ_LPC32XX_UART_IIR6, - .uartclk = LPC32XX_MAIN_OSC_FREQ, - .regshift = 2, - .iotype = UPIO_MEM32, - .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | - UPF_SKIP_TEST, - }, -#endif - { }, -}; - struct uartinit { char *uart_ck_name; u32 ck_mode_mask; @@ -92,7 +39,6 @@ struct uartinit { }; static struct uartinit uartinit_data[] __initdata = { -#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT { .uart_ck_name = "uart5_ck", .ck_mode_mask = @@ -100,8 +46,6 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL, .mapbase = LPC32XX_UART5_BASE, }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT { .uart_ck_name = "uart3_ck", .ck_mode_mask = @@ -109,8 +53,6 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL, .mapbase = LPC32XX_UART3_BASE, }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT { .uart_ck_name = "uart4_ck", .ck_mode_mask = @@ -118,8 +60,6 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL, .mapbase = LPC32XX_UART4_BASE, }, -#endif -#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT { .uart_ck_name = "uart6_ck", .ck_mode_mask = @@ -127,19 +67,6 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL, .mapbase = LPC32XX_UART6_BASE, }, -#endif -}; - -static struct platform_device serial_std_platform_device = { - .name = "serial8250", - .id = 0, - .dev = { - .platform_data = serial_std_platform_data, - }, -}; - -static struct platform_device *lpc32xx_serial_devs[] __initdata = { - &serial_std_platform_device, }; void __init lpc32xx_serial_init(void) @@ -156,15 +83,8 @@ void __init lpc32xx_serial_init(void) clk = clk_get(NULL, uartinit_data[i].uart_ck_name); if (!IS_ERR(clk)) { clk_enable(clk); - serial_std_platform_data[i].uartclk = - clk_get_rate(clk); } - /* Fall back on main osc rate if clock rate return fails */ - if (serial_std_platform_data[i].uartclk == 0) - serial_std_platform_data[i].uartclk = - LPC32XX_MAIN_OSC_FREQ; - /* Setup UART clock modes for all UARTs, disable autoclock */ clkmodes |= uartinit_data[i].ck_mode_mask; @@ -189,7 +109,7 @@ void __init lpc32xx_serial_init(void) __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) { /* Force a flush of the RX FIFOs to work around a HW bug */ - puart = serial_std_platform_data[i].mapbase; + puart = uartinit_data[i].mapbase; __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart)); j = LPC32XX_SUART_FIFO_SIZE; @@ -198,11 +118,13 @@ void __init lpc32xx_serial_init(void) __raw_writel(0, LPC32XX_UART_IIR_FCR(puart)); } + /* Disable IrDA pulsing support on UART6 */ + tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); + tmp |= LPC32XX_UART_UART6_IRDAMOD_BYPASS; + __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); + /* Disable UART5->USB transparent mode or USB won't work */ tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); tmp &= ~LPC32XX_UART_U5_ROUTE_TO_USB; __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); - - platform_add_devices(lpc32xx_serial_devs, - ARRAY_SIZE(lpc32xx_serial_devs)); } diff --git a/trunk/arch/arm/mach-mxs/Kconfig b/trunk/arch/arm/mach-mxs/Kconfig index 91cf0625819c..ccdf83b17cf1 100644 --- a/trunk/arch/arm/mach-mxs/Kconfig +++ b/trunk/arch/arm/mach-mxs/Kconfig @@ -16,6 +16,7 @@ config SOC_IMX28 bool select ARM_AMBA select CPU_ARM926T + select HAVE_CAN_FLEXCAN if CAN select HAVE_PWM select PINCTRL_IMX28 diff --git a/trunk/arch/arm/mach-mxs/devices-mx23.h b/trunk/arch/arm/mach-mxs/devices-mx23.h index 9acdd6387047..9ee5cede3d42 100644 --- a/trunk/arch/arm/mach-mxs/devices-mx23.h +++ b/trunk/arch/arm/mach-mxs/devices-mx23.h @@ -10,7 +10,7 @@ */ #include #include -#include +#include #include static inline int mx23_add_duart(void) diff --git a/trunk/arch/arm/mach-mxs/devices-mx28.h b/trunk/arch/arm/mach-mxs/devices-mx28.h index 84b2960df117..fcab431060f4 100644 --- a/trunk/arch/arm/mach-mxs/devices-mx28.h +++ b/trunk/arch/arm/mach-mxs/devices-mx28.h @@ -10,7 +10,7 @@ */ #include #include -#include +#include #include static inline int mx28_add_duart(void) diff --git a/trunk/arch/arm/mach-mxs/devices/platform-mxsfb.c b/trunk/arch/arm/mach-mxs/devices/platform-mxsfb.c index 5a75b7180f74..76b53f73418e 100644 --- a/trunk/arch/arm/mach-mxs/devices/platform-mxsfb.c +++ b/trunk/arch/arm/mach-mxs/devices/platform-mxsfb.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #ifdef CONFIG_SOC_IMX23 struct platform_device *__init mx23_add_mxsfb( diff --git a/trunk/arch/arm/mach-mxs/mach-mxs.c b/trunk/arch/arm/mach-mxs/mach-mxs.c index 8cac94b33020..7bbb961cc52d 100644 --- a/trunk/arch/arm/mach-mxs/mach-mxs.c +++ b/trunk/arch/arm/mach-mxs/mach-mxs.c @@ -16,12 +16,57 @@ #include #include #include +#include #include #include #include #include #include +static struct fb_videomode mx23evk_video_modes[] = { + { + .name = "Samsung-LMS430HF02", + .refresh = 60, + .xres = 480, + .yres = 272, + .pixclock = 108096, /* picosecond (9.2 MHz) */ + .left_margin = 15, + .right_margin = 8, + .upper_margin = 12, + .lower_margin = 4, + .hsync_len = 1, + .vsync_len = 1, + .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | + FB_SYNC_DOTCLK_FAILING_ACT, + }, +}; + +static struct fb_videomode mx28evk_video_modes[] = { + { + .name = "Seiko-43WVF1G", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 29851, /* picosecond (33.5 MHz) */ + .left_margin = 89, + .right_margin = 164, + .upper_margin = 23, + .lower_margin = 10, + .hsync_len = 10, + .vsync_len = 10, + .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | + FB_SYNC_DOTCLK_FAILING_ACT, + }, +}; + +static struct mxsfb_platform_data mxsfb_pdata __initdata; + +static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata), + OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata), + { /* sentinel */ } +}; + static int __init mxs_icoll_add_irq_domain(struct device_node *np, struct device_node *interrupt_parent) { @@ -71,6 +116,76 @@ static struct sys_timer imx28_timer = { .init = imx28_timer_init, }; +enum mac_oui { + OUI_FSL, + OUI_DENX, +}; + +static void __init update_fec_mac_prop(enum mac_oui oui) +{ + struct device_node *np, *from = NULL; + struct property *oldmac, *newmac; + const u32 *ocotp = mxs_get_ocotp(); + u8 *macaddr; + u32 val; + int i; + + for (i = 0; i < 2; i++) { + np = of_find_compatible_node(from, NULL, "fsl,imx28-fec"); + if (!np) + return; + from = np; + + newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL); + if (!newmac) + return; + newmac->value = newmac + 1; + newmac->length = 6; + + newmac->name = kstrdup("local-mac-address", GFP_KERNEL); + if (!newmac->name) { + kfree(newmac); + return; + } + + /* + * OCOTP only stores the last 4 octets for each mac address, + * so hard-code OUI here. + */ + macaddr = newmac->value; + switch (oui) { + case OUI_FSL: + macaddr[0] = 0x00; + macaddr[1] = 0x04; + macaddr[2] = 0x9f; + break; + case OUI_DENX: + macaddr[0] = 0xc0; + macaddr[1] = 0xe5; + macaddr[2] = 0x4e; + break; + } + val = ocotp[i]; + macaddr[3] = (val >> 16) & 0xff; + macaddr[4] = (val >> 8) & 0xff; + macaddr[5] = (val >> 0) & 0xff; + + oldmac = of_find_property(np, newmac->name, NULL); + if (oldmac) + prom_update_property(np, newmac, oldmac); + else + prom_add_property(np, newmac); + } +} + +static void __init imx23_evk_init(void) +{ + mxsfb_pdata.mode_list = mx23evk_video_modes; + mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); + mxsfb_pdata.default_bpp = 32; + mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; +} + static void __init imx28_evk_init(void) { struct clk *clk; @@ -79,24 +194,35 @@ static void __init imx28_evk_init(void) clk = clk_get_sys("enet_out", NULL); if (!IS_ERR(clk)) clk_prepare_enable(clk); + + update_fec_mac_prop(OUI_FSL); + + mxsfb_pdata.mode_list = mx28evk_video_modes; + mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); + mxsfb_pdata.default_bpp = 32; + mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; } static void __init mxs_machine_init(void) { if (of_machine_is_compatible("fsl,imx28-evk")) imx28_evk_init(); + else if (of_machine_is_compatible("fsl,imx23-evk")) + imx23_evk_init(); of_platform_populate(NULL, of_default_bus_match_table, - NULL, NULL); + mxs_auxdata_lookup, NULL); } static const char *imx23_dt_compat[] __initdata = { "fsl,imx23-evk", + "olimex,imx23-olinuxino", "fsl,imx23", NULL, }; static const char *imx28_dt_compat[] __initdata = { + "crystalfontz,cfa10036", "fsl,imx28-evk", "fsl,imx28", NULL, diff --git a/trunk/arch/arm/mach-nomadik/Makefile b/trunk/arch/arm/mach-nomadik/Makefile index a6bbd1a7b4e7..a42c9a33d3bf 100644 --- a/trunk/arch/arm/mach-nomadik/Makefile +++ b/trunk/arch/arm/mach-nomadik/Makefile @@ -7,8 +7,6 @@ # Object file lists. -obj-y += clock.o - # Cpu revision obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o diff --git a/trunk/arch/arm/mach-nomadik/board-nhk8815.c b/trunk/arch/arm/mach-nomadik/board-nhk8815.c index 2e8d3e176bc7..f4535a7dadf5 100644 --- a/trunk/arch/arm/mach-nomadik/board-nhk8815.c +++ b/trunk/arch/arm/mach-nomadik/board-nhk8815.c @@ -14,12 +14,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include #include @@ -185,16 +187,28 @@ static void __init nhk8815_onenand_init(void) #endif } -static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, - { IRQ_UART0 }, NULL); +static struct mmci_platform_data mmcsd_plat_data = { + .ocr_mask = MMC_VDD_29_30, + .f_max = 48000000, + .gpio_wp = -1, + .gpio_cd = 111, + .cd_invert = true, + .capabilities = MMC_CAP_MMC_HIGHSPEED | + MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA, +}; -static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, - { IRQ_UART1 }, NULL); +static int __init nhk8815_mmcsd_init(void) +{ + int ret; -static struct amba_device *amba_devs[] __initdata = { - &uart0_device, - &uart1_device, -}; + ret = gpio_request(112, "card detect bias"); + if (ret) + return ret; + gpio_direction_output(112, 0); + amba_apb_device_add(NULL, "mmci", NOMADIK_SDI_BASE, SZ_4K, IRQ_SDMMC, 0, &mmcsd_plat_data, 0x10180180); + return 0; +} +module_init(nhk8815_mmcsd_init); static struct resource nhk8815_eth_resources[] = { { @@ -253,17 +267,46 @@ static struct sys_timer nomadik_timer = { .init = nomadik_timer_init, }; +static struct i2c_board_info __initdata nhk8815_i2c0_devices[] = { + { + I2C_BOARD_INFO("stw4811", 0x2d), + }, +}; + +static struct i2c_board_info __initdata nhk8815_i2c1_devices[] = { + { + I2C_BOARD_INFO("camera", 0x10), + }, + { + I2C_BOARD_INFO("stw5095", 0x1a), + }, + { + I2C_BOARD_INFO("lis3lv02dl", 0x1d), + }, +}; + +static struct i2c_board_info __initdata nhk8815_i2c2_devices[] = { + { + I2C_BOARD_INFO("stw4811-usb", 0x2d), + }, +}; + static void __init nhk8815_platform_init(void) { - int i; - cpu8815_platform_init(); nhk8815_onenand_init(); platform_add_devices(nhk8815_platform_devices, ARRAY_SIZE(nhk8815_platform_devices)); - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) - amba_device_register(amba_devs[i], &iomem_resource); + amba_apb_device_add(NULL, "uart0", NOMADIK_UART0_BASE, SZ_4K, IRQ_UART0, 0, NULL, 0); + amba_apb_device_add(NULL, "uart1", NOMADIK_UART1_BASE, SZ_4K, IRQ_UART1, 0, NULL, 0); + + i2c_register_board_info(0, nhk8815_i2c0_devices, + ARRAY_SIZE(nhk8815_i2c0_devices)); + i2c_register_board_info(1, nhk8815_i2c1_devices, + ARRAY_SIZE(nhk8815_i2c1_devices)); + i2c_register_board_info(2, nhk8815_i2c2_devices, + ARRAY_SIZE(nhk8815_i2c2_devices)); } MACHINE_START(NOMADIK, "NHK8815") diff --git a/trunk/arch/arm/mach-nomadik/clock.c b/trunk/arch/arm/mach-nomadik/clock.c deleted file mode 100644 index 48a59f24e10c..000000000000 --- a/trunk/arch/arm/mach-nomadik/clock.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/arch/arm/mach-nomadik/clock.c - * - * Copyright (C) 2009 Alessandro Rubini - */ -#include -#include -#include -#include -#include -#include "clock.h" - -/* - * The nomadik board uses generic clocks, but the serial pl011 file - * calls clk_enable(), clk_disable(), clk_get_rate(), so we provide them - */ -unsigned long clk_get_rate(struct clk *clk) -{ - return clk->rate; -} -EXPORT_SYMBOL(clk_get_rate); - -/* enable and disable do nothing */ -int clk_enable(struct clk *clk) -{ - return 0; -} -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ -} -EXPORT_SYMBOL(clk_disable); - -static struct clk clk_24 = { - .rate = 2400000, -}; - -static struct clk clk_48 = { - .rate = 48 * 1000 * 1000, -}; - -/* - * Catch-all default clock to satisfy drivers using the clk API. We don't - * model the actual hardware clocks yet. - */ -static struct clk clk_default; - -#define CLK(_clk, dev) \ - { \ - .clk = _clk, \ - .dev_id = dev, \ - } - -static struct clk_lookup lookups[] = { - { - .con_id = "apb_pclk", - .clk = &clk_default, - }, - CLK(&clk_24, "mtu0"), - CLK(&clk_24, "mtu1"), - CLK(&clk_48, "uart0"), - CLK(&clk_48, "uart1"), - CLK(&clk_default, "gpio.0"), - CLK(&clk_default, "gpio.1"), - CLK(&clk_default, "gpio.2"), - CLK(&clk_default, "gpio.3"), - CLK(&clk_default, "rng"), -}; - -int __init clk_init(void) -{ - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - return 0; -} diff --git a/trunk/arch/arm/mach-nomadik/clock.h b/trunk/arch/arm/mach-nomadik/clock.h deleted file mode 100644 index 78da2e7c3985..000000000000 --- a/trunk/arch/arm/mach-nomadik/clock.h +++ /dev/null @@ -1,15 +0,0 @@ - -/* - * linux/arch/arm/mach-nomadik/clock.h - * - * Copyright (C) 2009 Alessandro Rubini - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -struct clk { - unsigned long rate; -}; - -int __init clk_init(void); diff --git a/trunk/arch/arm/mach-nomadik/cpu-8815.c b/trunk/arch/arm/mach-nomadik/cpu-8815.c index 27f43a46985e..6fd8e46567a4 100644 --- a/trunk/arch/arm/mach-nomadik/cpu-8815.c +++ b/trunk/arch/arm/mach-nomadik/cpu-8815.c @@ -22,6 +22,10 @@ #include #include #include +#include +#include +#include +#include #include #include @@ -32,91 +36,63 @@ #include #include -#include "clock.h" #include "cpu-8815.h" -#define __MEM_4K_RESOURCE(x) \ - .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} - /* The 8815 has 4 GPIO blocks, let's register them immediately */ - -#define GPIO_RESOURCE(block) \ - { \ - .start = NOMADIK_GPIO##block##_BASE, \ - .end = NOMADIK_GPIO##block##_BASE + SZ_4K - 1, \ - .flags = IORESOURCE_MEM, \ - }, \ - { \ - .start = IRQ_GPIO##block, \ - .end = IRQ_GPIO##block, \ - .flags = IORESOURCE_IRQ, \ - } - -#define GPIO_DEVICE(block) \ - { \ - .name = "gpio", \ - .id = block, \ - .num_resources = 2, \ - .resource = &cpu8815_gpio_resources[block * 2], \ - .dev = { \ - .platform_data = &cpu8815_gpio[block], \ - }, \ - } - -static struct nmk_gpio_platform_data cpu8815_gpio[] = { - { - .name = "GPIO-0-31", - .first_gpio = 0, - .first_irq = NOMADIK_GPIO_TO_IRQ(0), - }, { - .name = "GPIO-32-63", - .first_gpio = 32, - .first_irq = NOMADIK_GPIO_TO_IRQ(32), - }, { - .name = "GPIO-64-95", - .first_gpio = 64, - .first_irq = NOMADIK_GPIO_TO_IRQ(64), - }, { - .name = "GPIO-96-127", /* 124..127 not routed to pin */ - .first_gpio = 96, - .first_irq = NOMADIK_GPIO_TO_IRQ(96), - } +static resource_size_t __initdata cpu8815_gpio_base[] = { + NOMADIK_GPIO0_BASE, + NOMADIK_GPIO1_BASE, + NOMADIK_GPIO2_BASE, + NOMADIK_GPIO3_BASE, }; -static struct resource cpu8815_gpio_resources[] = { - GPIO_RESOURCE(0), - GPIO_RESOURCE(1), - GPIO_RESOURCE(2), - GPIO_RESOURCE(3), -}; - -static struct platform_device cpu8815_platform_gpio[] = { - GPIO_DEVICE(0), - GPIO_DEVICE(1), - GPIO_DEVICE(2), - GPIO_DEVICE(3), -}; +static struct platform_device * +cpu8815_add_gpio(int id, resource_size_t addr, int irq, + struct nmk_gpio_platform_data *pdata) +{ + struct resource resources[] = { + { + .start = addr, + .end = addr + 127, + .flags = IORESOURCE_MEM, + }, + { + .start = irq, + .end = irq, + .flags = IORESOURCE_IRQ, + } + }; + + return platform_device_register_resndata(NULL, "gpio", id, + resources, ARRAY_SIZE(resources), + pdata, sizeof(*pdata)); +} -static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); +void cpu8815_add_gpios(resource_size_t *base, int num, int irq, + struct nmk_gpio_platform_data *pdata) +{ + int first = 0; + int i; -static struct platform_device *platform_devs[] __initdata = { - cpu8815_platform_gpio + 0, - cpu8815_platform_gpio + 1, - cpu8815_platform_gpio + 2, - cpu8815_platform_gpio + 3, -}; + for (i = 0; i < num; i++, first += 32, irq++) { + pdata->first_gpio = first; + pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first); + pdata->num_gpio = 32; -static struct amba_device *amba_devs[] __initdata = { - &cpu8815_amba_rng_device -}; + cpu8815_add_gpio(i, base[i], irq, pdata); + } +} static int __init cpu8815_init(void) { - int i; - - platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) - amba_device_register(amba_devs[i], &iomem_resource); + struct nmk_gpio_platform_data pdata = { + /* No custom data yet */ + }; + + cpu8815_add_gpios(cpu8815_gpio_base, ARRAY_SIZE(cpu8815_gpio_base), + IRQ_GPIO0, &pdata); + amba_apb_device_add(NULL, "rng", NOMADIK_RNG_BASE, SZ_4K, 0, 0, NULL, 0); + amba_apb_device_add(NULL, "rtc-pl031", NOMADIK_RTC_BASE, SZ_4K, IRQ_RTC_RTT, 0, NULL, 0); return 0; } arch_initcall(cpu8815_init); @@ -147,7 +123,7 @@ void __init cpu8815_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - clk_init(); + nomadik_clk_init(); } /* diff --git a/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c b/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c index 0fc2f6f1cc97..6d14454d4609 100644 --- a/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c +++ b/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c @@ -5,6 +5,7 @@ #include #include #include +#include /* * There are two busses in the 8815NHK. @@ -12,19 +13,27 @@ * use bit-bang through GPIO by now, to keep things simple */ +/* I2C0 connected to the STw4811 power management chip */ static struct i2c_gpio_platform_data nhk8815_i2c_data0 = { /* keep defaults for timeouts; pins are push-pull bidirectional */ .scl_pin = 62, .sda_pin = 63, }; +/* I2C1 connected to various sensors */ static struct i2c_gpio_platform_data nhk8815_i2c_data1 = { /* keep defaults for timeouts; pins are push-pull bidirectional */ .scl_pin = 53, .sda_pin = 54, }; -/* first bus: GPIO XX and YY */ +/* I2C2 connected to the USB portions of the STw4811 only */ +static struct i2c_gpio_platform_data nhk8815_i2c_data2 = { + /* keep defaults for timeouts; pins are push-pull bidirectional */ + .scl_pin = 73, + .sda_pin = 74, +}; + static struct platform_device nhk8815_i2c_dev0 = { .name = "i2c-gpio", .id = 0, @@ -32,7 +41,7 @@ static struct platform_device nhk8815_i2c_dev0 = { .platform_data = &nhk8815_i2c_data0, }, }; -/* second bus: GPIO XX and YY */ + static struct platform_device nhk8815_i2c_dev1 = { .name = "i2c-gpio", .id = 1, @@ -41,15 +50,29 @@ static struct platform_device nhk8815_i2c_dev1 = { }, }; +static struct platform_device nhk8815_i2c_dev2 = { + .name = "i2c-gpio", + .id = 2, + .dev = { + .platform_data = &nhk8815_i2c_data2, + }, +}; + +static pin_cfg_t cpu8815_pins_i2c[] = { + PIN_CFG_INPUT(62, GPIO, PULLUP), + PIN_CFG_INPUT(63, GPIO, PULLUP), + PIN_CFG_INPUT(53, GPIO, PULLUP), + PIN_CFG_INPUT(54, GPIO, PULLUP), + PIN_CFG_INPUT(73, GPIO, PULLUP), + PIN_CFG_INPUT(74, GPIO, PULLUP), +}; + static int __init nhk8815_i2c_init(void) { - nmk_gpio_set_mode(nhk8815_i2c_data0.scl_pin, NMK_GPIO_ALT_GPIO); - nmk_gpio_set_mode(nhk8815_i2c_data0.sda_pin, NMK_GPIO_ALT_GPIO); + nmk_config_pins(cpu8815_pins_i2c, ARRAY_SIZE(cpu8815_pins_i2c)); platform_device_register(&nhk8815_i2c_dev0); - - nmk_gpio_set_mode(nhk8815_i2c_data1.scl_pin, NMK_GPIO_ALT_GPIO); - nmk_gpio_set_mode(nhk8815_i2c_data1.sda_pin, NMK_GPIO_ALT_GPIO); platform_device_register(&nhk8815_i2c_dev1); + platform_device_register(&nhk8815_i2c_dev2); return 0; } @@ -58,6 +81,7 @@ static void __exit nhk8815_i2c_exit(void) { platform_device_unregister(&nhk8815_i2c_dev0); platform_device_unregister(&nhk8815_i2c_dev1); + platform_device_unregister(&nhk8815_i2c_dev2); return; } diff --git a/trunk/arch/arm/mach-nomadik/include/mach/irqs.h b/trunk/arch/arm/mach-nomadik/include/mach/irqs.h index 8faabc560398..a118e615f865 100644 --- a/trunk/arch/arm/mach-nomadik/include/mach/irqs.h +++ b/trunk/arch/arm/mach-nomadik/include/mach/irqs.h @@ -22,56 +22,56 @@ #include -#define IRQ_VIC_START 0 /* first VIC interrupt is 0 */ +#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ /* * Interrupt numbers generic for all Nomadik Chip cuts */ -#define IRQ_WATCHDOG 0 -#define IRQ_SOFTINT 1 -#define IRQ_CRYPTO 2 -#define IRQ_OWM 3 -#define IRQ_MTU0 4 -#define IRQ_MTU1 5 -#define IRQ_GPIO0 6 -#define IRQ_GPIO1 7 -#define IRQ_GPIO2 8 -#define IRQ_GPIO3 9 -#define IRQ_RTC_RTT 10 -#define IRQ_SSP 11 -#define IRQ_UART0 12 -#define IRQ_DMA1 13 -#define IRQ_CLCD_MDIF 14 -#define IRQ_DMA0 15 -#define IRQ_PWRFAIL 16 -#define IRQ_UART1 17 -#define IRQ_FIRDA 18 -#define IRQ_MSP0 19 -#define IRQ_I2C0 20 -#define IRQ_I2C1 21 -#define IRQ_SDMMC 22 -#define IRQ_USBOTG 23 -#define IRQ_SVA_IT0 24 -#define IRQ_SVA_IT1 25 -#define IRQ_SAA_IT0 26 -#define IRQ_SAA_IT1 27 -#define IRQ_UART2 28 -#define IRQ_MSP2 31 -#define IRQ_L2CC 48 -#define IRQ_HPI 49 -#define IRQ_SKE 50 -#define IRQ_KP 51 -#define IRQ_MEMST 54 -#define IRQ_SGA_IT 58 -#define IRQ_USBM 60 -#define IRQ_MSP1 62 +#define IRQ_WATCHDOG 1 +#define IRQ_SOFTINT 2 +#define IRQ_CRYPTO 3 +#define IRQ_OWM 4 +#define IRQ_MTU0 5 +#define IRQ_MTU1 6 +#define IRQ_GPIO0 7 +#define IRQ_GPIO1 8 +#define IRQ_GPIO2 9 +#define IRQ_GPIO3 10 +#define IRQ_RTC_RTT 11 +#define IRQ_SSP 12 +#define IRQ_UART0 13 +#define IRQ_DMA1 14 +#define IRQ_CLCD_MDIF 15 +#define IRQ_DMA0 16 +#define IRQ_PWRFAIL 17 +#define IRQ_UART1 18 +#define IRQ_FIRDA 19 +#define IRQ_MSP0 20 +#define IRQ_I2C0 21 +#define IRQ_I2C1 22 +#define IRQ_SDMMC 23 +#define IRQ_USBOTG 24 +#define IRQ_SVA_IT0 25 +#define IRQ_SVA_IT1 26 +#define IRQ_SAA_IT0 27 +#define IRQ_SAA_IT1 28 +#define IRQ_UART2 29 +#define IRQ_MSP2 30 +#define IRQ_L2CC 49 +#define IRQ_HPI 50 +#define IRQ_SKE 51 +#define IRQ_KP 52 +#define IRQ_MEMST 55 +#define IRQ_SGA_IT 59 +#define IRQ_USBM 61 +#define IRQ_MSP1 63 -#define NOMADIK_SOC_NR_IRQS 64 +#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) /* After chip-specific IRQ numbers we have the GPIO ones */ #define NOMADIK_NR_GPIO 128 /* last 4 not wired to pins */ -#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_SOC_NR_IRQS) -#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_SOC_NR_IRQS) +#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_GPIO_OFFSET) +#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_GPIO_OFFSET) #define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) /* Following two are used by entry_macro.S, to access our dual-vic */ @@ -79,4 +79,3 @@ #define VIC_REG_IRQSR1 0x20 #endif /* __ASM_ARCH_IRQS_H */ - diff --git a/trunk/drivers/clk/Makefile b/trunk/drivers/clk/Makefile index b9a5158a30b1..26b6b92942e1 100644 --- a/trunk/drivers/clk/Makefile +++ b/trunk/drivers/clk/Makefile @@ -3,5 +3,6 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ clk-mux.o clk-divider.o clk-fixed-factor.o # SoCs specific +obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_PLAT_SPEAR) += spear/ diff --git a/trunk/drivers/clk/clk-nomadik.c b/trunk/drivers/clk/clk-nomadik.c new file mode 100644 index 000000000000..517a8ff7121e --- /dev/null +++ b/trunk/drivers/clk/clk-nomadik.c @@ -0,0 +1,47 @@ +#include +#include +#include +#include +#include + +/* + * The Nomadik clock tree is described in the STN8815A12 DB V4.2 + * reference manual for the chip, page 94 ff. + */ + +void __init nomadik_clk_init(void) +{ + struct clk *clk; + + clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); + clk_register_clkdev(clk, "apb_pclk", NULL); + clk_register_clkdev(clk, NULL, "gpio.0"); + clk_register_clkdev(clk, NULL, "gpio.1"); + clk_register_clkdev(clk, NULL, "gpio.2"); + clk_register_clkdev(clk, NULL, "gpio.3"); + clk_register_clkdev(clk, NULL, "rng"); + + /* + * The 2.4 MHz TIMCLK reference clock is active at boot time, this is + * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used + * by the timers and watchdog. See page 105 ff. + */ + clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT, + 2400000); + clk_register_clkdev(clk, NULL, "mtu0"); + clk_register_clkdev(clk, NULL, "mtu1"); + + /* + * At boot time, PLL2 is set to generate a set of fixed clocks, + * one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD + * I2C, IrDA, USB and SSP blocks. + */ + clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT, + 48000000); + clk_register_clkdev(clk, NULL, "uart0"); + clk_register_clkdev(clk, NULL, "uart1"); + clk_register_clkdev(clk, NULL, "mmci"); + clk_register_clkdev(clk, NULL, "ssp"); + clk_register_clkdev(clk, NULL, "nmk-i2c.0"); + clk_register_clkdev(clk, NULL, "nmk-i2c.1"); +} diff --git a/trunk/drivers/rtc/rtc-stmp3xxx.c b/trunk/drivers/rtc/rtc-stmp3xxx.c index 10287865e330..739ef55694f4 100644 --- a/trunk/drivers/rtc/rtc-stmp3xxx.c +++ b/trunk/drivers/rtc/rtc-stmp3xxx.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -265,6 +266,12 @@ static int stmp3xxx_rtc_resume(struct platform_device *dev) #define stmp3xxx_rtc_resume NULL #endif +static const struct of_device_id rtc_dt_ids[] = { + { .compatible = "fsl,stmp3xxx-rtc", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rtc_dt_ids); + static struct platform_driver stmp3xxx_rtcdrv = { .probe = stmp3xxx_rtc_probe, .remove = stmp3xxx_rtc_remove, @@ -273,6 +280,7 @@ static struct platform_driver stmp3xxx_rtcdrv = { .driver = { .name = "stmp3xxx-rtc", .owner = THIS_MODULE, + .of_match_table = rtc_dt_ids, }, }; diff --git a/trunk/drivers/tty/serial/mxs-auart.c b/trunk/drivers/tty/serial/mxs-auart.c index ec56d8397aae..2e341b81ff89 100644 --- a/trunk/drivers/tty/serial/mxs-auart.c +++ b/trunk/drivers/tty/serial/mxs-auart.c @@ -33,6 +33,7 @@ #include #include #include +#include #include @@ -675,6 +676,30 @@ static struct uart_driver auart_driver = { #endif }; +/* + * This function returns 1 if pdev isn't a device instatiated by dt, 0 if it + * could successfully get all information from dt or a negative errno. + */ +static int serial_mxs_probe_dt(struct mxs_auart_port *s, + struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + int ret; + + if (!np) + /* no device tree device */ + return 1; + + ret = of_alias_get_id(np, "serial"); + if (ret < 0) { + dev_err(&pdev->dev, "failed to get alias id: %d\n", ret); + return ret; + } + s->port.line = ret; + + return 0; +} + static int __devinit mxs_auart_probe(struct platform_device *pdev) { struct mxs_auart_port *s; @@ -689,6 +714,12 @@ static int __devinit mxs_auart_probe(struct platform_device *pdev) goto out; } + ret = serial_mxs_probe_dt(s, pdev); + if (ret > 0) + s->port.line = pdev->id < 0 ? 0 : pdev->id; + else if (ret < 0) + goto out_free; + pinctrl = devm_pinctrl_get_select_default(&pdev->dev); if (IS_ERR(pinctrl)) { ret = PTR_ERR(pinctrl); @@ -711,7 +742,6 @@ static int __devinit mxs_auart_probe(struct platform_device *pdev) s->port.membase = ioremap(r->start, resource_size(r)); s->port.ops = &mxs_auart_ops; s->port.iotype = UPIO_MEM; - s->port.line = pdev->id < 0 ? 0 : pdev->id; s->port.fifosize = 16; s->port.uartclk = clk_get_rate(s->clk); s->port.type = PORT_IMX; @@ -728,7 +758,7 @@ static int __devinit mxs_auart_probe(struct platform_device *pdev) platform_set_drvdata(pdev, s); - auart_port[pdev->id] = s; + auart_port[s->port.line] = s; mxs_auart_reset(&s->port); @@ -769,12 +799,19 @@ static int __devexit mxs_auart_remove(struct platform_device *pdev) return 0; } +static struct of_device_id mxs_auart_dt_ids[] = { + { .compatible = "fsl,imx23-auart", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxs_auart_dt_ids); + static struct platform_driver mxs_auart_driver = { .probe = mxs_auart_probe, .remove = __devexit_p(mxs_auart_remove), .driver = { .name = "mxs-auart", .owner = THIS_MODULE, + .of_match_table = mxs_auart_dt_ids, }, }; @@ -807,3 +844,4 @@ module_init(mxs_auart_init); module_exit(mxs_auart_exit); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Freescale MXS application uart driver"); +MODULE_ALIAS("platform:mxs-auart"); diff --git a/trunk/drivers/video/mxsfb.c b/trunk/drivers/video/mxsfb.c index abbe691047bd..49619b441500 100644 --- a/trunk/drivers/video/mxsfb.c +++ b/trunk/drivers/video/mxsfb.c @@ -41,12 +41,14 @@ #include #include +#include +#include #include #include #include #include #include -#include +#include #define REG_SET 4 #define REG_CLR 8 @@ -750,16 +752,43 @@ static void __devexit mxsfb_free_videomem(struct mxsfb_info *host) } } +static struct platform_device_id mxsfb_devtype[] = { + { + .name = "imx23-fb", + .driver_data = MXSFB_V3, + }, { + .name = "imx28-fb", + .driver_data = MXSFB_V4, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mxsfb_devtype); + +static const struct of_device_id mxsfb_dt_ids[] = { + { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], }, + { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mxsfb_dt_ids); + static int __devinit mxsfb_probe(struct platform_device *pdev) { + const struct of_device_id *of_id = + of_match_device(mxsfb_dt_ids, &pdev->dev); struct mxsfb_platform_data *pdata = pdev->dev.platform_data; struct resource *res; struct mxsfb_info *host; struct fb_info *fb_info; struct fb_modelist *modelist; struct pinctrl *pinctrl; + int panel_enable; + enum of_gpio_flags flags; int i, ret; + if (of_id) + pdev->id_entry = of_id->data; + if (!pdata) { dev_err(&pdev->dev, "No platformdata. Giving up\n"); return -ENODEV; @@ -807,6 +836,22 @@ static int __devinit mxsfb_probe(struct platform_device *pdev) goto error_getclock; } + panel_enable = of_get_named_gpio_flags(pdev->dev.of_node, + "panel-enable-gpios", 0, &flags); + if (gpio_is_valid(panel_enable)) { + unsigned long f = GPIOF_OUT_INIT_HIGH; + if (flags == OF_GPIO_ACTIVE_LOW) + f = GPIOF_OUT_INIT_LOW; + ret = devm_gpio_request_one(&pdev->dev, panel_enable, + f, "panel-enable"); + if (ret) { + dev_err(&pdev->dev, + "failed to request gpio %d: %d\n", + panel_enable, ret); + goto error_panel_enable; + } + } + fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); if (!fb_info->pseudo_palette) { ret = -ENOMEM; @@ -854,6 +899,7 @@ static int __devinit mxsfb_probe(struct platform_device *pdev) error_init_fb: kfree(fb_info->pseudo_palette); error_pseudo_pallette: +error_panel_enable: clk_put(host->clk); error_getclock: error_getpin: @@ -901,19 +947,6 @@ static void mxsfb_shutdown(struct platform_device *pdev) writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR); } -static struct platform_device_id mxsfb_devtype[] = { - { - .name = "imx23-fb", - .driver_data = MXSFB_V3, - }, { - .name = "imx28-fb", - .driver_data = MXSFB_V4, - }, { - /* sentinel */ - } -}; -MODULE_DEVICE_TABLE(platform, mxsfb_devtype); - static struct platform_driver mxsfb_driver = { .probe = mxsfb_probe, .remove = __devexit_p(mxsfb_remove), @@ -921,6 +954,7 @@ static struct platform_driver mxsfb_driver = { .id_table = mxsfb_devtype, .driver = { .name = DRIVER_NAME, + .of_match_table = mxsfb_dt_ids, }, }; diff --git a/trunk/arch/arm/mach-mxs/include/mach/mxsfb.h b/trunk/include/linux/mxsfb.h similarity index 95% rename from trunk/arch/arm/mach-mxs/include/mach/mxsfb.h rename to trunk/include/linux/mxsfb.h index e4d79791515e..f14943d55315 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/mxsfb.h +++ b/trunk/include/linux/mxsfb.h @@ -14,8 +14,8 @@ * MA 02110-1301, USA. */ -#ifndef __MACH_FB_H -#define __MACH_FB_H +#ifndef __LINUX_MXSFB_H +#define __LINUX_MXSFB_H #include @@ -46,4 +46,4 @@ struct mxsfb_platform_data { */ }; -#endif /* __MACH_FB_H */ +#endif /* __LINUX_MXSFB_H */ diff --git a/trunk/include/linux/platform_data/clk-nomadik.h b/trunk/include/linux/platform_data/clk-nomadik.h new file mode 100644 index 000000000000..5713c87b2477 --- /dev/null +++ b/trunk/include/linux/platform_data/clk-nomadik.h @@ -0,0 +1,2 @@ +/* Minimal platform data header */ +void nomadik_clk_init(void);