From 292259b7a4562c816c4ae4bfab9ea94c8eaa94c3 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 16 Sep 2005 16:59:20 -0700 Subject: [PATCH] --- yaml --- r: 9053 b: refs/heads/master c: 1cbf07478bbf3e350a2025bc5ea23fedaa95855a h: refs/heads/master i: 9051: 55f03aa6297a6701b5bc3f57f8995328665a87f9 v: v3 --- [refs] | 2 +- trunk/drivers/net/tg3.c | 8 +++++--- trunk/include/linux/pci_ids.h | 1 + 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 3a7517ea3df8..1b5ba9310ec5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 67e6b629212fa9ffb7420e8a88a41806af637e28 +refs/heads/master: 1cbf07478bbf3e350a2025bc5ea23fedaa95855a diff --git a/trunk/drivers/net/tg3.c b/trunk/drivers/net/tg3.c index 7599f52e15b3..52eae9f096e2 100644 --- a/trunk/drivers/net/tg3.c +++ b/trunk/drivers/net/tg3.c @@ -67,8 +67,8 @@ #define DRV_MODULE_NAME "tg3" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "3.39" -#define DRV_MODULE_RELDATE "September 5, 2005" +#define DRV_MODULE_VERSION "3.40" +#define DRV_MODULE_RELDATE "September 15, 2005" #define TG3_DEF_MAC_MODE 0 #define TG3_DEF_RX_MODE 0 @@ -9271,6 +9271,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) static struct pci_device_id write_reorder_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_AMD_K8_NB) }, { }, }; u32 misc_ctrl_reg; @@ -9285,7 +9287,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) tp->tg3_flags2 |= TG3_FLG2_SUN_570X; #endif - /* If we have an AMD 762 chipset, write + /* If we have an AMD 762 or K8 chipset, write * reordering to the mailbox registers done by the host * controller can cause major troubles. We read back from * every mailbox register write to force the writes to be diff --git a/trunk/include/linux/pci_ids.h b/trunk/include/linux/pci_ids.h index 72fe3385743c..3dc161894c7b 100644 --- a/trunk/include/linux/pci_ids.h +++ b/trunk/include/linux/pci_ids.h @@ -491,6 +491,7 @@ #define PCI_DEVICE_ID_AMI_MEGARAID2 0x9060 #define PCI_VENDOR_ID_AMD 0x1022 +#define PCI_DEVICE_ID_AMD_K8_NB 0x1100 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 #define PCI_DEVICE_ID_AMD_SCSI 0x2020