From 2ba5e2160696eb4f759e8f17c064a84e2dae5fff Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Thu, 27 Nov 2008 17:08:42 +0800 Subject: [PATCH] --- yaml --- r: 123658 b: refs/heads/master c: d15313e685759a676222ad85247ad8e1c138b9c7 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-pxa/include/mach/pxa-regs.h | 13 ------------- 2 files changed, 1 insertion(+), 14 deletions(-) diff --git a/[refs] b/[refs] index 7f900404b1f2..f6aab08ba3ad 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: b40ddf575883ceca303906556bcd0cff5c284fef +refs/heads/master: d15313e685759a676222ad85247ad8e1c138b9c7 diff --git a/trunk/arch/arm/mach-pxa/include/mach/pxa-regs.h b/trunk/arch/arm/mach-pxa/include/mach/pxa-regs.h index 9b44eb93abc8..6661ba481498 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/pxa-regs.h +++ b/trunk/arch/arm/mach-pxa/include/mach/pxa-regs.h @@ -419,19 +419,6 @@ #define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ -/* - * Pulse Width Modulator - */ - -#define PWM_CTRL0 __REG(0x40B00000) /* PWM 0 Control Register */ -#define PWM_PWDUTY0 __REG(0x40B00004) /* PWM 0 Duty Cycle Register */ -#define PWM_PERVAL0 __REG(0x40B00008) /* PWM 0 Period Control Register */ - -#define PWM_CTRL1 __REG(0x40C00000) /* PWM 1Control Register */ -#define PWM_PWDUTY1 __REG(0x40C00004) /* PWM 1 Duty Cycle Register */ -#define PWM_PERVAL1 __REG(0x40C00008) /* PWM 1 Period Control Register */ - - /* * Interrupt Controller */