From 2d6aea7891ef506c00f371723f37a994e79fd7c7 Mon Sep 17 00:00:00 2001 From: Atul Dahiya Date: Fri, 8 Oct 2010 21:00:02 +0900 Subject: [PATCH] --- yaml --- r: 212645 b: refs/heads/master c: 3d4af5cac77f8d4f7422b1d00cb9e67000f94301 h: refs/heads/master i: 212643: 7fdf9be268e4df8697ae26a171517cda17f5df2e v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-s5p64x0/gpio.c | 5 ----- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 598bf57bb160..665494989e94 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d7297612ae53dfaf88b702f89a153d3da52bcd31 +refs/heads/master: 3d4af5cac77f8d4f7422b1d00cb9e67000f94301 diff --git a/trunk/arch/arm/mach-s5p64x0/gpio.c b/trunk/arch/arm/mach-s5p64x0/gpio.c index 131eefe0c9f2..39159dd5a29a 100644 --- a/trunk/arch/arm/mach-s5p64x0/gpio.c +++ b/trunk/arch/arm/mach-s5p64x0/gpio.c @@ -132,7 +132,6 @@ int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, { void __iomem *reg = chip->base; unsigned int shift; - unsigned long flags; u32 con; switch (off) { @@ -158,15 +157,11 @@ int s5p64x0_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip, cfg <<= shift; } - s3c_gpio_lock(chip, flags); - con = __raw_readl(reg); con &= ~(0xf << shift); con |= cfg; __raw_writel(con, reg); - s3c_gpio_unlock(chip, flags); - return 0; }