From 2db103d5aec167c9d4750f84274189e83b68b4e7 Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@snapgear.com>
Date: Wed, 2 Nov 2005 15:03:09 +1000
Subject: [PATCH] --- yaml --- r: 12125 b: refs/heads/master c:
 4f4ef2967e1e8dce43e9cf7186aeb60a8c33aaf4 h: refs/heads/master i:   12123:
 3a9bb50449f2cf4b82e17c5b037bb66113023eea v: v3

---
 [refs]                                 |  2 +-
 trunk/include/asm-m68knommu/mcfcache.h | 14 ++++++++++++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index d9d57d126c4f..f4988cd9cea3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7354b62cf799d91e69e38603a139a79df48b23d9
+refs/heads/master: 4f4ef2967e1e8dce43e9cf7186aeb60a8c33aaf4
diff --git a/trunk/include/asm-m68knommu/mcfcache.h b/trunk/include/asm-m68knommu/mcfcache.h
index b17cd920977f..9cb401421835 100644
--- a/trunk/include/asm-m68knommu/mcfcache.h
+++ b/trunk/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
 .endm
 #endif /* CONFIG_M5407 */
 
+#if defined(CONFIG_M520x)
+.macro CACHE_ENABLE
+	move.l	#0x01000000,%d0		/* invalidate whole cache */
+	movec	%d0,%CACR
+	nop
+	move.l	#0x0000c000,%d0		/* set SDRAM cached (write-thru) */
+	movec	%d0,%ACR0
+	move.l	#0x00000000,%d0		/* no other regions cached */
+	movec	%d0,%ACR1
+	move.l	#0x80400000,%d0		/* enable 8K instruction cache */
+	movec	%d0,%CACR
+	nop
+.endm
+#endif /* CONFIG_M520x */
 
 /****************************************************************************/
 #endif	/* __M68KNOMMU_MCFCACHE_H */