From 2e50c6741c655b9f52bca7888faa55f76cff60af Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 19 Jan 2012 10:50:05 -0800 Subject: [PATCH] --- yaml --- r: 293542 b: refs/heads/master c: 8d79c3490aecfe6e51f0ba6f9780746fb1434954 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_ringbuffer.c | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 1f6dd7ead10b..216368aab8d1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8e636784b6f76653d358d521af9c2a8c246df38b +refs/heads/master: 8d79c3490aecfe6e51f0ba6f9780746fb1434954 diff --git a/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c b/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c index 77e729d4e4f0..b3da17af8997 100644 --- a/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/trunk/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -399,8 +399,6 @@ static int init_render_ring(struct intel_ring_buffer *ring) if (INTEL_INFO(dev)->gen > 3) { int mode = VS_TIMER_DISPATCH << 16 | VS_TIMER_DISPATCH; - if (IS_GEN6(dev) || IS_GEN7(dev)) - mode |= MI_FLUSH_ENABLE << 16 | MI_FLUSH_ENABLE; I915_WRITE(MI_MODE, mode); if (IS_GEN7(dev)) I915_WRITE(GFX_MODE_GEN7,