diff --git a/[refs] b/[refs]
index 6b7c5c1e6e42..2555d6722aa9 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ff92a6cda74c0a51cb723f5e224124cf74e62f25
+refs/heads/master: 1072856a1c604726be6a8adfb6b2c86033e6a314
diff --git a/trunk/drivers/gpu/drm/nouveau/nv50_vram.c b/trunk/drivers/gpu/drm/nouveau/nv50_vram.c
index 2e45e57fd869..840696694611 100644
--- a/trunk/drivers/gpu/drm/nouveau/nv50_vram.c
+++ b/trunk/drivers/gpu/drm/nouveau/nv50_vram.c
@@ -189,8 +189,24 @@ nv50_vram_init(struct drm_device *dev)
 	struct nouveau_vram_engine *vram = &dev_priv->engine.vram;
 	const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
 	const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
+	u32 pfb714 = nv_rd32(dev, 0x100714);
 	u32 rblock, length;
 
+	switch (pfb714 & 0x00000007) {
+	case 0: dev_priv->vram_type = NV_MEM_TYPE_DDR1; break;
+	case 1:
+		if (0 /* some currently unknown condition */)
+			dev_priv->vram_type = NV_MEM_TYPE_DDR2;
+		else
+			dev_priv->vram_type = NV_MEM_TYPE_DDR3;
+		break;
+	case 2: dev_priv->vram_type = NV_MEM_TYPE_GDDR3; break;
+	case 3: dev_priv->vram_type = NV_MEM_TYPE_GDDR4; break;
+	case 4: dev_priv->vram_type = NV_MEM_TYPE_GDDR5; break;
+	default:
+		break;
+	}
+
 	dev_priv->vram_size  = nv_rd32(dev, 0x10020c);
 	dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32;
 	dev_priv->vram_size &= 0xffffffff00ULL;