From 316ffb8b7861130625b2a8e558fe34a3468c220d Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 23 Apr 2013 17:46:22 +0200 Subject: [PATCH] --- yaml --- r: 374219 b: refs/heads/master c: 5b5ff97d2c46c52d2a86208509633230c9a486ec h: refs/heads/master i: 374217: eac4e87ab0e20f016782a7b251255ab7333a610d 374215: 608aa12a50739c97aaff3e4757a28a1fcba69d47 v: v3 --- [refs] | 2 +- .../devicetree/bindings/pwm/pwm-samsung.txt | 43 +++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 trunk/Documentation/devicetree/bindings/pwm/pwm-samsung.txt diff --git a/[refs] b/[refs] index 1dd87598add6..3fa296b7586d 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f11899894c0a683c754ca71b45f7c9c3d35a3a1c +refs/heads/master: 5b5ff97d2c46c52d2a86208509633230c9a486ec diff --git a/trunk/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/trunk/Documentation/devicetree/bindings/pwm/pwm-samsung.txt new file mode 100644 index 000000000000..ac67c687a327 --- /dev/null +++ b/trunk/Documentation/devicetree/bindings/pwm/pwm-samsung.txt @@ -0,0 +1,43 @@ +* Samsung PWM timers + +Samsung SoCs contain PWM timer blocks which can be used for system clock source +and clock event timers, as well as to drive SoC outputs with PWM signal. Each +PWM timer block provides 5 PWM channels (not all of them can drive physical +outputs - see SoC and board manual). + +Be aware that the clocksource driver supports only uniprocessor systems. + +Required properties: +- compatible : should be one of following: + samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs + samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs + samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs + samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, + Exynos4210 rev0 SoCs + samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210, + Exynos4x12 and Exynos5250 SoCs +- reg: base address and size of register area +- interrupts: list of timer interrupts (one interrupt per timer, starting at + timer 0) +- #pwm-cells: number of cells used for PWM specifier - must be 3 + the specifier format is as follows: + - phandle to PWM controller node + - index of PWM channel (from 0 to 4) + - PWM signal period in nanoseconds + - bitmask of optional PWM flags: + 0x1 - invert PWM signal + +Optional properties: +- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular + platform - an array of up to 5 elements being indices of PWM channels + (from 0 to 4), the order does not matter. + +Example: + pwm@7f006000 { + compatible = "samsung,s3c6400-pwm"; + reg = <0x7f006000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <23>, <24>, <25>, <27>, <28>; + samsung,pwm-outputs = <0>, <1>; + #pwm-cells = <3>; + }