From 328efc7fe0a83acdd43da0f321433b6b585aa230 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 2 Aug 2011 20:49:57 -1000 Subject: [PATCH] --- yaml --- r: 262222 b: refs/heads/master c: a6b11f53388973d99c4a357c22b19753b424e73c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/Documentation/ABI/testing/pstore | 6 + .../Documentation/device-mapper/dm-crypt.txt | 21 +- .../Documentation/device-mapper/dm-flakey.txt | 48 +- trunk/Documentation/device-mapper/dm-raid.txt | 138 +- trunk/Documentation/dmaengine.txt | 234 ++- trunk/Documentation/kernel-parameters.txt | 2 + trunk/arch/arm/mach-msm/Kconfig | 4 + trunk/arch/arm/mach-msm/Makefile | 8 - trunk/arch/arm/mach-msm/gpio.c | 376 ---- trunk/arch/arm/mach-msm/gpio_hw.h | 278 --- trunk/arch/arm/mach-msm/gpiomux.h | 17 +- .../arm/mach-msm/include/mach/msm_gpiomux.h | 38 + .../mach-msm/include/mach/msm_iomap-7x00.h | 10 +- .../mach-msm/include/mach/msm_iomap-7x30.h | 10 +- .../mach-msm/include/mach/msm_iomap-8x50.h | 10 +- .../arm/mach-msm/include/mach/msm_iomap.h | 2 + trunk/arch/arm/mach-msm/io.c | 12 +- trunk/arch/arm/mach-omap2/display.c | 26 +- trunk/arch/arm/mach-shmobile/clock-sh7367.c | 3 - trunk/arch/arm/mach-shmobile/clock-sh7372.c | 4 - trunk/arch/arm/mach-shmobile/clock-sh7377.c | 3 - trunk/arch/arm/mach-shmobile/clock-sh73a0.c | 4 - trunk/arch/ia64/Kconfig | 4 + trunk/arch/ia64/include/asm/gpio.h | 55 + trunk/arch/sh/Makefile | 1 + trunk/arch/sh/boards/board-apsh4a3a.c | 2 +- trunk/arch/sh/boards/board-apsh4ad0a.c | 2 +- trunk/arch/sh/boards/board-sh7785lcr.c | 2 +- trunk/arch/sh/boards/board-urquell.c | 2 +- trunk/arch/sh/boards/mach-highlander/setup.c | 2 - trunk/arch/sh/boards/mach-sdk7786/setup.c | 2 +- trunk/arch/sh/include/cpu-sh3/cpu/serial.h | 10 + trunk/arch/sh/include/cpu-sh4a/cpu/serial.h | 7 + trunk/arch/sh/kernel/cpu/clock-cpg.c | 2 - trunk/arch/sh/kernel/cpu/sh3/Makefile | 18 +- trunk/arch/sh/kernel/cpu/sh3/serial-sh770x.c | 33 + trunk/arch/sh/kernel/cpu/sh3/serial-sh7710.c | 20 + trunk/arch/sh/kernel/cpu/sh3/serial-sh7720.c | 37 + trunk/arch/sh/kernel/cpu/sh3/setup-sh7705.c | 5 + trunk/arch/sh/kernel/cpu/sh3/setup-sh770x.c | 9 + trunk/arch/sh/kernel/cpu/sh3/setup-sh7720.c | 5 + trunk/arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 2 - trunk/arch/sh/kernel/cpu/sh4/setup-sh7750.c | 4 +- trunk/arch/sh/kernel/cpu/sh4/setup-sh7760.c | 4 + trunk/arch/sh/kernel/cpu/sh4a/Makefile | 2 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7343.c | 33 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7366.c | 25 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 46 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 4 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 84 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7757.c | 36 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7763.c | 2 - trunk/arch/sh/kernel/cpu/sh4a/clock-sh7780.c | 2 - trunk/arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 79 +- trunk/arch/sh/kernel/cpu/sh4a/clock-sh7786.c | 115 +- trunk/arch/sh/kernel/cpu/sh4a/clock-shx3.c | 67 +- trunk/arch/sh/kernel/cpu/sh4a/serial-sh7722.c | 23 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 1 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 7 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 9 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 9 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 3 + trunk/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 3 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 8 +- trunk/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 8 +- trunk/drivers/acpi/apei/erst.c | 20 +- trunk/drivers/base/devtmpfs.c | 2 +- trunk/drivers/dma/TODO | 1 - trunk/drivers/dma/amba-pl08x.c | 246 +-- trunk/drivers/dma/at_hdmac.c | 4 +- trunk/drivers/dma/coh901318.c | 19 +- trunk/drivers/dma/dmaengine.c | 4 +- trunk/drivers/dma/ep93xx_dma.c | 2 +- trunk/drivers/dma/imx-sdma.c | 4 +- trunk/drivers/dma/intel_mid_dma.c | 2 - trunk/drivers/dma/ipu/ipu_idmac.c | 6 +- trunk/drivers/dma/mv_xor.c | 3 +- trunk/drivers/dma/mxs-dma.c | 13 +- trunk/drivers/dma/pch_dma.c | 127 +- trunk/drivers/dma/pl330.c | 64 +- trunk/drivers/dma/shdma.c | 88 +- trunk/drivers/dma/shdma.h | 4 + trunk/drivers/dma/ste_dma40.c | 270 +-- trunk/drivers/dma/ste_dma40_ll.h | 3 - trunk/drivers/firmware/efivars.c | 243 ++- trunk/drivers/gpio/Kconfig | 16 + trunk/drivers/gpio/Makefile | 2 + trunk/drivers/gpio/gpio-ab8500.c | 2 +- trunk/drivers/gpio/gpio-msm-v1.c | 636 +++++++ .../gpio-v2.c => drivers/gpio/gpio-msm-v2.c} | 4 +- trunk/drivers/md/Kconfig | 5 +- trunk/drivers/md/dm-crypt.c | 62 +- trunk/drivers/md/dm-flakey.c | 270 ++- trunk/drivers/md/dm-io.c | 29 +- trunk/drivers/md/dm-ioctl.c | 89 +- trunk/drivers/md/dm-kcopyd.c | 42 +- trunk/drivers/md/dm-log-userspace-base.c | 3 +- trunk/drivers/md/dm-log.c | 32 +- trunk/drivers/md/dm-mpath.c | 147 +- trunk/drivers/md/dm-raid.c | 621 ++++++- trunk/drivers/md/dm-snap-persistent.c | 80 +- trunk/drivers/md/dm-snap.c | 84 +- trunk/drivers/md/dm-table.c | 155 +- trunk/drivers/md/dm.c | 75 +- trunk/drivers/md/dm.h | 2 + trunk/drivers/of/gpio.c | 5 +- trunk/drivers/regulator/core.c | 190 +- trunk/drivers/regulator/dummy.c | 32 +- trunk/drivers/regulator/tps65910-regulator.c | 63 +- trunk/drivers/regulator/twl-regulator.c | 66 +- trunk/drivers/regulator/wm831x-dcdc.c | 126 +- trunk/drivers/regulator/wm831x-ldo.c | 25 +- trunk/drivers/regulator/wm8994-regulator.c | 4 +- trunk/drivers/sh/clk/core.c | 29 +- trunk/drivers/spi/spi-pl022.c | 11 +- trunk/drivers/tty/serial/Kconfig | 2 +- trunk/drivers/tty/serial/sh-sci.c | 757 +++++--- trunk/drivers/tty/serial/sh-sci.h | 434 +---- .../drivers/video/omap2/displays/panel-taal.c | 55 +- trunk/drivers/video/omap2/dss/Kconfig | 12 - trunk/drivers/video/omap2/dss/core.c | 21 +- trunk/drivers/video/omap2/dss/dispc.c | 562 +++--- trunk/drivers/video/omap2/dss/display.c | 57 +- trunk/drivers/video/omap2/dss/dpi.c | 73 +- trunk/drivers/video/omap2/dss/dsi.c | 296 +-- trunk/drivers/video/omap2/dss/dss.c | 583 ++---- trunk/drivers/video/omap2/dss/dss.h | 54 +- trunk/drivers/video/omap2/dss/dss_features.c | 36 +- trunk/drivers/video/omap2/dss/dss_features.h | 7 + trunk/drivers/video/omap2/dss/hdmi.c | 162 +- trunk/drivers/video/omap2/dss/manager.c | 351 ++-- trunk/drivers/video/omap2/dss/overlay.c | 27 +- trunk/drivers/video/omap2/dss/rfbi.c | 114 +- trunk/drivers/video/omap2/dss/sdi.c | 40 +- trunk/drivers/video/omap2/dss/venc.c | 183 +- .../drivers/video/omap2/omapfb/omapfb-ioctl.c | 72 +- .../drivers/video/omap2/omapfb/omapfb-main.c | 166 +- .../drivers/video/omap2/omapfb/omapfb-sysfs.c | 34 + trunk/drivers/video/omap2/omapfb/omapfb.h | 37 +- trunk/drivers/watchdog/Kconfig | 3 - trunk/drivers/watchdog/nv_tco.c | 8 + trunk/drivers/watchdog/shwdt.c | 2 +- trunk/fs/9p/acl.c | 6 +- trunk/fs/9p/acl.h | 4 +- trunk/fs/9p/vfs_inode_dotl.c | 6 +- trunk/fs/block_dev.c | 1 + trunk/fs/btrfs/acl.c | 10 +- trunk/fs/btrfs/inode.c | 47 +- trunk/fs/cifs/cifsencrypt.c | 16 +- trunk/fs/cifs/cifsfs.c | 18 - trunk/fs/cifs/cifsfs.h | 4 - trunk/fs/cifs/cifsglob.h | 2 - trunk/fs/cifs/cifssmb.c | 6 +- trunk/fs/cifs/connect.c | 659 +++---- trunk/fs/cifs/file.c | 27 +- trunk/fs/cifs/misc.c | 11 +- trunk/fs/cifs/sess.c | 3 +- trunk/fs/dcache.c | 69 +- trunk/fs/ext2/acl.c | 8 +- trunk/fs/ext3/acl.c | 9 +- trunk/fs/ext4/Makefile | 2 +- trunk/fs/ext4/acl.c | 9 +- trunk/fs/ext4/balloc.c | 48 + trunk/fs/ext4/block_validity.c | 21 + trunk/fs/ext4/ext4.h | 55 +- trunk/fs/ext4/extents.c | 129 +- trunk/fs/ext4/fsync.c | 26 +- trunk/fs/ext4/ialloc.c | 2 +- trunk/fs/ext4/indirect.c | 1482 +++++++++++++++ trunk/fs/ext4/inode.c | 1596 +---------------- trunk/fs/ext4/ioctl.c | 12 +- trunk/fs/ext4/mballoc.c | 230 ++- trunk/fs/ext4/mballoc.h | 1 - trunk/fs/ext4/namei.c | 21 +- trunk/fs/ext4/page-io.c | 6 +- trunk/fs/ext4/resize.c | 199 +- trunk/fs/ext4/super.c | 88 +- trunk/fs/ext4/truncate.h | 43 + trunk/fs/generic_acl.c | 13 +- trunk/fs/gfs2/acl.c | 6 +- trunk/fs/hppfs/hppfs.c | 1 + trunk/fs/inode.c | 13 +- trunk/fs/jbd2/checkpoint.c | 5 +- trunk/fs/jbd2/journal.c | 67 - trunk/fs/jffs2/acl.c | 4 +- trunk/fs/jffs2/acl.h | 2 +- trunk/fs/jffs2/fs.c | 2 +- trunk/fs/jffs2/os-linux.h | 2 +- trunk/fs/jfs/acl.c | 4 +- trunk/fs/jfs/xattr.c | 4 +- trunk/fs/namei.c | 24 +- trunk/fs/nfs/nfs3acl.c | 2 +- trunk/fs/nfs/nfs3proc.c | 6 +- trunk/fs/ocfs2/acl.c | 4 +- trunk/fs/posix_acl.c | 16 +- trunk/fs/pstore/inode.c | 12 +- trunk/fs/pstore/internal.h | 2 +- trunk/fs/pstore/platform.c | 30 +- trunk/fs/reiserfs/xattr_acl.c | 10 +- trunk/fs/xfs/linux-2.6/xfs_acl.c | 6 +- trunk/include/linux/amba/pl08x.h | 9 +- trunk/include/linux/device-mapper.h | 43 + trunk/include/linux/dm-ioctl.h | 4 +- trunk/include/linux/dm-kcopyd.h | 15 + trunk/include/linux/efi.h | 6 + trunk/include/linux/fs.h | 9 +- trunk/include/linux/jbd2.h | 6 - trunk/include/linux/nfs_fs.h | 4 +- trunk/include/linux/of_gpio.h | 9 + trunk/include/linux/posix_acl.h | 8 +- trunk/include/linux/pstore.h | 9 +- trunk/include/linux/regulator/consumer.h | 3 + trunk/include/linux/regulator/driver.h | 4 +- trunk/include/linux/serial_sci.h | 75 + trunk/include/linux/sh_clk.h | 4 + trunk/include/linux/sh_dma.h | 8 + trunk/include/trace/events/ext4.h | 87 +- trunk/include/trace/events/jbd2.h | 36 +- trunk/include/video/omapdss.h | 26 +- trunk/kernel/debug/gdbstub.c | 22 +- trunk/kernel/debug/kdb/kdb_bt.c | 5 +- trunk/kernel/debug/kdb/kdb_cmds | 4 - trunk/kernel/debug/kdb/kdb_debugger.c | 21 +- trunk/kernel/debug/kdb/kdb_io.c | 36 +- trunk/kernel/debug/kdb/kdb_main.c | 4 +- trunk/kernel/debug/kdb/kdb_private.h | 3 +- trunk/mm/oom_kill.c | 4 +- trunk/sound/core/pcm_compat.c | 2 +- trunk/sound/core/rtctimer.c | 2 +- trunk/sound/pci/asihpi/hpidspcd.c | 9 +- trunk/sound/pci/asihpi/hpioctl.c | 19 +- trunk/sound/pci/rme9652/hdspm.c | 109 +- trunk/sound/soc/txx9/txx9aclc.c | 1 + 234 files changed, 9090 insertions(+), 6857 deletions(-) delete mode 100644 trunk/arch/arm/mach-msm/gpio.c delete mode 100644 trunk/arch/arm/mach-msm/gpio_hw.h create mode 100644 trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h create mode 100644 trunk/arch/ia64/include/asm/gpio.h create mode 100644 trunk/arch/sh/include/cpu-sh3/cpu/serial.h create mode 100644 trunk/arch/sh/include/cpu-sh4a/cpu/serial.h create mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh770x.c create mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh7710.c create mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh7720.c create mode 100644 trunk/arch/sh/kernel/cpu/sh4a/serial-sh7722.c create mode 100644 trunk/drivers/gpio/gpio-msm-v1.c rename trunk/{arch/arm/mach-msm/gpio-v2.c => drivers/gpio/gpio-msm-v2.c} (99%) create mode 100644 trunk/fs/ext4/indirect.c create mode 100644 trunk/fs/ext4/truncate.h diff --git a/[refs] b/[refs] index 9322cbae23c1..ed064ff7f4af 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d945fa0da7db9ace61fbb2140cfdb1e2d2b24e7e +refs/heads/master: a6b11f53388973d99c4a357c22b19753b424e73c diff --git a/trunk/Documentation/ABI/testing/pstore b/trunk/Documentation/ABI/testing/pstore index ddf451ee2a08..ff1df4e3b059 100644 --- a/trunk/Documentation/ABI/testing/pstore +++ b/trunk/Documentation/ABI/testing/pstore @@ -39,3 +39,9 @@ Description: Generic interface to platform dependent persistent storage. multiple) files based on the record size of the underlying persistent storage until at least this amount is reached. Default is 10 Kbytes. + + Pstore only supports one backend at a time. If multiple + backends are available, the preferred backend may be + set by passing the pstore.backend= argument to the kernel at + boot time. + diff --git a/trunk/Documentation/device-mapper/dm-crypt.txt b/trunk/Documentation/device-mapper/dm-crypt.txt index 6b5c42dbbe84..2c656ae43ba7 100644 --- a/trunk/Documentation/device-mapper/dm-crypt.txt +++ b/trunk/Documentation/device-mapper/dm-crypt.txt @@ -4,7 +4,8 @@ dm-crypt Device-Mapper's "crypt" target provides transparent encryption of block devices using the kernel crypto API. -Parameters: +Parameters: \ + [<#opt_params> ] Encryption cipher and an optional IV generation mode. @@ -37,6 +38,24 @@ Parameters: Starting sector within the device where the encrypted data begins. +<#opt_params> + Number of optional parameters. If there are no optional parameters, + the optional paramaters section can be skipped or #opt_params can be zero. + Otherwise #opt_params is the number of following arguments. + + Example of optional parameters section: + 1 allow_discards + +allow_discards + Block discard requests (a.k.a. TRIM) are passed through the crypt device. + The default is to ignore discard requests. + + WARNING: Assess the specific security risks carefully before enabling this + option. For example, allowing discards on encrypted devices may lead to + the leak of information about the ciphertext device (filesystem type, + used space etc.) if the discarded blocks can be located easily on the + device later. + Example scripts =============== LUKS (Linux Unified Key Setup) is now the preferred way to set up disk diff --git a/trunk/Documentation/device-mapper/dm-flakey.txt b/trunk/Documentation/device-mapper/dm-flakey.txt index c8efdfd19a65..6ff5c2327227 100644 --- a/trunk/Documentation/device-mapper/dm-flakey.txt +++ b/trunk/Documentation/device-mapper/dm-flakey.txt @@ -1,17 +1,53 @@ dm-flakey ========= -This target is the same as the linear target except that it returns I/O -errors periodically. It's been found useful in simulating failing -devices for testing purposes. +This target is the same as the linear target except that it exhibits +unreliable behaviour periodically. It's been found useful in simulating +failing devices for testing purposes. Starting from the time the table is loaded, the device is available for - seconds, then returns errors for seconds, -and then this cycle repeats. + seconds, then exhibits unreliable behaviour for seconds, and then this cycle repeats. -Parameters: +Also, consider using this in combination with the dm-delay target too, +which can delay reads and writes and/or send them to different +underlying devices. + +Table parameters +---------------- + \ + [ []] + +Mandatory parameters: : Full pathname to the underlying block-device, or a "major:minor" device-number. : Starting sector within the device. : Number of seconds device is available. : Number of seconds device returns errors. + +Optional feature parameters: + If no feature parameters are present, during the periods of + unreliability, all I/O returns errors. + + drop_writes: + All write I/O is silently ignored. + Read I/O is handled correctly. + + corrupt_bio_byte : + During , replace of the data of + each matching bio with . + + : The offset of the byte to replace. + Counting starts at 1, to replace the first byte. + : Either 'r' to corrupt reads or 'w' to corrupt writes. + 'w' is incompatible with drop_writes. + : The value (from 0-255) to write. + : Perform the replacement only if bio->bi_rw has all the + selected flags set. + +Examples: + corrupt_bio_byte 32 r 1 0 + - replaces the 32nd byte of READ bios with the value 1 + + corrupt_bio_byte 224 w 0 32 + - replaces the 224th byte of REQ_META (=32) bios with the value 0 diff --git a/trunk/Documentation/device-mapper/dm-raid.txt b/trunk/Documentation/device-mapper/dm-raid.txt index 33b6b7071ac8..2a8c11331d2d 100644 --- a/trunk/Documentation/device-mapper/dm-raid.txt +++ b/trunk/Documentation/device-mapper/dm-raid.txt @@ -1,70 +1,108 @@ -Device-mapper RAID (dm-raid) is a bridge from DM to MD. It -provides a way to use device-mapper interfaces to access the MD RAID -drivers. +dm-raid +------- -As with all device-mapper targets, the nominal public interfaces are the -constructor (CTR) tables and the status outputs (both STATUSTYPE_INFO -and STATUSTYPE_TABLE). The CTR table looks like the following: +The device-mapper RAID (dm-raid) target provides a bridge from DM to MD. +It allows the MD RAID drivers to be accessed using a device-mapper +interface. -1: raid \ -2: <#raid_params> \ -3: <#raid_devs> .. - -Line 1 contains the standard first three arguments to any device-mapper -target - the start, length, and target type fields. The target type in -this case is "raid". - -Line 2 contains the arguments that define the particular raid -type/personality/level, the required arguments for that raid type, and -any optional arguments. Possible raid types include: raid4, raid5_la, -raid5_ls, raid5_rs, raid6_zr, raid6_nr, and raid6_nc. (raid1 is -planned for the future.) The list of required and optional parameters -is the same for all the current raid types. The required parameters are -positional, while the optional parameters are given as key/value pairs. -The possible parameters are as follows: - Chunk size in sectors. - [[no]sync] Force/Prevent RAID initialization - [rebuild ] Rebuild the drive indicated by the index - [daemon_sleep ] Time between bitmap daemon work to clear bits - [min_recovery_rate ] Throttle RAID initialization - [max_recovery_rate ] Throttle RAID initialization - [max_write_behind ] See '-write-behind=' (man mdadm) - [stripe_cache ] Stripe cache size for higher RAIDs - -Line 3 contains the list of devices that compose the array in -metadata/data device pairs. If the metadata is stored separately, a '-' -is given for the metadata device position. If a drive has failed or is -missing at creation time, a '-' can be given for both the metadata and -data drives for a given position. - -NB. Currently all metadata devices must be specified as '-'. - -Examples: -# RAID4 - 4 data drives, 1 parity +The target is named "raid" and it accepts the following parameters: + + <#raid_params> \ + <#raid_devs> [.. ] + +: + raid1 RAID1 mirroring + raid4 RAID4 dedicated parity disk + raid5_la RAID5 left asymmetric + - rotating parity 0 with data continuation + raid5_ra RAID5 right asymmetric + - rotating parity N with data continuation + raid5_ls RAID5 left symmetric + - rotating parity 0 with data restart + raid5_rs RAID5 right symmetric + - rotating parity N with data restart + raid6_zr RAID6 zero restart + - rotating parity zero (left-to-right) with data restart + raid6_nr RAID6 N restart + - rotating parity N (right-to-left) with data restart + raid6_nc RAID6 N continue + - rotating parity N (right-to-left) with data continuation + + Refererence: Chapter 4 of + http://www.snia.org/sites/default/files/SNIA_DDF_Technical_Position_v2.0.pdf + +<#raid_params>: The number of parameters that follow. + + consists of + Mandatory parameters: + : Chunk size in sectors. This parameter is often known as + "stripe size". It is the only mandatory parameter and + is placed first. + + followed by optional parameters (in any order): + [sync|nosync] Force or prevent RAID initialization. + + [rebuild ] Rebuild drive number idx (first drive is 0). + + [daemon_sleep ] + Interval between runs of the bitmap daemon that + clear bits. A longer interval means less bitmap I/O but + resyncing after a failure is likely to take longer. + + [min_recovery_rate ] Throttle RAID initialization + [max_recovery_rate ] Throttle RAID initialization + [write_mostly ] Drive index is write-mostly + [max_write_behind ] See '-write-behind=' (man mdadm) + [stripe_cache ] Stripe cache size (higher RAIDs only) + [region_size ] + The region_size multiplied by the number of regions is the + logical size of the array. The bitmap records the device + synchronisation state for each region. + +<#raid_devs>: The number of devices composing the array. + Each device consists of two entries. The first is the device + containing the metadata (if any); the second is the one containing the + data. + + If a drive has failed or is missing at creation time, a '-' can be + given for both the metadata and data drives for a given position. + + +Example tables +-------------- +# RAID4 - 4 data drives, 1 parity (no metadata devices) # No metadata devices specified to hold superblock/bitmap info # Chunk size of 1MiB # (Lines separated for easy reading) + 0 1960893648 raid \ raid4 1 2048 \ 5 - 8:17 - 8:33 - 8:49 - 8:65 - 8:81 -# RAID4 - 4 data drives, 1 parity (no metadata devices) +# RAID4 - 4 data drives, 1 parity (with metadata devices) # Chunk size of 1MiB, force RAID initialization, # min recovery rate at 20 kiB/sec/disk + 0 1960893648 raid \ - raid4 4 2048 min_recovery_rate 20 sync\ - 5 - 8:17 - 8:33 - 8:49 - 8:65 - 8:81 + raid4 4 2048 sync min_recovery_rate 20 \ + 5 8:17 8:18 8:33 8:34 8:49 8:50 8:65 8:66 8:81 8:82 -Performing a 'dmsetup table' should display the CTR table used to -construct the mapping (with possible reordering of optional -parameters). +'dmsetup table' displays the table used to construct the mapping. +The optional parameters are always printed in the order listed +above with "sync" or "nosync" always output ahead of the other +arguments, regardless of the order used when originally loading the table. +Arguments that can be repeated are ordered by value. -Performing a 'dmsetup status' will yield information on the state and -health of the array. The output is as follows: +'dmsetup status' yields information on the state and health of the +array. +The output is as follows: 1: raid \ 2: <#devices> <1 health char for each dev> -Line 1 is standard DM output. Line 2 is best shown by example: +Line 1 is the standard output produced by device-mapper. +Line 2 is produced by the raid target, and best explained by example: 0 1960893648 raid raid4 5 AAAAA 2/490221568 Here we can see the RAID type is raid4, there are 5 devices - all of which are 'A'live, and the array is 2/490221568 complete with recovery. +Faulty or missing devices are marked 'D'. Devices that are out-of-sync +are marked 'a'. diff --git a/trunk/Documentation/dmaengine.txt b/trunk/Documentation/dmaengine.txt index 5a0cb1ef6164..94b7e0f96b38 100644 --- a/trunk/Documentation/dmaengine.txt +++ b/trunk/Documentation/dmaengine.txt @@ -10,87 +10,181 @@ NOTE: For DMA Engine usage in async_tx please see: Below is a guide to device driver writers on how to use the Slave-DMA API of the DMA Engine. This is applicable only for slave DMA usage only. -The slave DMA usage consists of following steps +The slave DMA usage consists of following steps: 1. Allocate a DMA slave channel 2. Set slave and controller specific parameters 3. Get a descriptor for transaction -4. Submit the transaction and wait for callback notification +4. Submit the transaction +5. Issue pending requests and wait for callback notification 1. Allocate a DMA slave channel -Channel allocation is slightly different in the slave DMA context, client -drivers typically need a channel from a particular DMA controller only and even -in some cases a specific channel is desired. To request a channel -dma_request_channel() API is used. - -Interface: -struct dma_chan *dma_request_channel(dma_cap_mask_t mask, - dma_filter_fn filter_fn, - void *filter_param); -where dma_filter_fn is defined as: -typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); - -When the optional 'filter_fn' parameter is set to NULL dma_request_channel -simply returns the first channel that satisfies the capability mask. Otherwise, -when the mask parameter is insufficient for specifying the necessary channel, -the filter_fn routine can be used to disposition the available channels in the -system. The filter_fn routine is called once for each free channel in the -system. Upon seeing a suitable channel filter_fn returns DMA_ACK which flags -that channel to be the return value from dma_request_channel. A channel -allocated via this interface is exclusive to the caller, until -dma_release_channel() is called. + + Channel allocation is slightly different in the slave DMA context, + client drivers typically need a channel from a particular DMA + controller only and even in some cases a specific channel is desired. + To request a channel dma_request_channel() API is used. + + Interface: + struct dma_chan *dma_request_channel(dma_cap_mask_t mask, + dma_filter_fn filter_fn, + void *filter_param); + where dma_filter_fn is defined as: + typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); + + The 'filter_fn' parameter is optional, but highly recommended for + slave and cyclic channels as they typically need to obtain a specific + DMA channel. + + When the optional 'filter_fn' parameter is NULL, dma_request_channel() + simply returns the first channel that satisfies the capability mask. + + Otherwise, the 'filter_fn' routine will be called once for each free + channel which has a capability in 'mask'. 'filter_fn' is expected to + return 'true' when the desired DMA channel is found. + + A channel allocated via this interface is exclusive to the caller, + until dma_release_channel() is called. 2. Set slave and controller specific parameters -Next step is always to pass some specific information to the DMA driver. Most of -the generic information which a slave DMA can use is in struct dma_slave_config. -It allows the clients to specify DMA direction, DMA addresses, bus widths, DMA -burst lengths etc. If some DMA controllers have more parameters to be sent then -they should try to embed struct dma_slave_config in their controller specific -structure. That gives flexibility to client to pass more parameters, if -required. - -Interface: -int dmaengine_slave_config(struct dma_chan *chan, - struct dma_slave_config *config) + + Next step is always to pass some specific information to the DMA + driver. Most of the generic information which a slave DMA can use + is in struct dma_slave_config. This allows the clients to specify + DMA direction, DMA addresses, bus widths, DMA burst lengths etc + for the peripheral. + + If some DMA controllers have more parameters to be sent then they + should try to embed struct dma_slave_config in their controller + specific structure. That gives flexibility to client to pass more + parameters, if required. + + Interface: + int dmaengine_slave_config(struct dma_chan *chan, + struct dma_slave_config *config) + + Please see the dma_slave_config structure definition in dmaengine.h + for a detailed explaination of the struct members. Please note + that the 'direction' member will be going away as it duplicates the + direction given in the prepare call. 3. Get a descriptor for transaction -For slave usage the various modes of slave transfers supported by the -DMA-engine are: -slave_sg - DMA a list of scatter gather buffers from/to a peripheral -dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the + + For slave usage the various modes of slave transfers supported by the + DMA-engine are: + + slave_sg - DMA a list of scatter gather buffers from/to a peripheral + dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the operation is explicitly stopped. -The non NULL return of this transfer API represents a "descriptor" for the given -transaction. - -Interface: -struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_sg)( - struct dma_chan *chan, - struct scatterlist *dst_sg, unsigned int dst_nents, - struct scatterlist *src_sg, unsigned int src_nents, + + A non-NULL return of this transfer API represents a "descriptor" for + the given transaction. + + Interface: + struct dma_async_tx_descriptor *(*chan->device->device_prep_slave_sg)( + struct dma_chan *chan, struct scatterlist *sgl, + unsigned int sg_len, enum dma_data_direction direction, unsigned long flags); -struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)( + + struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_data_direction direction); -4. Submit the transaction and wait for callback notification -To schedule the transaction to be scheduled by dma device, the "descriptor" -returned in above (3) needs to be submitted. -To tell the dma driver that a transaction is ready to be serviced, the -descriptor->submit() callback needs to be invoked. This chains the descriptor to -the pending queue. -The transactions in the pending queue can be activated by calling the -issue_pending API. If channel is idle then the first transaction in queue is -started and subsequent ones queued up. -On completion of the DMA operation the next in queue is submitted and a tasklet -triggered. The tasklet would then call the client driver completion callback -routine for notification, if set. -Interface: -void dma_async_issue_pending(struct dma_chan *chan); - -============================================================================== - -Additional usage notes for dma driver writers -1/ Although DMA engine specifies that completion callback routines cannot submit -any new operations, but typically for slave DMA subsequent transaction may not -be available for submit prior to callback routine being called. This requirement -is not a requirement for DMA-slave devices. But they should take care to drop -the spin-lock they might be holding before calling the callback routine + The peripheral driver is expected to have mapped the scatterlist for + the DMA operation prior to calling device_prep_slave_sg, and must + keep the scatterlist mapped until the DMA operation has completed. + The scatterlist must be mapped using the DMA struct device. So, + normal setup should look like this: + + nr_sg = dma_map_sg(chan->device->dev, sgl, sg_len); + if (nr_sg == 0) + /* error */ + + desc = chan->device->device_prep_slave_sg(chan, sgl, nr_sg, + direction, flags); + + Once a descriptor has been obtained, the callback information can be + added and the descriptor must then be submitted. Some DMA engine + drivers may hold a spinlock between a successful preparation and + submission so it is important that these two operations are closely + paired. + + Note: + Although the async_tx API specifies that completion callback + routines cannot submit any new operations, this is not the + case for slave/cyclic DMA. + + For slave DMA, the subsequent transaction may not be available + for submission prior to callback function being invoked, so + slave DMA callbacks are permitted to prepare and submit a new + transaction. + + For cyclic DMA, a callback function may wish to terminate the + DMA via dmaengine_terminate_all(). + + Therefore, it is important that DMA engine drivers drop any + locks before calling the callback function which may cause a + deadlock. + + Note that callbacks will always be invoked from the DMA + engines tasklet, never from interrupt context. + +4. Submit the transaction + + Once the descriptor has been prepared and the callback information + added, it must be placed on the DMA engine drivers pending queue. + + Interface: + dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) + + This returns a cookie can be used to check the progress of DMA engine + activity via other DMA engine calls not covered in this document. + + dmaengine_submit() will not start the DMA operation, it merely adds + it to the pending queue. For this, see step 5, dma_async_issue_pending. + +5. Issue pending DMA requests and wait for callback notification + + The transactions in the pending queue can be activated by calling the + issue_pending API. If channel is idle then the first transaction in + queue is started and subsequent ones queued up. + + On completion of each DMA operation, the next in queue is started and + a tasklet triggered. The tasklet will then call the client driver + completion callback routine for notification, if set. + + Interface: + void dma_async_issue_pending(struct dma_chan *chan); + +Further APIs: + +1. int dmaengine_terminate_all(struct dma_chan *chan) + + This causes all activity for the DMA channel to be stopped, and may + discard data in the DMA FIFO which hasn't been fully transferred. + No callback functions will be called for any incomplete transfers. + +2. int dmaengine_pause(struct dma_chan *chan) + + This pauses activity on the DMA channel without data loss. + +3. int dmaengine_resume(struct dma_chan *chan) + + Resume a previously paused DMA channel. It is invalid to resume a + channel which is not currently paused. + +4. enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) + + This can be used to check the status of the channel. Please see + the documentation in include/linux/dmaengine.h for a more complete + description of this API. + + This can be used in conjunction with dma_async_is_complete() and + the cookie returned from 'descriptor->submit()' to check for + completion of a specific DMA transaction. + + Note: + Not all DMA engine drivers can return reliable information for + a running DMA channel. It is recommended that DMA engine users + pause or stop (via dmaengine_terminate_all) the channel before + using this API. diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index 4ca93898fbd3..26a83743af19 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -2153,6 +2153,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. [HW,MOUSE] Controls Logitech smartscroll autorepeat. 0 = disabled, 1 = enabled (default). + pstore.backend= Specify the name of the pstore backend to use + pt. [PARIDE] See Documentation/blockdev/paride.txt. diff --git a/trunk/arch/arm/mach-msm/Kconfig b/trunk/arch/arm/mach-msm/Kconfig index 888e92502e15..ebde97f5d5f0 100644 --- a/trunk/arch/arm/mach-msm/Kconfig +++ b/trunk/arch/arm/mach-msm/Kconfig @@ -11,6 +11,7 @@ config ARCH_MSM7X00A select MSM_SMD select MSM_SMD_PKG3 select CPU_V6 + select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -22,6 +23,7 @@ config ARCH_MSM7X30 select MSM_VIC select CPU_V7 select MSM_GPIOMUX + select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -33,6 +35,7 @@ config ARCH_QSD8X50 select MSM_VIC select CPU_V7 select MSM_GPIOMUX + select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -44,6 +47,7 @@ config ARCH_MSM8X60 select ARM_GIC select CPU_V7 select MSM_V2_TLMM + select GPIO_MSM_V2 select MSM_GPIOMUX select MSM_SCM if SMP diff --git a/trunk/arch/arm/mach-msm/Makefile b/trunk/arch/arm/mach-msm/Makefile index b70658c5ae00..4285dfd80b6f 100644 --- a/trunk/arch/arm/mach-msm/Makefile +++ b/trunk/arch/arm/mach-msm/Makefile @@ -29,11 +29,3 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-8x60.o gpiomux-v2.o gpiomux.o -ifdef CONFIG_MSM_V2_TLMM -ifndef CONFIG_ARCH_MSM8960 -# TODO: TLMM Mapping issues need to be resolved -obj-y += gpio-v2.o -endif -else -obj-y += gpio.o -endif diff --git a/trunk/arch/arm/mach-msm/gpio.c b/trunk/arch/arm/mach-msm/gpio.c deleted file mode 100644 index 5ea273b00da8..000000000000 --- a/trunk/arch/arm/mach-msm/gpio.c +++ /dev/null @@ -1,376 +0,0 @@ -/* linux/arch/arm/mach-msm/gpio.c - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include "gpio_hw.h" -#include "gpiomux.h" - -#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0) - -#define MSM_GPIO_BANK(bank, first, last) \ - { \ - .regs = { \ - .out = MSM_GPIO_OUT_##bank, \ - .in = MSM_GPIO_IN_##bank, \ - .int_status = MSM_GPIO_INT_STATUS_##bank, \ - .int_clear = MSM_GPIO_INT_CLEAR_##bank, \ - .int_en = MSM_GPIO_INT_EN_##bank, \ - .int_edge = MSM_GPIO_INT_EDGE_##bank, \ - .int_pos = MSM_GPIO_INT_POS_##bank, \ - .oe = MSM_GPIO_OE_##bank, \ - }, \ - .chip = { \ - .base = (first), \ - .ngpio = (last) - (first) + 1, \ - .get = msm_gpio_get, \ - .set = msm_gpio_set, \ - .direction_input = msm_gpio_direction_input, \ - .direction_output = msm_gpio_direction_output, \ - .to_irq = msm_gpio_to_irq, \ - .request = msm_gpio_request, \ - .free = msm_gpio_free, \ - } \ - } - -#define MSM_GPIO_BROKEN_INT_CLEAR 1 - -struct msm_gpio_regs { - void __iomem *out; - void __iomem *in; - void __iomem *int_status; - void __iomem *int_clear; - void __iomem *int_en; - void __iomem *int_edge; - void __iomem *int_pos; - void __iomem *oe; -}; - -struct msm_gpio_chip { - spinlock_t lock; - struct gpio_chip chip; - struct msm_gpio_regs regs; -#if MSM_GPIO_BROKEN_INT_CLEAR - unsigned int_status_copy; -#endif - unsigned int both_edge_detect; - unsigned int int_enable[2]; /* 0: awake, 1: sleep */ -}; - -static int msm_gpio_write(struct msm_gpio_chip *msm_chip, - unsigned offset, unsigned on) -{ - unsigned mask = BIT(offset); - unsigned val; - - val = readl(msm_chip->regs.out); - if (on) - writel(val | mask, msm_chip->regs.out); - else - writel(val & ~mask, msm_chip->regs.out); - return 0; -} - -static void msm_gpio_update_both_edge_detect(struct msm_gpio_chip *msm_chip) -{ - int loop_limit = 100; - unsigned pol, val, val2, intstat; - do { - val = readl(msm_chip->regs.in); - pol = readl(msm_chip->regs.int_pos); - pol = (pol & ~msm_chip->both_edge_detect) | - (~val & msm_chip->both_edge_detect); - writel(pol, msm_chip->regs.int_pos); - intstat = readl(msm_chip->regs.int_status); - val2 = readl(msm_chip->regs.in); - if (((val ^ val2) & msm_chip->both_edge_detect & ~intstat) == 0) - return; - } while (loop_limit-- > 0); - printk(KERN_ERR "msm_gpio_update_both_edge_detect, " - "failed to reach stable state %x != %x\n", val, val2); -} - -static int msm_gpio_clear_detect_status(struct msm_gpio_chip *msm_chip, - unsigned offset) -{ - unsigned bit = BIT(offset); - -#if MSM_GPIO_BROKEN_INT_CLEAR - /* Save interrupts that already triggered before we loose them. */ - /* Any interrupt that triggers between the read of int_status */ - /* and the write to int_clear will still be lost though. */ - msm_chip->int_status_copy |= readl(msm_chip->regs.int_status); - msm_chip->int_status_copy &= ~bit; -#endif - writel(bit, msm_chip->regs.int_clear); - msm_gpio_update_both_edge_detect(msm_chip); - return 0; -} - -static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -{ - struct msm_gpio_chip *msm_chip; - unsigned long irq_flags; - - msm_chip = container_of(chip, struct msm_gpio_chip, chip); - spin_lock_irqsave(&msm_chip->lock, irq_flags); - writel(readl(msm_chip->regs.oe) & ~BIT(offset), msm_chip->regs.oe); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); - return 0; -} - -static int -msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) -{ - struct msm_gpio_chip *msm_chip; - unsigned long irq_flags; - - msm_chip = container_of(chip, struct msm_gpio_chip, chip); - spin_lock_irqsave(&msm_chip->lock, irq_flags); - msm_gpio_write(msm_chip, offset, value); - writel(readl(msm_chip->regs.oe) | BIT(offset), msm_chip->regs.oe); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); - return 0; -} - -static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct msm_gpio_chip *msm_chip; - - msm_chip = container_of(chip, struct msm_gpio_chip, chip); - return (readl(msm_chip->regs.in) & (1U << offset)) ? 1 : 0; -} - -static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -{ - struct msm_gpio_chip *msm_chip; - unsigned long irq_flags; - - msm_chip = container_of(chip, struct msm_gpio_chip, chip); - spin_lock_irqsave(&msm_chip->lock, irq_flags); - msm_gpio_write(msm_chip, offset, value); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); -} - -static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - return MSM_GPIO_TO_INT(chip->base + offset); -} - -#ifdef CONFIG_MSM_GPIOMUX -static int msm_gpio_request(struct gpio_chip *chip, unsigned offset) -{ - return msm_gpiomux_get(chip->base + offset); -} - -static void msm_gpio_free(struct gpio_chip *chip, unsigned offset) -{ - msm_gpiomux_put(chip->base + offset); -} -#else -#define msm_gpio_request NULL -#define msm_gpio_free NULL -#endif - -struct msm_gpio_chip msm_gpio_chips[] = { -#if defined(CONFIG_ARCH_MSM7X00A) - MSM_GPIO_BANK(0, 0, 15), - MSM_GPIO_BANK(1, 16, 42), - MSM_GPIO_BANK(2, 43, 67), - MSM_GPIO_BANK(3, 68, 94), - MSM_GPIO_BANK(4, 95, 106), - MSM_GPIO_BANK(5, 107, 121), -#elif defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X27) - MSM_GPIO_BANK(0, 0, 15), - MSM_GPIO_BANK(1, 16, 42), - MSM_GPIO_BANK(2, 43, 67), - MSM_GPIO_BANK(3, 68, 94), - MSM_GPIO_BANK(4, 95, 106), - MSM_GPIO_BANK(5, 107, 132), -#elif defined(CONFIG_ARCH_MSM7X30) - MSM_GPIO_BANK(0, 0, 15), - MSM_GPIO_BANK(1, 16, 43), - MSM_GPIO_BANK(2, 44, 67), - MSM_GPIO_BANK(3, 68, 94), - MSM_GPIO_BANK(4, 95, 106), - MSM_GPIO_BANK(5, 107, 133), - MSM_GPIO_BANK(6, 134, 150), - MSM_GPIO_BANK(7, 151, 181), -#elif defined(CONFIG_ARCH_QSD8X50) - MSM_GPIO_BANK(0, 0, 15), - MSM_GPIO_BANK(1, 16, 42), - MSM_GPIO_BANK(2, 43, 67), - MSM_GPIO_BANK(3, 68, 94), - MSM_GPIO_BANK(4, 95, 103), - MSM_GPIO_BANK(5, 104, 121), - MSM_GPIO_BANK(6, 122, 152), - MSM_GPIO_BANK(7, 153, 164), -#endif -}; - -static void msm_gpio_irq_ack(struct irq_data *d) -{ - unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); - spin_lock_irqsave(&msm_chip->lock, irq_flags); - msm_gpio_clear_detect_status(msm_chip, - d->irq - gpio_to_irq(msm_chip->chip.base)); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); -} - -static void msm_gpio_irq_mask(struct irq_data *d) -{ - unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); - unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); - - spin_lock_irqsave(&msm_chip->lock, irq_flags); - /* level triggered interrupts are also latched */ - if (!(readl(msm_chip->regs.int_edge) & BIT(offset))) - msm_gpio_clear_detect_status(msm_chip, offset); - msm_chip->int_enable[0] &= ~BIT(offset); - writel(msm_chip->int_enable[0], msm_chip->regs.int_en); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); -} - -static void msm_gpio_irq_unmask(struct irq_data *d) -{ - unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); - unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); - - spin_lock_irqsave(&msm_chip->lock, irq_flags); - /* level triggered interrupts are also latched */ - if (!(readl(msm_chip->regs.int_edge) & BIT(offset))) - msm_gpio_clear_detect_status(msm_chip, offset); - msm_chip->int_enable[0] |= BIT(offset); - writel(msm_chip->int_enable[0], msm_chip->regs.int_en); - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); -} - -static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); - unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); - - spin_lock_irqsave(&msm_chip->lock, irq_flags); - - if (on) - msm_chip->int_enable[1] |= BIT(offset); - else - msm_chip->int_enable[1] &= ~BIT(offset); - - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); - return 0; -} - -static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); - unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); - unsigned val, mask = BIT(offset); - - spin_lock_irqsave(&msm_chip->lock, irq_flags); - val = readl(msm_chip->regs.int_edge); - if (flow_type & IRQ_TYPE_EDGE_BOTH) { - writel(val | mask, msm_chip->regs.int_edge); - __irq_set_handler_locked(d->irq, handle_edge_irq); - } else { - writel(val & ~mask, msm_chip->regs.int_edge); - __irq_set_handler_locked(d->irq, handle_level_irq); - } - if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { - msm_chip->both_edge_detect |= mask; - msm_gpio_update_both_edge_detect(msm_chip); - } else { - msm_chip->both_edge_detect &= ~mask; - val = readl(msm_chip->regs.int_pos); - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) - writel(val | mask, msm_chip->regs.int_pos); - else - writel(val & ~mask, msm_chip->regs.int_pos); - } - spin_unlock_irqrestore(&msm_chip->lock, irq_flags); - return 0; -} - -static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - int i, j, mask; - unsigned val; - - for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { - struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i]; - val = readl(msm_chip->regs.int_status); - val &= msm_chip->int_enable[0]; - while (val) { - mask = val & -val; - j = fls(mask) - 1; - /* printk("%s %08x %08x bit %d gpio %d irq %d\n", - __func__, v, m, j, msm_chip->chip.start + j, - FIRST_GPIO_IRQ + msm_chip->chip.start + j); */ - val &= ~mask; - generic_handle_irq(FIRST_GPIO_IRQ + - msm_chip->chip.base + j); - } - } - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static struct irq_chip msm_gpio_irq_chip = { - .name = "msmgpio", - .irq_ack = msm_gpio_irq_ack, - .irq_mask = msm_gpio_irq_mask, - .irq_unmask = msm_gpio_irq_unmask, - .irq_set_wake = msm_gpio_irq_set_wake, - .irq_set_type = msm_gpio_irq_set_type, -}; - -static int __init msm_init_gpio(void) -{ - int i, j = 0; - - for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { - if (i - FIRST_GPIO_IRQ >= - msm_gpio_chips[j].chip.base + - msm_gpio_chips[j].chip.ngpio) - j++; - irq_set_chip_data(i, &msm_gpio_chips[j]); - irq_set_chip_and_handler(i, &msm_gpio_irq_chip, - handle_edge_irq); - set_irq_flags(i, IRQF_VALID); - } - - for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { - spin_lock_init(&msm_gpio_chips[i].lock); - writel(0, msm_gpio_chips[i].regs.int_en); - gpiochip_add(&msm_gpio_chips[i].chip); - } - - irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); - irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); - irq_set_irq_wake(INT_GPIO_GROUP1, 1); - irq_set_irq_wake(INT_GPIO_GROUP2, 2); - return 0; -} - -postcore_initcall(msm_init_gpio); diff --git a/trunk/arch/arm/mach-msm/gpio_hw.h b/trunk/arch/arm/mach-msm/gpio_hw.h deleted file mode 100644 index 6b5066038baa..000000000000 --- a/trunk/arch/arm/mach-msm/gpio_hw.h +++ /dev/null @@ -1,278 +0,0 @@ -/* arch/arm/mach-msm/gpio_hw.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_GPIO_HW_H -#define __ARCH_ARM_MACH_MSM_GPIO_HW_H - -#include - -/* see 80-VA736-2 Rev C pp 695-751 -** -** These are actually the *shadow* gpio registers, since the -** real ones (which allow full access) are only available to the -** ARM9 side of the world. -** -** Since the _BASE need to be page-aligned when we're mapping them -** to virtual addresses, adjust for the additional offset in these -** macros. -*/ - -#if defined(CONFIG_ARCH_MSM7X30) -#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + (off)) -#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0x400 + (off)) -#else -#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + 0x800 + (off)) -#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0xC00 + (off)) -#endif - -#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X25) ||\ - defined(CONFIG_ARCH_MSM7X27) - -/* output value */ -#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ -#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 42-16 */ -#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-43 */ -#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ -#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */ -#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 107-121 */ - -/* same pin map as above, output enable */ -#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x10) -#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) -#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x14) -#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x18) -#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x1C) -#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x54) - -/* same pin map as above, input read */ -#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x34) -#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) -#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x38) -#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x3C) -#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x40) -#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x44) - -/* same pin map as above, 1=edge 0=level interrup */ -#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60) -#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) -#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64) -#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68) -#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C) -#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0) - -/* same pin map as above, 1=positive 0=negative */ -#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70) -#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) -#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74) -#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78) -#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C) -#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC) - -/* same pin map as above, interrupt enable */ -#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80) -#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) -#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84) -#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88) -#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C) -#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8) - -/* same pin map as above, write 1 to clear interrupt */ -#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90) -#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) -#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94) -#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98) -#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C) -#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4) - -/* same pin map as above, 1=interrupt pending */ -#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0) -#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) -#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4) -#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8) -#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC) -#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0) - -#endif - -#if defined(CONFIG_ARCH_QSD8X50) -/* output value */ -#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ -#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 42-16 */ -#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-43 */ -#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ -#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 103-95 */ -#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x10) /* gpio 121-104 */ -#define MSM_GPIO_OUT_6 MSM_GPIO1_REG(0x14) /* gpio 152-122 */ -#define MSM_GPIO_OUT_7 MSM_GPIO1_REG(0x18) /* gpio 164-153 */ - -/* same pin map as above, output enable */ -#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x20) -#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) -#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x24) -#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x28) -#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x2C) -#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x30) -#define MSM_GPIO_OE_6 MSM_GPIO1_REG(0x34) -#define MSM_GPIO_OE_7 MSM_GPIO1_REG(0x38) - -/* same pin map as above, input read */ -#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x50) -#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) -#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x54) -#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x58) -#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x5C) -#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x60) -#define MSM_GPIO_IN_6 MSM_GPIO1_REG(0x64) -#define MSM_GPIO_IN_7 MSM_GPIO1_REG(0x68) - -/* same pin map as above, 1=edge 0=level interrup */ -#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x70) -#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) -#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x74) -#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x78) -#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x7C) -#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0x80) -#define MSM_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0x84) -#define MSM_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x88) - -/* same pin map as above, 1=positive 0=negative */ -#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x90) -#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) -#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x94) -#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x98) -#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x9C) -#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xA0) -#define MSM_GPIO_INT_POS_6 MSM_GPIO1_REG(0xA4) -#define MSM_GPIO_INT_POS_7 MSM_GPIO1_REG(0xA8) - -/* same pin map as above, interrupt enable */ -#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0xB0) -#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) -#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0xB4) -#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0xB8) -#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0xBC) -#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xC0) -#define MSM_GPIO_INT_EN_6 MSM_GPIO1_REG(0xC4) -#define MSM_GPIO_INT_EN_7 MSM_GPIO1_REG(0xC8) - -/* same pin map as above, write 1 to clear interrupt */ -#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0xD0) -#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) -#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0xD4) -#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0xD8) -#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0xDC) -#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xE0) -#define MSM_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xE4) -#define MSM_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0xE8) - -/* same pin map as above, 1=interrupt pending */ -#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xF0) -#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) -#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xF4) -#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xF8) -#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xFC) -#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0x100) -#define MSM_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0x104) -#define MSM_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x108) - -#endif - -#if defined(CONFIG_ARCH_MSM7X30) - -/* output value */ -#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ -#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 43-16 */ -#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-44 */ -#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ -#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */ -#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 133-107 */ -#define MSM_GPIO_OUT_6 MSM_GPIO1_REG(0xC4) /* gpio 150-134 */ -#define MSM_GPIO_OUT_7 MSM_GPIO1_REG(0x214) /* gpio 181-151 */ - -/* same pin map as above, output enable */ -#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x10) -#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) -#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x14) -#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x18) -#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x1C) -#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x54) -#define MSM_GPIO_OE_6 MSM_GPIO1_REG(0xC8) -#define MSM_GPIO_OE_7 MSM_GPIO1_REG(0x218) - -/* same pin map as above, input read */ -#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x34) -#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) -#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x38) -#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x3C) -#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x40) -#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x44) -#define MSM_GPIO_IN_6 MSM_GPIO1_REG(0xCC) -#define MSM_GPIO_IN_7 MSM_GPIO1_REG(0x21C) - -/* same pin map as above, 1=edge 0=level interrup */ -#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60) -#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) -#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64) -#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68) -#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C) -#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0) -#define MSM_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0xD0) -#define MSM_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x240) - -/* same pin map as above, 1=positive 0=negative */ -#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70) -#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) -#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74) -#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78) -#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C) -#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC) -#define MSM_GPIO_INT_POS_6 MSM_GPIO1_REG(0xD4) -#define MSM_GPIO_INT_POS_7 MSM_GPIO1_REG(0x228) - -/* same pin map as above, interrupt enable */ -#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80) -#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) -#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84) -#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88) -#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C) -#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8) -#define MSM_GPIO_INT_EN_6 MSM_GPIO1_REG(0xD8) -#define MSM_GPIO_INT_EN_7 MSM_GPIO1_REG(0x22C) - -/* same pin map as above, write 1 to clear interrupt */ -#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90) -#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) -#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94) -#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98) -#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C) -#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4) -#define MSM_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xDC) -#define MSM_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0x230) - -/* same pin map as above, 1=interrupt pending */ -#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0) -#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) -#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4) -#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8) -#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC) -#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0) -#define MSM_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0) -#define MSM_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234) - -#endif - -#endif diff --git a/trunk/arch/arm/mach-msm/gpiomux.h b/trunk/arch/arm/mach-msm/gpiomux.h index b178d9cb742f..00459f6ee13c 100644 --- a/trunk/arch/arm/mach-msm/gpiomux.h +++ b/trunk/arch/arm/mach-msm/gpiomux.h @@ -19,6 +19,7 @@ #include #include +#include #if defined(CONFIG_MSM_V2_TLMM) #include "gpiomux-v2.h" @@ -71,12 +72,6 @@ enum { */ extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS]; -/* Increment a gpio's reference count, possibly activating the line. */ -int __must_check msm_gpiomux_get(unsigned gpio); - -/* Decrement a gpio's reference count, possibly suspending the line. */ -int msm_gpiomux_put(unsigned gpio); - /* Install a new configuration to the gpio line. To avoid overwriting * a configuration, leave the VALID bit out. */ @@ -94,16 +89,6 @@ int msm_gpiomux_write(unsigned gpio, */ void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val); #else -static inline int __must_check msm_gpiomux_get(unsigned gpio) -{ - return -ENOSYS; -} - -static inline int msm_gpiomux_put(unsigned gpio) -{ - return -ENOSYS; -} - static inline int msm_gpiomux_write(unsigned gpio, gpiomux_config_t active, gpiomux_config_t suspended) diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h b/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h new file mode 100644 index 000000000000..0c7d3936e02f --- /dev/null +++ b/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h @@ -0,0 +1,38 @@ +/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _LINUX_MSM_GPIOMUX_H +#define _LINUX_MSM_GPIOMUX_H + +#ifdef CONFIG_MSM_GPIOMUX + +/* Increment a gpio's reference count, possibly activating the line. */ +int __must_check msm_gpiomux_get(unsigned gpio); + +/* Decrement a gpio's reference count, possibly suspending the line. */ +int msm_gpiomux_put(unsigned gpio); + +#else + +static inline int __must_check msm_gpiomux_get(unsigned gpio) +{ + return -ENOSYS; +} + +static inline int msm_gpiomux_put(unsigned gpio) +{ + return -ENOSYS; +} + +#endif + +#endif /* _LINUX_MSM_GPIOMUX_H */ diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 8f99d97615a0..94fe9fe6feb3 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h @@ -55,13 +55,11 @@ #define MSM_DMOV_PHYS 0xA9700000 #define MSM_DMOV_SIZE SZ_4K -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO1_PHYS 0xA9200000 -#define MSM_GPIO1_SIZE SZ_4K +#define MSM7X00_GPIO1_PHYS 0xA9200000 +#define MSM7X00_GPIO1_SIZE SZ_4K -#define MSM_GPIO2_BASE IOMEM(0xE0004000) -#define MSM_GPIO2_PHYS 0xA9300000 -#define MSM_GPIO2_SIZE SZ_4K +#define MSM7X00_GPIO2_PHYS 0xA9300000 +#define MSM7X00_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xA8600000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 4d84be15955e..37694442d1bd 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h @@ -46,13 +46,11 @@ #define MSM_DMOV_PHYS 0xAC400000 #define MSM_DMOV_SIZE SZ_4K -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO1_PHYS 0xAC001000 -#define MSM_GPIO1_SIZE SZ_4K +#define MSM7X30_GPIO1_PHYS 0xAC001000 +#define MSM7X30_GPIO1_SIZE SZ_4K -#define MSM_GPIO2_BASE IOMEM(0xE0004000) -#define MSM_GPIO2_PHYS 0xAC101000 -#define MSM_GPIO2_SIZE SZ_4K +#define MSM7X30_GPIO2_PHYS 0xAC101000 +#define MSM7X30_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xAB800000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d4143201999f..d67cd73316f4 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -46,13 +46,11 @@ #define MSM_DMOV_PHYS 0xA9700000 #define MSM_DMOV_SIZE SZ_4K -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO1_PHYS 0xA9000000 -#define MSM_GPIO1_SIZE SZ_4K +#define QSD8X50_GPIO1_PHYS 0xA9000000 +#define QSD8X50_GPIO1_SIZE SZ_4K -#define MSM_GPIO2_BASE IOMEM(0xE0004000) -#define MSM_GPIO2_PHYS 0xA9100000 -#define MSM_GPIO2_SIZE SZ_4K +#define QSD8X50_GPIO2_PHYS 0xA9100000 +#define QSD8X50_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xA8600000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h index 2f494b6a9d0a..4ded15238b60 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -61,5 +61,7 @@ #define MSM_QGIC_CPU_BASE IOMEM(0xF0001000) #define MSM_TMR_BASE IOMEM(0xF0200000) #define MSM_TMR0_BASE IOMEM(0xF0201000) +#define MSM_GPIO1_BASE IOMEM(0xE0003000) +#define MSM_GPIO2_BASE IOMEM(0xE0004000) #endif diff --git a/trunk/arch/arm/mach-msm/io.c b/trunk/arch/arm/mach-msm/io.c index cec6ed1c91d3..140ddbbc3a8a 100644 --- a/trunk/arch/arm/mach-msm/io.c +++ b/trunk/arch/arm/mach-msm/io.c @@ -43,8 +43,8 @@ static struct map_desc msm_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, MSM7X00), MSM_DEVICE(DMOV), - MSM_DEVICE(GPIO1), - MSM_DEVICE(GPIO2), + MSM_CHIP_DEVICE(GPIO1, MSM7X00), + MSM_CHIP_DEVICE(GPIO2, MSM7X00), MSM_DEVICE(CLK_CTL), #ifdef CONFIG_MSM_DEBUG_UART MSM_DEVICE(DEBUG_UART), @@ -76,8 +76,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, QSD8X50), MSM_DEVICE(DMOV), - MSM_DEVICE(GPIO1), - MSM_DEVICE(GPIO2), + MSM_CHIP_DEVICE(GPIO1, QSD8X50), + MSM_CHIP_DEVICE(GPIO2, QSD8X50), MSM_DEVICE(CLK_CTL), MSM_DEVICE(SIRC), MSM_DEVICE(SCPLL), @@ -135,8 +135,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, MSM7X30), MSM_DEVICE(DMOV), - MSM_DEVICE(GPIO1), - MSM_DEVICE(GPIO2), + MSM_CHIP_DEVICE(GPIO1, MSM7X30), + MSM_CHIP_DEVICE(GPIO2, MSM7X30), MSM_DEVICE(CLK_CTL), MSM_DEVICE(CLK_CTL_SH2), MSM_DEVICE(AD5), diff --git a/trunk/arch/arm/mach-omap2/display.c b/trunk/arch/arm/mach-omap2/display.c index 543fcb8b518c..a5b7a236aa5b 100644 --- a/trunk/arch/arm/mach-omap2/display.c +++ b/trunk/arch/arm/mach-omap2/display.c @@ -25,6 +25,7 @@ #include