From 349fba9e5c323a62017ff516dde04d104a77bf81 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Tue, 2 Jun 2009 23:15:10 +0900 Subject: [PATCH] --- yaml --- r: 145546 b: refs/heads/master c: c9d89d97f0d174b9154820dd5c6726d1c794cd99 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/mips/Kconfig | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 41ccb13b326d..44a8909ed3bd 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e082f188f774544bc2c2edf51176157503c98fe4 +refs/heads/master: c9d89d97f0d174b9154820dd5c6726d1c794cd99 diff --git a/trunk/arch/mips/Kconfig b/trunk/arch/mips/Kconfig index 09b1287a92ce..28119e641f19 100644 --- a/trunk/arch/mips/Kconfig +++ b/trunk/arch/mips/Kconfig @@ -593,7 +593,7 @@ config WR_PPMC board, which is based on GT64120 bridge chip. config CAVIUM_OCTEON_SIMULATOR - bool "Support for the Cavium Networks Octeon Simulator" + bool "Cavium Networks Octeon Simulator" select CEVT_R4K select 64BIT_PHYS_ADDR select DMA_COHERENT @@ -607,7 +607,7 @@ config CAVIUM_OCTEON_SIMULATOR hardware. config CAVIUM_OCTEON_REFERENCE_BOARD - bool "Support for the Cavium Networks Octeon reference board" + bool "Cavium Networks Octeon reference board" select CEVT_R4K select 64BIT_PHYS_ADDR select DMA_COHERENT