From 351f4dab1ee02ce48e82f1c316807dcdda14f45a Mon Sep 17 00:00:00 2001
From: Greg Ungerer <gerg@snapgear.com>
Date: Mon, 26 Jun 2006 10:33:10 +1000
Subject: [PATCH] --- yaml --- r: 30156 b: refs/heads/master c:
 df8fbe1e7f250b157c5815a005a9650548315d1f h: refs/heads/master v: v3

---
 [refs]                                 |  2 +-
 trunk/include/asm-m68knommu/mcfcache.h | 15 +++++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 5b67b7d89350..ac0c316e0122 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 76aa698f331475147825ae135eae98bfd457825b
+refs/heads/master: df8fbe1e7f250b157c5815a005a9650548315d1f
diff --git a/trunk/include/asm-m68knommu/mcfcache.h b/trunk/include/asm-m68knommu/mcfcache.h
index 45d1ac57ea82..7b61a8a529f5 100644
--- a/trunk/include/asm-m68knommu/mcfcache.h
+++ b/trunk/include/asm-m68knommu/mcfcache.h
@@ -92,6 +92,21 @@
 .endm
 #endif /* CONFIG_M5249 || CONFIG_M5307 */
 
+#if defined(CONFIG_M532x)
+.macro CACHE_ENABLE
+	movel	#0x01000000,%d0		/* invalidate cache cmd */
+	movec	%d0,%CACR		/* do invalidate cache */
+	nop
+	movel	#0x4001C000,%d0		/* set SDRAM cached (write-thru) */
+	movec	%d0,%ACR0
+	movel	#0x00000000,%d0		/* no other regions cached */
+	movec	%d0,%ACR1
+	movel	#0x80000200,%d0		/* setup cache mask */
+	movec	%d0,%CACR		/* enable cache */
+	nop
+.endm
+#endif /* CONFIG_M532x */
+
 #if defined(CONFIG_M5407)
 /*
  *	Version 4 cores have a true harvard style separate instruction