From 35b9ba0364fe66a529ef4aadbc570fdb0ada5d80 Mon Sep 17 00:00:00 2001
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date: Wed, 31 Oct 2012 18:12:45 -0200
Subject: [PATCH] --- yaml --- r: 345246 b: refs/heads/master c:
 a35f267946947b3798827a783d82d3d2aa55697d h: refs/heads/master v: v3

---
 [refs]                                     |  2 +-
 trunk/drivers/gpu/drm/i915/intel_display.c | 15 +--------------
 2 files changed, 2 insertions(+), 15 deletions(-)

diff --git a/[refs] b/[refs]
index a6bb894aabd6..73a7f7012392 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 25e78e90f33a783e8129e29c1a567a63300ca8ce
+refs/heads/master: a35f267946947b3798827a783d82d3d2aa55697d
diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c
index 9c5783cc69dd..2de9a6e4b5fd 100644
--- a/trunk/drivers/gpu/drm/i915/intel_display.c
+++ b/trunk/drivers/gpu/drm/i915/intel_display.c
@@ -1744,22 +1744,9 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
 	val = I915_READ(reg);
 	pipeconf_val = I915_READ(PIPECONF(pipe));
 
-	if (HAS_PCH_IBX(dev_priv->dev)) {
-		/*
-		 * make the BPC in transcoder be consistent with
-		 * that in pipeconf reg.
-		 */
-		val &= ~PIPE_BPC_MASK;
-		val |= pipeconf_val & PIPE_BPC_MASK;
-	}
-
 	val &= ~TRANS_INTERLACE_MASK;
 	if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
-		if (HAS_PCH_IBX(dev_priv->dev) &&
-		    intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO))
-			val |= TRANS_LEGACY_INTERLACED_ILK;
-		else
-			val |= TRANS_INTERLACED;
+		val |= TRANS_INTERLACED;
 	else
 		val |= TRANS_PROGRESSIVE;