diff --git a/[refs] b/[refs] index 10856acf179c..fe9245ad1119 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 773e9610a7bd44720b8b625d01997b2953edc2db +refs/heads/master: ae696fd53280d85b43ec1dd74f80162bee088862 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 29759cd25553..995a1bfe3ae4 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -201,7 +201,6 @@ choice config ARCH_AAEC2000 bool "Agilent AAEC-2000 based" - select CPU_ARM920T select ARM_AMBA select HAVE_CLK help @@ -247,15 +246,22 @@ config ARCH_AT91 This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. +config ARCH_CLPS7500 + bool "Cirrus CL-PS7500FE" + select TIMER_ACORN + select ISA + select NO_IOPORT + select ARCH_SPARSEMEM_ENABLE + help + Support for the Cirrus Logic PS7500FE system-on-a-chip. + config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" - select CPU_ARM720T help Support for Cirrus Logic 711x/721x based boards. config ARCH_EBSA110 bool "EBSA-110" - select CPU_SA110 select ISA select NO_IOPORT help @@ -266,18 +272,17 @@ config ARCH_EBSA110 config ARCH_EP93XX bool "EP93xx-based" - select CPU_ARM920T select ARM_AMBA select ARM_VIC select GENERIC_GPIO select HAVE_CLK + select COMMON_CLKDEV select ARCH_REQUIRE_GPIOLIB help This enables support for the Cirrus EP93xx series of CPUs. config ARCH_FOOTBRIDGE bool "FootBridge" - select CPU_SA110 select FOOTBRIDGE help Support for systems based on the DC21285 companion chip @@ -285,21 +290,18 @@ config ARCH_FOOTBRIDGE config ARCH_NETX bool "Hilscher NetX based" - select CPU_ARM926T select ARM_VIC help This enables support for systems based on the Hilscher NetX Soc config ARCH_H720X bool "Hynix HMS720x-based" - select CPU_ARM720T select ISA_DMA_API help This enables support for systems based on the Hynix HMS720x config ARCH_IMX bool "IMX" - select CPU_ARM920T select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -309,7 +311,6 @@ config ARCH_IMX config ARCH_IOP13XX bool "IOP13xx-based" depends on MMU - select CPU_XSC3 select PLAT_IOP select PCI select ARCH_SUPPORTS_MSI @@ -320,7 +321,6 @@ config ARCH_IOP13XX config ARCH_IOP32X bool "IOP32x-based" depends on MMU - select CPU_XSCALE select PLAT_IOP select PCI select GENERIC_GPIO @@ -332,7 +332,6 @@ config ARCH_IOP32X config ARCH_IOP33X bool "IOP33x-based" depends on MMU - select CPU_XSCALE select PLAT_IOP select PCI select GENERIC_GPIO @@ -343,7 +342,6 @@ config ARCH_IOP33X config ARCH_IXP23XX bool "IXP23XX-based" depends on MMU - select CPU_XSC3 select PCI help Support for Intel's IXP23xx (XScale) family of processors. @@ -351,7 +349,6 @@ config ARCH_IXP23XX config ARCH_IXP2000 bool "IXP2400/2800-based" depends on MMU - select CPU_XSCALE select PCI help Support for Intel's IXP2400/2800 (XScale) family of processors. @@ -359,7 +356,6 @@ config ARCH_IXP2000 config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU - select CPU_XSCALE select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -369,7 +365,6 @@ config ARCH_IXP4XX config ARCH_L7200 bool "LinkUp-L7200" - select CPU_ARM720T select FIQ help Say Y here if you intend to run this kernel on a LinkUp Systems @@ -383,7 +378,6 @@ config ARCH_L7200 config ARCH_KIRKWOOD bool "Marvell Kirkwood" - select CPU_FEROCEON select PCI select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -394,7 +388,6 @@ config ARCH_KIRKWOOD config ARCH_KS8695 bool "Micrel/Kendin KS8695" - select CPU_ARM922T select GENERIC_GPIO help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based @@ -402,7 +395,6 @@ config ARCH_KS8695 config ARCH_NS9XXX bool "NetSilicon NS9xxx" - select CPU_ARM926T select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -415,7 +407,6 @@ config ARCH_NS9XXX config ARCH_LOKI bool "Marvell Loki (88RC8480)" - select CPU_FEROCEON select GENERIC_TIME select GENERIC_CLOCKEVENTS select PLAT_ORION @@ -424,7 +415,6 @@ config ARCH_LOKI config ARCH_MV78XX0 bool "Marvell MV78xx0" - select CPU_FEROCEON select PCI select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -446,7 +436,6 @@ config ARCH_MXC config ARCH_ORION5X bool "Marvell Orion" depends on MMU - select CPU_FEROCEON select PCI select GENERIC_GPIO select GENERIC_TIME @@ -459,7 +448,6 @@ config ARCH_ORION5X config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" - select CPU_ARM926T select HAVE_CLK help This enables support for Philips PNX4008 mobile platform. @@ -494,7 +482,6 @@ config ARCH_RPC config ARCH_SA1100 bool "SA1100-based" - select CPU_SA1100 select ISA select ARCH_SPARSEMEM_ENABLE select ARCH_MTD_XIP @@ -518,7 +505,6 @@ config ARCH_S3C2410 config ARCH_SHARK bool "Shark" - select CPU_SA110 select ISA select ISA_DMA select ZONE_DMA @@ -529,7 +515,6 @@ config ARCH_SHARK config ARCH_LH7A40X bool "Sharp LH7A40X" - select CPU_ARM922T select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM help @@ -540,7 +525,6 @@ config ARCH_LH7A40X config ARCH_DAVINCI bool "TI DaVinci" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS select GENERIC_GPIO @@ -562,7 +546,6 @@ config ARCH_OMAP config ARCH_MSM bool "Qualcomm MSM" - select CPU_V6 select GENERIC_TIME select GENERIC_CLOCKEVENTS help diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index 2eca2998f93e..bd6e28115ebb 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -96,6 +96,7 @@ textofs-y := 0x00008000 machine-$(CONFIG_ARCH_RPC) := rpc machine-$(CONFIG_ARCH_EBSA110) := ebsa110 + machine-$(CONFIG_ARCH_CLPS7500) := clps7500 machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SA1100) := sa1100 diff --git a/trunk/arch/arm/boot/compressed/Makefile b/trunk/arch/arm/boot/compressed/Makefile index fbe5eef1f6c9..c47f2a3f8f8f 100644 --- a/trunk/arch/arm/boot/compressed/Makefile +++ b/trunk/arch/arm/boot/compressed/Makefile @@ -23,6 +23,10 @@ ifeq ($(CONFIG_ARCH_L7200),y) OBJS += head-l7200.o endif +ifeq ($(CONFIG_ARCH_CLPS7500),y) +HEAD = head-clps7500.o +endif + ifeq ($(CONFIG_ARCH_P720T),y) # Borrow this code from SA1100 OBJS += head-sa1100.o diff --git a/trunk/arch/arm/boot/compressed/head-clps7500.S b/trunk/arch/arm/boot/compressed/head-clps7500.S new file mode 100644 index 000000000000..4f3c78ac30a0 --- /dev/null +++ b/trunk/arch/arm/boot/compressed/head-clps7500.S @@ -0,0 +1,86 @@ +/* + * linux/arch/arm/boot/compressed/head-clps7500.S + * + * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd + */ + + + /* There are three different ways the kernel can be + booted on a 7500 system: from Angel (loaded in RAM), from + 16-bit ROM or from 32-bit Flash. Luckily, a single kernel + image does for them all. */ + /* This branch is taken if the CPU memory width matches the + actual device in use. The default at power on is 16 bits + so we must be prepared for a mismatch. */ + .section ".start", "ax" +2: + b 1f + .word 0xffff + .word 0xb632 @ mov r11, #0x03200000 + .word 0xe3a0 + .word 0x0000 @ mov r0, #0 + .word 0xe3a0 + .word 0x0080 @ strb r0, [r11, #0x80] + .word 0xe5cb + .word 0xf000 @ mov pc, #0 + .word 0xe3a0 +1: + adr r1, 2b + teq r1, #0 + bne .Langel + /* This is a direct-from-ROM boot. Copy the kernel into + RAM and run it there. */ + mov r0, #0x30 + mcr p15, 0, r0, c1, c0, 0 + mov r0, #0x13 + msr cpsr_cxsf, r0 + mov r12, #0x03000000 @ point to LEDs + orr r12, r12, #0x00020000 + orr r12, r12, #0xba00 + mov r0, #0x5500 + str r0, [r12] + mov r0, #0x10000000 + orr r0, r0, #0x8000 + mov r4, r0 + ldr r2, =_end +2: + ldr r3, [r1], #4 + str r3, [r0], #4 + teq r0, r2 + bne 2b + mov r0, #0xff00 + str r0, [r12] +1: + mov r12, #0x03000000 @ point to LEDs + orr r12, r12, #0x00020000 + orr r12, r12, #0xba00 + mov r0, #0xfe00 + str r0, [r12] + + adr lr, 1f + mov r0, #0 + mov r1, #14 /* MACH_TYPE_CLPS7500 */ + mov pc, lr +.Langel: +#ifdef CONFIG_ANGELBOOT + /* Call Angel to switch into SVC mode. */ + mov r0, #0x17 + swi 0x123456 +#endif + /* Ensure all interrupts are off and MMU disabled */ + mrs r0, cpsr + orr r0, r0, #0xc0 + msr cpsr_cxsf, r0 + + adr lr, 1b + orr lr, lr, #0x10000000 + mov r0, #0x30 @ MMU off + mcr p15, 0, r0, c1, c0, 0 + mov r0, r0 + mov pc, lr + + .ltorg + +1: +/* And the rest */ +#include "head.S" diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index 7b1f31295a0a..84a1e0496a3c 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -717,9 +717,6 @@ __armv7_mmu_cache_off: bl __armv7_mmu_cache_flush mov r0, #0 mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB - mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC - mcr p15, 0, r0, c7, c10, 4 @ DSB - mcr p15, 0, r0, c7, c5, 4 @ ISB mov pc, r12 __arm6_mmu_cache_off: @@ -781,13 +778,12 @@ __armv6_mmu_cache_flush: __armv7_mmu_cache_flush: mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1 tst r10, #0xf << 16 @ hierarchical cache (ARMv7) - mov r10, #0 beq hierarchical + mov r10, #0 mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D b iflush hierarchical: - mcr p15, 0, r10, c7, c10, 5 @ DMB - stmfd sp!, {r0-r5, r7, r9, r11} + stmfd sp!, {r0-r5, r7, r9-r11} mrc p15, 1, r0, c0, c0, 1 @ read clidr ands r3, r0, #0x7000000 @ extract loc from clidr mov r3, r3, lsr #23 @ left align loc bit field @@ -824,14 +820,12 @@ skip: cmp r3, r10 bgt loop1 finished: - ldmfd sp!, {r0-r5, r7, r9, r11} mov r10, #0 @ swith back to cache level 0 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr + ldmfd sp!, {r0-r5, r7, r9-r11} iflush: - mcr p15, 0, r10, c7, c10, 4 @ DSB mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB - mcr p15, 0, r10, c7, c10, 4 @ DSB - mcr p15, 0, r10, c7, c5, 4 @ ISB + mcr p15, 0, r10, c7, c10, 4 @ drain WB mov pc, lr __armv5tej_mmu_cache_flush: diff --git a/trunk/arch/arm/boot/compressed/misc.c b/trunk/arch/arm/boot/compressed/misc.c index 3fc08413fff0..65ce8fff29db 100644 --- a/trunk/arch/arm/boot/compressed/misc.c +++ b/trunk/arch/arm/boot/compressed/misc.c @@ -86,8 +86,6 @@ static void putstr(const char *ptr) #define __ptr_t void * -#define memzero(s,n) __memzero(s,n) - /* * Optimised C version of memzero for the ARM. */ diff --git a/trunk/arch/arm/include/asm/cacheflush.h b/trunk/arch/arm/include/asm/cacheflush.h index 6cbd8fdc9f1f..de6c59f814a1 100644 --- a/trunk/arch/arm/include/asm/cacheflush.h +++ b/trunk/arch/arm/include/asm/cacheflush.h @@ -10,11 +10,11 @@ #ifndef _ASMARM_CACHEFLUSH_H #define _ASMARM_CACHEFLUSH_H +#include #include #include #include -#include #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) @@ -295,6 +295,16 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) #endif +/* + * flush_cache_vmap() is used when creating mappings (eg, via vmap, + * vmalloc, ioremap etc) in kernel space for pages. Since the + * direct-mappings of these pages may contain cached data, we need + * to do a full cache flush to ensure that writebacks don't corrupt + * data placed into these pages via the new mappings. + */ +#define flush_cache_vmap(start, end) flush_cache_all() +#define flush_cache_vunmap(start, end) flush_cache_all() + /* * Copy user data from/to a page which is mapped into a different * processes address space. Really, we want to allow our "user @@ -434,29 +444,4 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, dmac_inv_range(start, start + size); } -/* - * flush_cache_vmap() is used when creating mappings (eg, via vmap, - * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT - * caches, since the direct-mappings of these pages may contain cached - * data, we need to do a full cache flush to ensure that writebacks - * don't corrupt data placed into these pages via the new mappings. - */ -static inline void flush_cache_vmap(unsigned long start, unsigned long end) -{ - if (!cache_is_vipt_nonaliasing()) - flush_cache_all(); - else - /* - * set_pte_at() called from vmap_pte_range() does not - * have a DSB after cleaning the cache line. - */ - dsb(); -} - -static inline void flush_cache_vunmap(unsigned long start, unsigned long end) -{ - if (!cache_is_vipt_nonaliasing()) - flush_cache_all(); -} - #endif diff --git a/trunk/arch/arm/include/asm/dma.h b/trunk/arch/arm/include/asm/dma.h index df5638f3643a..75154b193117 100644 --- a/trunk/arch/arm/include/asm/dma.h +++ b/trunk/arch/arm/include/asm/dma.h @@ -1,7 +1,12 @@ #ifndef __ASM_ARM_DMA_H #define __ASM_ARM_DMA_H -#include +typedef unsigned int dmach_t; + +#include +#include +#include +#include /* * This is the maximum virtual address which can be DMA'd from. @@ -10,19 +15,6 @@ #define MAX_DMA_ADDRESS 0xffffffff #endif -#ifdef CONFIG_ISA_DMA_API -/* - * This is used to support drivers written for the x86 ISA DMA API. - * It should not be re-used except for that purpose. - */ -#include -#include -#include - -typedef unsigned int dmach_t; - -#include - /* * DMA modes */ @@ -148,6 +140,4 @@ extern int isa_dma_bridge_buggy; #define isa_dma_bridge_buggy (0) #endif -#endif /* CONFIG_ISA_DMA_API */ - -#endif /* __ASM_ARM_DMA_H */ +#endif /* _ARM_DMA_H */ diff --git a/trunk/arch/arm/include/asm/hardware/iomd.h b/trunk/arch/arm/include/asm/hardware/iomd.h index f9ee69e4f53e..9c5afbd71a69 100644 --- a/trunk/arch/arm/include/asm/hardware/iomd.h +++ b/trunk/arch/arm/include/asm/hardware/iomd.h @@ -32,11 +32,19 @@ #define IOMD_KARTRX (0x004) #define IOMD_KCTRL (0x008) +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_IOLINES (0x00C) +#endif + #define IOMD_IRQSTATA (0x010) #define IOMD_IRQREQA (0x014) #define IOMD_IRQCLRA (0x014) #define IOMD_IRQMASKA (0x018) +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_SUSMODE (0x01C) +#endif + #define IOMD_IRQSTATB (0x020) #define IOMD_IRQREQB (0x024) #define IOMD_IRQMASKB (0x028) @@ -45,6 +53,10 @@ #define IOMD_FIQREQ (0x034) #define IOMD_FIQMASK (0x038) +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_CLKCTL (0x03C) +#endif + #define IOMD_T0CNTL (0x040) #define IOMD_T0LTCHL (0x040) #define IOMD_T0CNTH (0x044) @@ -59,6 +71,18 @@ #define IOMD_T1GO (0x058) #define IOMD_T1LATCH (0x05c) +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_IRQSTATC (0x060) +#define IOMD_IRQREQC (0x064) +#define IOMD_IRQMASKC (0x068) + +#define IOMD_VIDMUX (0x06c) + +#define IOMD_IRQSTATD (0x070) +#define IOMD_IRQREQD (0x074) +#define IOMD_IRQMASKD (0x078) +#endif + #define IOMD_ROMCR0 (0x080) #define IOMD_ROMCR1 (0x084) #ifdef CONFIG_ARCH_RPC @@ -76,6 +100,11 @@ #define IOMD_MOUSEY (0x0A4) #endif +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_MSEDAT (0x0A8) +#define IOMD_MSECTL (0x0Ac) +#endif + #ifdef CONFIG_ARCH_RPC #define IOMD_DMATCR (0x0C0) #endif @@ -84,6 +113,18 @@ #ifdef CONFIG_ARCH_RPC #define IOMD_DMAEXT (0x0CC) #endif +#ifdef CONFIG_ARCH_CLPS7500 +#define IOMD_ASTCR (0x0CC) +#define IOMD_DRAMCR (0x0D0) +#define IOMD_SELFREF (0x0D4) +#define IOMD_ATODICR (0x0E0) +#define IOMD_ATODSR (0x0E4) +#define IOMD_ATODCC (0x0E8) +#define IOMD_ATODCNT1 (0x0EC) +#define IOMD_ATODCNT2 (0x0F0) +#define IOMD_ATODCNT3 (0x0F4) +#define IOMD_ATODCNT4 (0x0F8) +#endif #ifdef CONFIG_ARCH_RPC #define DMA_EXT_IO0 1 diff --git a/trunk/arch/arm/include/asm/hwcap.h b/trunk/arch/arm/include/asm/hwcap.h index bda489f9f017..81f4c899a555 100644 --- a/trunk/arch/arm/include/asm/hwcap.h +++ b/trunk/arch/arm/include/asm/hwcap.h @@ -16,7 +16,6 @@ #define HWCAP_IWMMXT 512 #define HWCAP_CRUNCH 1024 #define HWCAP_THUMBEE 2048 -#define HWCAP_NEON 4096 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) /* diff --git a/trunk/arch/arm/include/asm/io.h b/trunk/arch/arm/include/asm/io.h index d2a59cfc30ce..a8094451be57 100644 --- a/trunk/arch/arm/include/asm/io.h +++ b/trunk/arch/arm/include/asm/io.h @@ -79,14 +79,6 @@ extern void __iounmap(volatile void __iomem *addr); */ extern void __readwrite_bug(const char *fn); -/* - * A typesafe __io() helper - */ -static inline void __iomem *__typesafe_io(unsigned long addr) -{ - return (void __iomem *)addr; -} - /* * Now, pick up the machine-defined IO definitions */ diff --git a/trunk/arch/arm/include/asm/irq.h b/trunk/arch/arm/include/asm/irq.h index 328f14a8b790..a0009aa5d157 100644 --- a/trunk/arch/arm/include/asm/irq.h +++ b/trunk/arch/arm/include/asm/irq.h @@ -7,6 +7,10 @@ #define irq_canonicalize(i) (i) #endif +#ifndef NR_IRQS +#define NR_IRQS 128 +#endif + /* * Use this value to indicate lack of interrupt * capability diff --git a/trunk/arch/arm/include/asm/memory.h b/trunk/arch/arm/include/asm/memory.h index 0202a7c20e62..77764301844b 100644 --- a/trunk/arch/arm/include/asm/memory.h +++ b/trunk/arch/arm/include/asm/memory.h @@ -112,8 +112,10 @@ * private definitions which should NOT be used outside memory.h * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. */ +#ifndef __virt_to_phys #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) +#endif /* * Convert a physical address to a Page Frame Number and back @@ -178,11 +180,6 @@ static inline void *phys_to_virt(unsigned long x) * memory. Use of these is *deprecated* (and that doesn't mean * use the __ prefixed forms instead.) See dma-mapping.h. */ -#ifndef __virt_to_bus -#define __virt_to_bus __virt_to_phys -#define __bus_to_virt __phys_to_virt -#endif - static inline __deprecated unsigned long virt_to_bus(void *x) { return __virt_to_bus((unsigned long)x); diff --git a/trunk/arch/arm/include/asm/mmu_context.h b/trunk/arch/arm/include/asm/mmu_context.h index 263fed05ea33..0559f37c2a27 100644 --- a/trunk/arch/arm/include/asm/mmu_context.h +++ b/trunk/arch/arm/include/asm/mmu_context.h @@ -14,7 +14,6 @@ #define __ASM_ARM_MMU_CONTEXT_H #include -#include #include #include #include diff --git a/trunk/arch/arm/include/asm/page.h b/trunk/arch/arm/include/asm/page.h index f341c9dbd662..bed1c0a00368 100644 --- a/trunk/arch/arm/include/asm/page.h +++ b/trunk/arch/arm/include/asm/page.h @@ -108,38 +108,32 @@ #error Unknown user operations model #endif -struct page; - struct cpu_user_fns { - void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr); - void (*cpu_copy_user_highpage)(struct page *to, struct page *from, - unsigned long vaddr); + void (*cpu_clear_user_page)(void *p, unsigned long user); + void (*cpu_copy_user_page)(void *to, const void *from, + unsigned long user); }; #ifdef MULTI_USER extern struct cpu_user_fns cpu_user; -#define __cpu_clear_user_highpage cpu_user.cpu_clear_user_highpage -#define __cpu_copy_user_highpage cpu_user.cpu_copy_user_highpage +#define __cpu_clear_user_page cpu_user.cpu_clear_user_page +#define __cpu_copy_user_page cpu_user.cpu_copy_user_page #else -#define __cpu_clear_user_highpage __glue(_USER,_clear_user_highpage) -#define __cpu_copy_user_highpage __glue(_USER,_copy_user_highpage) +#define __cpu_clear_user_page __glue(_USER,_clear_user_page) +#define __cpu_copy_user_page __glue(_USER,_copy_user_page) -extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr); -extern void __cpu_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr); +extern void __cpu_clear_user_page(void *p, unsigned long user); +extern void __cpu_copy_user_page(void *to, const void *from, + unsigned long user); #endif -#define clear_user_highpage(page,vaddr) \ - __cpu_clear_user_highpage(page, vaddr) - -#define __HAVE_ARCH_COPY_USER_HIGHPAGE -#define copy_user_highpage(to,from,vaddr,vma) \ - __cpu_copy_user_highpage(to, from, vaddr) +#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr) +#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr) -#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define clear_page(page) memzero((void *)(page), PAGE_SIZE) extern void copy_page(void *to, const void *from); #undef STRICT_MM_TYPECHECKS diff --git a/trunk/arch/arm/include/asm/processor.h b/trunk/arch/arm/include/asm/processor.h index 2320508443a5..517a4d6ffc74 100644 --- a/trunk/arch/arm/include/asm/processor.h +++ b/trunk/arch/arm/include/asm/processor.h @@ -64,7 +64,7 @@ struct thread_struct { ({ \ unsigned long *stack = (unsigned long *)sp; \ set_fs(USER_DS); \ - memset(regs->uregs, 0, sizeof(regs->uregs)); \ + memzero(regs->uregs, sizeof(regs->uregs)); \ if (current->personality & ADDR_LIMIT_32BIT) \ regs->ARM_cpsr = USR_MODE; \ else \ diff --git a/trunk/arch/arm/include/asm/setup.h b/trunk/arch/arm/include/asm/setup.h index f2cd18a0932b..a65413ba121d 100644 --- a/trunk/arch/arm/include/asm/setup.h +++ b/trunk/arch/arm/include/asm/setup.h @@ -209,11 +209,9 @@ struct meminfo { struct membank bank[NR_BANKS]; }; -extern struct meminfo meminfo; - #define for_each_nodebank(iter,mi,no) \ - for (iter = 0; iter < (mi)->nr_banks; iter++) \ - if ((mi)->bank[iter].node == no) + for (iter = 0; iter < mi->nr_banks; iter++) \ + if (mi->bank[iter].node == no) #define bank_pfn_start(bank) __phys_to_pfn((bank)->start) #define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) diff --git a/trunk/arch/arm/include/asm/string.h b/trunk/arch/arm/include/asm/string.h index cf4f3aad0fc1..e50c4a39b699 100644 --- a/trunk/arch/arm/include/asm/string.h +++ b/trunk/arch/arm/include/asm/string.h @@ -21,6 +21,7 @@ extern void * memmove(void *, const void *, __kernel_size_t); #define __HAVE_ARCH_MEMCHR extern void * memchr(const void *, int, __kernel_size_t); +#define __HAVE_ARCH_MEMZERO #define __HAVE_ARCH_MEMSET extern void * memset(void *, int, __kernel_size_t); @@ -38,4 +39,12 @@ extern void __memzero(void *ptr, __kernel_size_t n); (__p); \ }) +#define memzero(p,n) \ + ({ \ + void *__p = (p); size_t __n = n; \ + if ((__n) != 0) \ + __memzero((__p),(__n)); \ + (__p); \ + }) + #endif diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 811be55f338e..568020b34e3e 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -3,6 +3,8 @@ #ifdef __KERNEL__ +#include + #define CPU_ARCH_UNKNOWN 0 #define CPU_ARCH_ARMv3 1 #define CPU_ARCH_ARMv4 2 diff --git a/trunk/arch/arm/include/asm/uaccess.h b/trunk/arch/arm/include/asm/uaccess.h index 7897464e0c24..e98ec60b3400 100644 --- a/trunk/arch/arm/include/asm/uaccess.h +++ b/trunk/arch/arm/include/asm/uaccess.h @@ -11,8 +11,7 @@ /* * User space memory access functions */ -#include -#include +#include #include #include #include @@ -401,7 +400,7 @@ static inline unsigned long __must_check copy_from_user(void *to, const void __u if (access_ok(VERIFY_READ, from, n)) n = __copy_from_user(to, from, n); else /* security hole - plug it */ - memset(to, 0, n); + memzero(to, n); return n; } diff --git a/trunk/arch/arm/kernel/armksyms.c b/trunk/arch/arm/kernel/armksyms.c index 53d0037a1e9d..c74f766ffc12 100644 --- a/trunk/arch/arm/kernel/armksyms.c +++ b/trunk/arch/arm/kernel/armksyms.c @@ -8,7 +8,6 @@ * published by the Free Software Foundation. */ #include -#include #include #include #include diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index 4f6ae06d0855..1f1eecca7f55 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -59,7 +59,7 @@ static int __init fpe_setup(char *line) __setup("fpe=", fpe_setup); #endif -extern void paging_init(struct machine_desc *desc); +extern void paging_init(struct meminfo *, struct machine_desc *desc); extern void reboot_setup(char *str); extern void _text, _etext, __data_start, _edata, _end; @@ -112,6 +112,7 @@ static struct stack stacks[NR_CPUS]; char elf_platform[ELF_PLATFORM_SIZE]; EXPORT_SYMBOL(elf_platform); +static struct meminfo meminfo __initdata = { 0, }; static const char *cpu_name; static const char *machine_name; static char __initdata command_line[COMMAND_LINE_SIZE]; @@ -366,34 +367,21 @@ static struct machine_desc * __init setup_machine(unsigned int nr) return list; } -static int __init arm_add_memory(unsigned long start, unsigned long size) +static void __init arm_add_memory(unsigned long start, unsigned long size) { - struct membank *bank = &meminfo.bank[meminfo.nr_banks]; - - if (meminfo.nr_banks >= NR_BANKS) { - printk(KERN_CRIT "NR_BANKS too low, " - "ignoring memory at %#lx\n", start); - return -EINVAL; - } + struct membank *bank; /* * Ensure that start/size are aligned to a page boundary. * Size is appropriately rounded down, start is rounded up. */ size -= start & ~PAGE_MASK; + + bank = &meminfo.bank[meminfo.nr_banks++]; + bank->start = PAGE_ALIGN(start); bank->size = size & PAGE_MASK; bank->node = PHYS_TO_NID(start); - - /* - * Check whether this memory region has non-zero size or - * invalid node number. - */ - if (bank->size == 0 || bank->node >= MAX_NUMNODES) - return -EINVAL; - - meminfo.nr_banks++; - return 0; } /* @@ -551,7 +539,14 @@ __tagtable(ATAG_CORE, parse_tag_core); static int __init parse_tag_mem32(const struct tag *tag) { - return arm_add_memory(tag->u.mem.start, tag->u.mem.size); + if (meminfo.nr_banks >= NR_BANKS) { + printk(KERN_WARNING + "Ignoring memory bank 0x%08x size %dKB\n", + tag->u.mem.start, tag->u.mem.size / 1024); + return -EINVAL; + } + arm_add_memory(tag->u.mem.start, tag->u.mem.size); + return 0; } __tagtable(ATAG_MEM, parse_tag_mem32); @@ -723,7 +718,7 @@ void __init setup_arch(char **cmdline_p) memcpy(boot_command_line, from, COMMAND_LINE_SIZE); boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; parse_cmdline(cmdline_p, from); - paging_init(mdesc); + paging_init(&meminfo, mdesc); request_standard_resources(&meminfo, mdesc); #ifdef CONFIG_SMP @@ -777,8 +772,6 @@ static const char *hwcap_str[] = { "java", "iwmmxt", "crunch", - "thumbee", - "neon", NULL }; diff --git a/trunk/arch/arm/kernel/thumbee.c b/trunk/arch/arm/kernel/thumbee.c index 9cb7aaca159f..df3f6b7ebcea 100644 --- a/trunk/arch/arm/kernel/thumbee.c +++ b/trunk/arch/arm/kernel/thumbee.c @@ -25,7 +25,7 @@ /* * Access to the ThumbEE Handler Base register */ -static inline unsigned long teehbr_read(void) +static inline unsigned long teehbr_read() { unsigned long v; asm("mrc p14, 6, %0, c1, c0, 0\n" : "=r" (v)); diff --git a/trunk/arch/arm/lib/Makefile b/trunk/arch/arm/lib/Makefile index 866f84a586ff..30351cd4560d 100644 --- a/trunk/arch/arm/lib/Makefile +++ b/trunk/arch/arm/lib/Makefile @@ -38,6 +38,7 @@ else endif lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o +lib-$(CONFIG_ARCH_CLPS7500) += io-acorn.o lib-$(CONFIG_ARCH_L7200) += io-acorn.o lib-$(CONFIG_ARCH_SHARK) += io-shark.o diff --git a/trunk/arch/arm/lib/memset.S b/trunk/arch/arm/lib/memset.S index 650d5923ab83..761eefa76243 100644 --- a/trunk/arch/arm/lib/memset.S +++ b/trunk/arch/arm/lib/memset.S @@ -25,7 +25,7 @@ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) /* * The pointer is now aligned and the length is adjusted. Try doing the - * memset again. + * memzero again. */ ENTRY(memset) diff --git a/trunk/arch/arm/mach-aaec2000/include/mach/dma.h b/trunk/arch/arm/mach-aaec2000/include/mach/dma.h new file mode 100644 index 000000000000..2da846c72fe7 --- /dev/null +++ b/trunk/arch/arm/mach-aaec2000/include/mach/dma.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-aaec2000/include/mach/dma.h + * + * Copyright (c) 2005 Nicolas Bellido Y Ortega + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ diff --git a/trunk/arch/arm/mach-aaec2000/include/mach/io.h b/trunk/arch/arm/mach-aaec2000/include/mach/io.h index ab4fe5d20eaf..c87c24de1110 100644 --- a/trunk/arch/arm/mach-aaec2000/include/mach/io.h +++ b/trunk/arch/arm/mach-aaec2000/include/mach/io.h @@ -6,13 +6,15 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff /* * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-aaec2000/include/mach/memory.h b/trunk/arch/arm/mach-aaec2000/include/mach/memory.h index c00822543d9f..56ae900a482e 100644 --- a/trunk/arch/arm/mach-aaec2000/include/mach/memory.h +++ b/trunk/arch/arm/mach-aaec2000/include/mach/memory.h @@ -14,6 +14,9 @@ #define PHYS_OFFSET UL(0xf0000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * The nodes are the followings: * diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index 95dc71aaa668..5aafb2e2ca7a 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -7,43 +7,36 @@ choice config ARCH_AT91RM9200 bool "AT91RM9200" - select CPU_ARM920T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91SAM9260 bool "AT91SAM9260 or AT91SAM9XE" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91SAM9261 bool "AT91SAM9261" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91SAM9263 bool "AT91SAM9263" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91SAM9RL bool "AT91SAM9RL" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91SAM9G20 bool "AT91SAM9G20" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS config ARCH_AT91CAP9 bool "AT91CAP9" - select CPU_ARM926T select GENERIC_TIME select GENERIC_CLOCKEVENTS diff --git a/trunk/arch/arm/mach-at91/include/mach/dma.h b/trunk/arch/arm/mach-at91/include/mach/dma.h new file mode 100644 index 000000000000..e4f90c177616 --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/dma.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-at91/include/mach/dma.h + * + * Copyright (C) 2003 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-at91/include/mach/io.h b/trunk/arch/arm/mach-at91/include/mach/io.h index 0b0cccc46e68..1611bd03f528 100644 --- a/trunk/arch/arm/mach-at91/include/mach/io.h +++ b/trunk/arch/arm/mach-at91/include/mach/io.h @@ -23,8 +23,8 @@ #define IO_SPACE_LIMIT 0xFFFFFFFF -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #ifndef __ASSEMBLY__ diff --git a/trunk/arch/arm/mach-at91/include/mach/memory.h b/trunk/arch/arm/mach-at91/include/mach/memory.h index 14f4ef4b6a9e..9dd1b8c79b08 100644 --- a/trunk/arch/arm/mach-at91/include/mach/memory.h +++ b/trunk/arch/arm/mach-at91/include/mach/memory.h @@ -25,4 +25,15 @@ #define PHYS_OFFSET (AT91_SDRAM_BASE) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-clps711x/include/mach/dma.h b/trunk/arch/arm/mach-clps711x/include/mach/dma.h new file mode 100644 index 000000000000..0d620e869536 --- /dev/null +++ b/trunk/arch/arm/mach-clps711x/include/mach/dma.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-clps711x/include/mach/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-clps711x/include/mach/io.h b/trunk/arch/arm/mach-clps711x/include/mach/io.h index 2e0b3ced8f07..4c8440087679 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/io.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/io.h @@ -20,10 +20,12 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) /* * We don't support ins[lb]/outs[lb]. Make them fault. diff --git a/trunk/arch/arm/mach-clps711x/include/mach/memory.h b/trunk/arch/arm/mach-clps711x/include/mach/memory.h index e522b20bcbc2..98ec30c97bbe 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/memory.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/memory.h @@ -26,7 +26,25 @@ */ #define PHYS_OFFSET UL(0xc0000000) -#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ + +#if defined(CONFIG_ARCH_CDB89712) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#elif defined (CONFIG_ARCH_AUTCPU12) + +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + +#else #define __virt_to_bus(x) ((x) - PAGE_OFFSET) #define __bus_to_virt(x) ((x) + PAGE_OFFSET) diff --git a/trunk/arch/arm/mach-clps7500/Makefile b/trunk/arch/arm/mach-clps7500/Makefile new file mode 100644 index 000000000000..4bd8ebd70e7b --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/Makefile @@ -0,0 +1,11 @@ +# +# Makefile for the linux kernel. +# + +# Object file lists. + +obj-y := core.o +obj-m := +obj-n := +obj- := + diff --git a/trunk/arch/arm/mach-clps7500/Makefile.boot b/trunk/arch/arm/mach-clps7500/Makefile.boot new file mode 100644 index 000000000000..fe16506c1540 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-y := 0x10008000 + diff --git a/trunk/arch/arm/mach-clps7500/core.c b/trunk/arch/arm/mach-clps7500/core.c new file mode 100644 index 000000000000..7e247c04d41c --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/core.c @@ -0,0 +1,395 @@ +/* + * linux/arch/arm/mach-clps7500/core.c + * + * Copyright (C) 1998 Russell King + * Copyright (C) 1999 Nexus Electronics Ltd + * + * Extra MM routines for CL7500 architecture + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +unsigned int vram_size; + +static void cl7500_ack_irq_a(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val & ~mask, IOMD_IRQMASKA); + iomd_writeb(mask, IOMD_IRQCLRA); +} + +static void cl7500_mask_irq_a(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val & ~mask, IOMD_IRQMASKA); +} + +static void cl7500_unmask_irq_a(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << irq; + val = iomd_readb(IOMD_IRQMASKA); + iomd_writeb(val | mask, IOMD_IRQMASKA); +} + +static struct irq_chip clps7500_a_chip = { + .ack = cl7500_ack_irq_a, + .mask = cl7500_mask_irq_a, + .unmask = cl7500_unmask_irq_a, +}; + +static void cl7500_mask_irq_b(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKB); + iomd_writeb(val & ~mask, IOMD_IRQMASKB); +} + +static void cl7500_unmask_irq_b(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKB); + iomd_writeb(val | mask, IOMD_IRQMASKB); +} + +static struct irq_chip clps7500_b_chip = { + .ack = cl7500_mask_irq_b, + .mask = cl7500_mask_irq_b, + .unmask = cl7500_unmask_irq_b, +}; + +static void cl7500_mask_irq_c(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKC); + iomd_writeb(val & ~mask, IOMD_IRQMASKC); +} + +static void cl7500_unmask_irq_c(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKC); + iomd_writeb(val | mask, IOMD_IRQMASKC); +} + +static struct irq_chip clps7500_c_chip = { + .ack = cl7500_mask_irq_c, + .mask = cl7500_mask_irq_c, + .unmask = cl7500_unmask_irq_c, +}; + +static void cl7500_mask_irq_d(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKD); + iomd_writeb(val & ~mask, IOMD_IRQMASKD); +} + +static void cl7500_unmask_irq_d(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_IRQMASKD); + iomd_writeb(val | mask, IOMD_IRQMASKD); +} + +static struct irq_chip clps7500_d_chip = { + .ack = cl7500_mask_irq_d, + .mask = cl7500_mask_irq_d, + .unmask = cl7500_unmask_irq_d, +}; + +static void cl7500_mask_irq_dma(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_DMAMASK); + iomd_writeb(val & ~mask, IOMD_DMAMASK); +} + +static void cl7500_unmask_irq_dma(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_DMAMASK); + iomd_writeb(val | mask, IOMD_DMAMASK); +} + +static struct irq_chip clps7500_dma_chip = { + .ack = cl7500_mask_irq_dma, + .mask = cl7500_mask_irq_dma, + .unmask = cl7500_unmask_irq_dma, +}; + +static void cl7500_mask_irq_fiq(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_FIQMASK); + iomd_writeb(val & ~mask, IOMD_FIQMASK); +} + +static void cl7500_unmask_irq_fiq(unsigned int irq) +{ + unsigned int val, mask; + + mask = 1 << (irq & 7); + val = iomd_readb(IOMD_FIQMASK); + iomd_writeb(val | mask, IOMD_FIQMASK); +} + +static struct irq_chip clps7500_fiq_chip = { + .ack = cl7500_mask_irq_fiq, + .mask = cl7500_mask_irq_fiq, + .unmask = cl7500_unmask_irq_fiq, +}; + +static void cl7500_no_action(unsigned int irq) +{ +} + +static struct irq_chip clps7500_no_chip = { + .ack = cl7500_no_action, + .mask = cl7500_no_action, + .unmask = cl7500_no_action, +}; + +static struct irqaction irq_isa = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "isa", +}; + +static void __init clps7500_init_irq(void) +{ + unsigned int irq, flags; + + iomd_writeb(0, IOMD_IRQMASKA); + iomd_writeb(0, IOMD_IRQMASKB); + iomd_writeb(0, IOMD_FIQMASK); + iomd_writeb(0, IOMD_DMAMASK); + + for (irq = 0; irq < NR_IRQS; irq++) { + flags = IRQF_VALID; + + if (irq <= 6 || (irq >= 9 && irq <= 15) || + (irq >= 48 && irq <= 55)) + flags |= IRQF_PROBE; + + switch (irq) { + case 0 ... 7: + set_irq_chip(irq, &clps7500_a_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 8 ... 15: + set_irq_chip(irq, &clps7500_b_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 16 ... 22: + set_irq_chip(irq, &clps7500_dma_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 24 ... 31: + set_irq_chip(irq, &clps7500_c_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 40 ... 47: + set_irq_chip(irq, &clps7500_d_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 48 ... 55: + set_irq_chip(irq, &clps7500_no_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + + case 64 ... 72: + set_irq_chip(irq, &clps7500_fiq_chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, flags); + break; + } + } + + setup_irq(IRQ_ISA, &irq_isa); +} + +static struct map_desc cl7500_io_desc[] __initdata = { + { /* IO space */ + .virtual = (unsigned long)IO_BASE, + .pfn = __phys_to_pfn(IO_START), + .length = IO_SIZE, + .type = MT_DEVICE + }, { /* ISA space */ + .virtual = ISA_BASE, + .pfn = __phys_to_pfn(ISA_START), + .length = ISA_SIZE, + .type = MT_DEVICE + }, { /* Flash */ + .virtual = CLPS7500_FLASH_BASE, + .pfn = __phys_to_pfn(CLPS7500_FLASH_START), + .length = CLPS7500_FLASH_SIZE, + .type = MT_DEVICE + }, { /* LED */ + .virtual = LED_BASE, + .pfn = __phys_to_pfn(LED_START), + .length = LED_SIZE, + .type = MT_DEVICE + } +}; + +static void __init clps7500_map_io(void) +{ + iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc)); +} + +extern void ioctime_init(void); +extern unsigned long ioc_timer_gettimeoffset(void); + +static irqreturn_t +clps7500_timer_interrupt(int irq, void *dev_id) +{ + timer_tick(); + + /* Why not using do_leds interface?? */ + { + /* Twinkle the lights. */ + static int count, state = 0xff00; + if (count-- == 0) { + state ^= 0x100; + count = 25; + *((volatile unsigned int *)LED_ADDRESS) = state; + } + } + + return IRQ_HANDLED; +} + +static struct irqaction clps7500_timer_irq = { + .name = "CLPS7500 Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = clps7500_timer_interrupt, +}; + +/* + * Set up timer interrupt. + */ +static void __init clps7500_timer_init(void) +{ + ioctime_init(); + setup_irq(IRQ_TIMER, &clps7500_timer_irq); +} + +static struct sys_timer clps7500_timer = { + .init = clps7500_timer_init, + .offset = ioc_timer_gettimeoffset, +}; + +static struct plat_serial8250_port serial_platform_data[] = { + { + .mapbase = 0x03010fe0, + .irq = 10, + .uartclk = 1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST, + }, + { + .mapbase = 0x03010be0, + .irq = 0, + .uartclk = 1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST, + }, + { + .iobase = ISASLOT_IO + 0x2e8, + .irq = 41, + .uartclk = 1843200, + .regshift = 0, + .iotype = UPIO_PORT, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, + { + .iobase = ISASLOT_IO + 0x3e8, + .irq = 40, + .uartclk = 1843200, + .regshift = 0, + .iotype = UPIO_PORT, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, + { }, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +static void __init clps7500_init(void) +{ + platform_device_register(&serial_device); +} + +MACHINE_START(CLPS7500, "CL-PS7500") + /* Maintainer: Philip Blundell */ + .phys_io = 0x03000000, + .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc, + .map_io = clps7500_map_io, + .init_irq = clps7500_init_irq, + .init_machine = clps7500_init, + .timer = &clps7500_timer, +MACHINE_END + diff --git a/trunk/arch/arm/mach-clps7500/include/mach/acornfb.h b/trunk/arch/arm/mach-clps7500/include/mach/acornfb.h new file mode 100644 index 000000000000..aea6330c9745 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/acornfb.h @@ -0,0 +1,33 @@ +#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119) + +static inline void +acornfb_vidc20_find_rates(struct vidc_timing *vidc, + struct fb_var_screeninfo *var) +{ + u_int bandwidth; + + vidc->control |= VIDC20_CTRL_PIX_CK; + + /* Calculate bandwidth */ + bandwidth = var->pixclock * 8 / var->bits_per_pixel; + + /* Encode bandwidth as VIDC20 setting */ + if (bandwidth > 16667*2) + vidc->control |= VIDC20_CTRL_FIFO_16; + else if (bandwidth > 13333*2) + vidc->control |= VIDC20_CTRL_FIFO_20; + else if (bandwidth > 11111*2) + vidc->control |= VIDC20_CTRL_FIFO_24; + else + vidc->control |= VIDC20_CTRL_FIFO_28; + + vidc->pll_ctl = 0x2020; +} + +#ifdef CONFIG_CHRONTEL_7003 +#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK +#else +#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK +#endif + +#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK diff --git a/trunk/arch/arm/mach-clps7500/include/mach/debug-macro.S b/trunk/arch/arm/mach-clps7500/include/mach/debug-macro.S new file mode 100644 index 000000000000..af4104e7e84a --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/debug-macro.S @@ -0,0 +1,21 @@ +/* arch/arm/mach-clps7500/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart,rx + mov \rx, #0xe0000000 + orr \rx, \rx, #0x00010000 + orr \rx, \rx, #0x00000be0 + .endm + +#define UART_SHIFT 2 +#include diff --git a/trunk/arch/arm/mach-clps7500/include/mach/dma.h b/trunk/arch/arm/mach-clps7500/include/mach/dma.h new file mode 100644 index 000000000000..63fcde505498 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/dma.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-clps7500/include/mach/dma.h + * + * Copyright (C) 1999 Nexus Electronics Ltd. + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* DMA is not yet implemented! It should be the same as acorn, copy over.. */ + +/* + * This is the maximum DMA address that can be DMAd to. + * There should not be more than (0xd0000000 - 0xc0000000) + * bytes of RAM. + */ +#define MAX_DMA_ADDRESS 0xd0000000 + +#define DMA_S0 0 + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-clps7500/include/mach/entry-macro.S b/trunk/arch/arm/mach-clps7500/include/mach/entry-macro.S new file mode 100644 index 000000000000..4e7e54144093 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +#include +#include + + .equ ioc_base_high, IOC_BASE & 0xff000000 + .equ ioc_base_low, IOC_BASE & 0x00ff0000 + + .macro get_irqnr_preamble, base, tmp + mov \base, #ioc_base_high @ point at IOC + .if ioc_base_low + orr \base, \base, #ioc_base_low + .endif + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/trunk/arch/arm/mach-clps7500/include/mach/hardware.h b/trunk/arch/arm/mach-clps7500/include/mach/hardware.h new file mode 100644 index 000000000000..a6ad1d44badf --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/hardware.h @@ -0,0 +1,67 @@ +/* + * arch/arm/mach-clps7500/include/mach/hardware.h + * + * Copyright (C) 1996-1999 Russell King. + * Copyright (C) 1999 Nexus Electronics Ltd. + * + * This file contains the hardware definitions of the + * CL7500 evaluation board. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include +#include + +#ifdef __ASSEMBLY__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __iomem *)(x)) +#endif + +/* + * What hardware must be present + */ +#define HAS_IOMD +#define HAS_VIDC20 + +/* Hardware addresses of major areas. + * *_START is the physical address + * *_SIZE is the size of the region + * *_BASE is the virtual address + */ + +#define IO_START 0x03000000 /* I/O */ +#define IO_SIZE 0x01000000 +#define IO_BASE IOMEM(0xe0000000) + +#define ISA_START 0x0c000000 /* ISA */ +#define ISA_SIZE 0x00010000 +#define ISA_BASE 0xe1000000 + +#define CLPS7500_FLASH_START 0x01000000 /* XXX */ +#define CLPS7500_FLASH_SIZE 0x01000000 +#define CLPS7500_FLASH_BASE 0xe2000000 + +#define LED_START 0x0302B000 +#define LED_SIZE 0x00001000 +#define LED_BASE 0xe3000000 +#define LED_ADDRESS (LED_BASE + 0xa00) + +/* Let's define SCREEN_START for CL7500, even though it's a lie. */ +#define SCREEN_START 0x02000000 /* VRAM */ +#define SCREEN_END 0xdfc00000 +#define SCREEN_BASE 0xdf800000 + +#define VIDC_BASE (void __iomem *)0xe0400000 +#define IOMD_BASE IOMEM(0xe0200000) +#define IOC_BASE IOMEM(0xe0200000) +#define FLOPPYDMA_BASE IOMEM(0xe002a000) +#define PCIO_BASE IOMEM(0xe0010000) + +#define vidc_writel(val) __raw_writel(val, VIDC_BASE) + +/* in/out bias for the ISA slot region */ +#define ISASLOT_IO 0x80400000 + +#endif diff --git a/trunk/arch/arm/mach-clps7500/include/mach/io.h b/trunk/arch/arm/mach-clps7500/include/mach/io.h new file mode 100644 index 000000000000..2ff2860889ed --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/io.h @@ -0,0 +1,255 @@ +/* + * arch/arm/mach-clps7500/include/mach/io.h + * from arch/arm/mach-rpc/include/mach/io.h + * + * Copyright (C) 1997 Russell King + * + * Modifications: + * 06-Dec-1997 RMK Created. + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. Note that all addresses are + * shifted left! + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +/* + * Dynamic IO functions - let the compiler + * optimize the expressions + */ +static inline void __outb (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "strb %1, [%0, %2, lsl #2] @ outb" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outw (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outw" + : "=&r" (temp) + : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outl (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outl" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ +{ \ + unsigned long temp, value; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ + : "=&r" (temp), "=r" (value) \ + : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ + return (unsigned sz)value; \ +} + +static inline unsigned int __ioaddr (unsigned int port) \ +{ \ + if (__PORT_PCIO(port)) \ + return (unsigned int)(PCIO_BASE + (port << 2)); \ + else \ + return (unsigned int)(IO_BASE + (port << 2)); \ +} + +#define DECLARE_IO(sz,fnsuffix,instr) \ + DECLARE_DYN_IN(sz,fnsuffix,instr) + +DECLARE_IO(char,b,"b") +DECLARE_IO(short,w,"") +DECLARE_IO(int,l,"") + +#undef DECLARE_IO +#undef DECLARE_DYN_IN + +/* + * Constant address IO functions + * + * These have to be macros for the 'J' constraint to work - + * +/-4096 immediate operand. + */ +#define __outbc(value,port) \ +({ \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inbc(port) \ +({ \ + unsigned char result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define __outwc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inwc(port) \ +({ \ + unsigned short result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result & 0xffff; \ +}) + +#define __outlc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inlc(port) \ +({ \ + unsigned long result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define __ioaddrc(port) \ + (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2)) + +#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) +#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) +#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) +#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) +#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) +#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) +#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) +/* the following macro is deprecated */ +#define ioaddr(port) __ioaddr((port)) + +#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) +#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) + +#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) +#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) + +/* + * 1:1 mapping for ioremapped regions. + */ +#define __mem_pci(x) (x) + +#endif diff --git a/trunk/arch/arm/mach-clps7500/include/mach/irq.h b/trunk/arch/arm/mach-clps7500/include/mach/irq.h new file mode 100644 index 000000000000..d02fcf28ee05 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/irq.h @@ -0,0 +1,32 @@ +/* + * arch/arm/mach-clps7500/include/mach/irq.h + * + * Copyright (C) 1996 Russell King + * Copyright (C) 1999, 2001 Nexus Electronics Ltd. + * + * Changelog: + * 10-10-1996 RMK Brought up to date with arch-sa110eval + * 22-08-1998 RMK Restructured IRQ routines + * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code + */ + +#include +#include + +static inline int fixup_irq(unsigned int irq) +{ + if (irq == IRQ_ISA) { + int isabits = *((volatile unsigned int *)0xe002b700); + if (isabits == 0) { + printk("Spurious ISA IRQ!\n"); + return irq; + } + irq = IRQ_ISA_BASE; + while (!(isabits & 1)) { + irq++; + isabits >>= 1; + } + } + + return irq; +} diff --git a/trunk/arch/arm/mach-clps7500/include/mach/irqs.h b/trunk/arch/arm/mach-clps7500/include/mach/irqs.h new file mode 100644 index 000000000000..bee66b487f59 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/irqs.h @@ -0,0 +1,66 @@ +/* + * arch/arm/mach-clps7500/include/mach/irqs.h + * + * Copyright (C) 1999 Nexus Electronics Ltd + */ + +#define IRQ_INT2 0 +#define IRQ_INT1 2 +#define IRQ_VSYNCPULSE 3 +#define IRQ_POWERON 4 +#define IRQ_TIMER0 5 +#define IRQ_TIMER1 6 +#define IRQ_FORCE 7 +#define IRQ_INT8 8 +#define IRQ_ISA 9 +#define IRQ_INT6 10 +#define IRQ_INT5 11 +#define IRQ_INT4 12 +#define IRQ_INT3 13 +#define IRQ_KEYBOARDTX 14 +#define IRQ_KEYBOARDRX 15 + +#define IRQ_DMA0 16 +#define IRQ_DMA1 17 +#define IRQ_DMA2 18 +#define IRQ_DMA3 19 +#define IRQ_DMAS0 20 +#define IRQ_DMAS1 21 + +#define IRQ_IOP0 24 +#define IRQ_IOP1 25 +#define IRQ_IOP2 26 +#define IRQ_IOP3 27 +#define IRQ_IOP4 28 +#define IRQ_IOP5 29 +#define IRQ_IOP6 30 +#define IRQ_IOP7 31 + +#define IRQ_MOUSERX 40 +#define IRQ_MOUSETX 41 +#define IRQ_ADC 42 +#define IRQ_EVENT1 43 +#define IRQ_EVENT2 44 + +#define IRQ_ISA_BASE 48 +#define IRQ_ISA_3 48 +#define IRQ_ISA_4 49 +#define IRQ_ISA_5 50 +#define IRQ_ISA_7 51 +#define IRQ_ISA_9 52 +#define IRQ_ISA_10 53 +#define IRQ_ISA_11 54 +#define IRQ_ISA_14 55 + +#define FIQ_INT9 0 +#define FIQ_INT5 1 +#define FIQ_INT6 4 +#define FIQ_INT8 6 +#define FIQ_FORCE 7 + +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + +#define IRQ_TIMER IRQ_TIMER0 diff --git a/trunk/arch/arm/mach-clps7500/include/mach/memory.h b/trunk/arch/arm/mach-clps7500/include/mach/memory.h new file mode 100644 index 000000000000..87b32db470c8 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/memory.h @@ -0,0 +1,43 @@ +/* + * arch/arm/mach-clps7500/include/mach/memory.h + * + * Copyright (c) 1996,1997,1998 Russell King. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings + * 11-Jan-1998 RMK Uninlined to reduce hits on cache + * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt + * 21-Mar-1999 RMK Renamed to memory.h + * RMK Added TASK_SIZE and PAGE_OFFSET + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x10000000) + +/* + * These are exactly the same on the RiscPC as the + * physical memory view. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + +#endif diff --git a/trunk/arch/arm/mach-clps7500/include/mach/system.h b/trunk/arch/arm/mach-clps7500/include/mach/system.h new file mode 100644 index 000000000000..6d325fbe8b08 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/system.h @@ -0,0 +1,23 @@ +/* + * arch/arm/mach-clps7500/include/mach/system.h + * + * Copyright (c) 1999 Nexus Electronics Ltd. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include +#include + +static inline void arch_idle(void) +{ + iomd_writeb(0, IOMD_SUSMODE); +} + +#define arch_reset(mode) \ + do { \ + iomd_writeb(0, IOMD_ROMCR0); \ + cpu_reset(0); \ + } while (0) + +#endif diff --git a/trunk/arch/arm/mach-clps7500/include/mach/timex.h b/trunk/arch/arm/mach-clps7500/include/mach/timex.h new file mode 100644 index 000000000000..dfaa9b425757 --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/timex.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-clps7500/include/mach/timex.h + * + * CL7500 architecture timex specifications + * + * Copyright (C) 1999 Nexus Electronics Ltd + */ + +/* + * On the ARM7500, the clock ticks at 2MHz. + */ +#define CLOCK_TICK_RATE 2000000 + diff --git a/trunk/arch/arm/mach-clps7500/include/mach/uncompress.h b/trunk/arch/arm/mach-clps7500/include/mach/uncompress.h new file mode 100644 index 000000000000..d7d0af4b49fc --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/uncompress.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-clps7500/include/mach/uncompress.h + * + * Copyright (C) 1999, 2000 Nexus Electronics Ltd. + */ +#define BASE 0x03010000 +#define SERBASE (BASE + (0x2f8 << 2)) + +static inline void putc(char c) +{ + while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20)) + barrier(); + + *((volatile unsigned int *)(SERBASE)) = c; +} + +static inline void flush(void) +{ +} + +static __inline__ void arch_decomp_setup(void) +{ + int baud = 3686400 / (9600 * 32); + + *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80; + *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff; + *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8; + *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */ + *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */ +} + +/* + * nothing to do + */ +#define arch_decomp_wdog() diff --git a/trunk/arch/arm/mach-clps7500/include/mach/vmalloc.h b/trunk/arch/arm/mach-clps7500/include/mach/vmalloc.h new file mode 100644 index 000000000000..8fc5406d1b6d --- /dev/null +++ b/trunk/arch/arm/mach-clps7500/include/mach/vmalloc.h @@ -0,0 +1,4 @@ +/* + * arch/arm/mach-clps7500/include/mach/vmalloc.h + */ +#define VMALLOC_END (PAGE_OFFSET + 0x1c000000) diff --git a/trunk/arch/arm/mach-davinci/include/mach/dma.h b/trunk/arch/arm/mach-davinci/include/mach/dma.h new file mode 100644 index 000000000000..8e2f2d0ba667 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/include/mach/dma.h @@ -0,0 +1,16 @@ +/* + * DaVinci DMA definitions + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff + +#endif /* __ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/io.h b/trunk/arch/arm/mach-davinci/include/mach/io.h index a48795fd2417..b78ee9140496 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/io.h +++ b/trunk/arch/arm/mach-davinci/include/mach/io.h @@ -29,7 +29,8 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) +#define PCIO_BASE 0 +#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) #define __mem_pci(a) (a) #define __mem_isa(a) (a) diff --git a/trunk/arch/arm/mach-davinci/include/mach/memory.h b/trunk/arch/arm/mach-davinci/include/mach/memory.h index 86c25c7f3ce3..dd1625c23cf4 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/memory.h +++ b/trunk/arch/arm/mach-davinci/include/mach/memory.h @@ -52,8 +52,13 @@ __arch_adjust_zones(int node, unsigned long *size, unsigned long *holes) if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + (128<<20)) #endif +/* + * Bus address is physical address + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif /* __ASM_ARCH_MEMORY_H */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/vmalloc.h b/trunk/arch/arm/mach-davinci/include/mach/vmalloc.h index ad51625b6609..b98bd9e92fd6 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/vmalloc.h +++ b/trunk/arch/arm/mach-davinci/include/mach/vmalloc.h @@ -8,6 +8,7 @@ * is licensed "as is" without any warranty of any kind, whether express * or implied. */ +#include #include /* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/dma.h b/trunk/arch/arm/mach-ebsa110/include/mach/dma.h new file mode 100644 index 000000000000..780a04c8bbe9 --- /dev/null +++ b/trunk/arch/arm/mach-ebsa110/include/mach/dma.h @@ -0,0 +1,11 @@ +/* + * arch/arm/mach-ebsa110/include/mach/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * EBSA110 DMA definitions + */ diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/memory.h b/trunk/arch/arm/mach-ebsa110/include/mach/memory.h index 0ca66d080c69..eea4b75b657b 100644 --- a/trunk/arch/arm/mach-ebsa110/include/mach/memory.h +++ b/trunk/arch/arm/mach-ebsa110/include/mach/memory.h @@ -21,6 +21,13 @@ */ #define PHYS_OFFSET UL(0x00000000) +/* + * We keep this 1:1 so that we don't interfere + * with the PCMCIA memory regions + */ +#define __virt_to_bus(x) (x) +#define __bus_to_virt(x) (x) + /* * Cache flushing area - SRAM */ diff --git a/trunk/arch/arm/mach-ep93xx/clock.c b/trunk/arch/arm/mach-ep93xx/clock.c index 8c9f2491dccc..96049283a10a 100644 --- a/trunk/arch/arm/mach-ep93xx/clock.c +++ b/trunk/arch/arm/mach-ep93xx/clock.c @@ -16,11 +16,12 @@ #include #include #include + +#include #include #include struct clk { - char *name; unsigned long rate; int users; u32 enable_reg; @@ -28,53 +29,33 @@ struct clk { }; static struct clk clk_uart = { - .name = "UARTCLK", .rate = 14745600, }; -static struct clk clk_pll1 = { - .name = "pll1", -}; -static struct clk clk_f = { - .name = "fclk", -}; -static struct clk clk_h = { - .name = "hclk", -}; -static struct clk clk_p = { - .name = "pclk", -}; -static struct clk clk_pll2 = { - .name = "pll2", -}; +static struct clk clk_pll1; +static struct clk clk_f; +static struct clk clk_h; +static struct clk clk_p; +static struct clk clk_pll2; static struct clk clk_usb_host = { - .name = "usb_host", .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, }; - -static struct clk *clocks[] = { - &clk_uart, - &clk_pll1, - &clk_f, - &clk_h, - &clk_p, - &clk_pll2, - &clk_usb_host, +#define INIT_CK(dev,con,ck) \ + { .dev_id = dev, .con_id = con, .clk = ck } + +static struct clk_lookup clocks[] = { + INIT_CK("apb:uart1", NULL, &clk_uart), + INIT_CK("apb:uart2", NULL, &clk_uart), + INIT_CK("apb:uart3", NULL, &clk_uart), + INIT_CK(NULL, "pll1", &clk_pll1), + INIT_CK(NULL, "fclk", &clk_f), + INIT_CK(NULL, "hclk", &clk_h), + INIT_CK(NULL, "pclk", &clk_p), + INIT_CK(NULL, "pll2", &clk_pll2), + INIT_CK(NULL, "usb_host", &clk_usb_host), }; -struct clk *clk_get(struct device *dev, const char *id) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(clocks); i++) { - if (!strcmp(clocks[i]->name, id)) - return clocks[i]; - } - - return ERR_PTR(-ENOENT); -} -EXPORT_SYMBOL(clk_get); int clk_enable(struct clk *clk) { @@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk) } EXPORT_SYMBOL(clk_get_rate); -void clk_put(struct clk *clk) -{ -} -EXPORT_SYMBOL(clk_put); - - static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; @@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word) static int __init ep93xx_clock_init(void) { u32 value; + int i; value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); if (!(value & 0x00800000)) { /* PLL1 bypassed? */ @@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void) clk_f.rate / 1000000, clk_h.rate / 1000000, clk_p.rate / 1000000); + for (i = 0; i < ARRAY_SIZE(clocks); i++) + clkdev_add(&clocks[i]); return 0; } arch_initcall(ep93xx_clock_init); diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/clkdev.h b/trunk/arch/arm/mach-ep93xx/include/mach/clkdev.h new file mode 100644 index 000000000000..04b37a89801c --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/clkdev.h @@ -0,0 +1,7 @@ +#ifndef __ASM_MACH_CLKDEV_H +#define __ASM_MACH_CLKDEV_H + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do { } while (0) + +#endif diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/dma.h b/trunk/arch/arm/mach-ep93xx/include/mach/dma.h new file mode 100644 index 000000000000..d0fa9656e92f --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/dma.h @@ -0,0 +1,3 @@ +/* + * arch/arm/mach-ep93xx/include/mach/dma.h + */ diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/io.h b/trunk/arch/arm/mach-ep93xx/include/mach/io.h index fd5f081cc8b7..1ab9a90ad339 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/io.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/io.h @@ -4,5 +4,5 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(p) __typesafe_io(p) -#define __mem_pci(p) (p) +#define __io(p) ((void __iomem *)(p)) +#define __mem_pci(p) (p) diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/memory.h b/trunk/arch/arm/mach-ep93xx/include/mach/memory.h index 5c80c3c8158d..f1b633590752 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/memory.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/memory.h @@ -7,4 +7,8 @@ #define PHYS_OFFSET UL(0x00000000) +#define __bus_to_virt(x) __phys_to_virt(x) +#define __virt_to_bus(x) __virt_to_phys(x) + + #endif diff --git a/trunk/arch/arm/mach-footbridge/include/mach/isa-dma.h b/trunk/arch/arm/mach-footbridge/include/mach/dma.h similarity index 91% rename from trunk/arch/arm/mach-footbridge/include/mach/isa-dma.h rename to trunk/arch/arm/mach-footbridge/include/mach/dma.h index 5bd4a0d338a8..62afd213effb 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/isa-dma.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/dma.h @@ -1,5 +1,5 @@ /* - * arch/arm/mach-footbridge/include/mach/isa-dma.h + * arch/arm/mach-footbridge/include/mach/dma.h * * Architecture DMA routines * diff --git a/trunk/arch/arm/mach-footbridge/include/mach/hardware.h b/trunk/arch/arm/mach-footbridge/include/mach/hardware.h index ff44e0ce2e14..ffaea90486f9 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/hardware.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/hardware.h @@ -12,6 +12,8 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#include + /* Virtual Physical Size * 0xff800000 0x40000000 1MB X-Bus * 0xff000000 0x7c000000 1MB PCI I/O space @@ -26,6 +28,9 @@ #define XBUS_SIZE 0x00100000 #define XBUS_BASE 0xff800000 +#define PCIO_SIZE 0x00100000 +#define PCIO_BASE 0xff000000 + #define ARMCSR_SIZE 0x00100000 #define ARMCSR_BASE 0xfe000000 diff --git a/trunk/arch/arm/mach-footbridge/include/mach/io.h b/trunk/arch/arm/mach-footbridge/include/mach/io.h index 101a4fe90bde..a7b066239996 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/io.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/io.h @@ -14,8 +14,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define PCIO_SIZE 0x00100000 -#define PCIO_BASE 0xff000000 +#include #define IO_SPACE_LIMIT 0xffff diff --git a/trunk/arch/arm/mach-footbridge/include/mach/memory.h b/trunk/arch/arm/mach-footbridge/include/mach/memory.h index cb16e59d87b6..6ae2f1a07ab9 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/memory.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/memory.h @@ -30,18 +30,9 @@ extern unsigned long __virt_to_bus(unsigned long); extern unsigned long __bus_to_virt(unsigned long); #endif -#define __virt_to_bus __virt_to_bus -#define __bus_to_virt __bus_to_virt #elif defined(CONFIG_FOOTBRIDGE_HOST) -/* - * The footbridge is programmed to expose the system RAM at the corresponding - * address. So, if PAGE_OFFSET is 0xc0000000, RAM appears at 0xe0000000. - * If 0x80000000, then its exposed at 0xa0000000 on the bus. etc. - * The only requirement is that the RAM isn't placed at bus address 0 which - * would clash with VGA cards. - */ #define __virt_to_bus(x) ((x) - 0xe0000000) #define __bus_to_virt(x) ((x) + 0xe0000000) diff --git a/trunk/arch/arm/mach-h720x/include/mach/isa-dma.h b/trunk/arch/arm/mach-h720x/include/mach/dma.h similarity index 60% rename from trunk/arch/arm/mach-h720x/include/mach/isa-dma.h rename to trunk/arch/arm/mach-h720x/include/mach/dma.h index 3eafb3f163c0..0a9d86ee84fe 100644 --- a/trunk/arch/arm/mach-h720x/include/mach/isa-dma.h +++ b/trunk/arch/arm/mach-h720x/include/mach/dma.h @@ -1,5 +1,5 @@ /* - * arch/arm/mach-h720x/include/mach/isa-dma.h + * arch/arm/mach-h720x/include/mach/dma.h * * Architecture DMA routes * @@ -8,6 +8,13 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H +/* + * This is the maximum DMA address that can be DMAd to. + * There should not be more than (0xd0000000 - 0xc0000000) + * bytes of RAM. + */ +#define MAX_DMA_ADDRESS 0xd0000000 + #if defined (CONFIG_CPU_H7201) #define MAX_DMA_CHANNELS 3 #elif defined (CONFIG_CPU_H7202) diff --git a/trunk/arch/arm/mach-h720x/include/mach/io.h b/trunk/arch/arm/mach-h720x/include/mach/io.h index 2c8659c21a93..1dab74ce88c6 100644 --- a/trunk/arch/arm/mach-h720x/include/mach/io.h +++ b/trunk/arch/arm/mach-h720x/include/mach/io.h @@ -14,9 +14,11 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) +#define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-h720x/include/mach/memory.h b/trunk/arch/arm/mach-h720x/include/mach/memory.h index ef4c1e26f18e..cb26f49cc4e1 100644 --- a/trunk/arch/arm/mach-h720x/include/mach/memory.h +++ b/trunk/arch/arm/mach-h720x/include/mach/memory.h @@ -7,13 +7,23 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H +/* + * Page offset: + * ( 0xc0000000UL ) + */ #define PHYS_OFFSET UL(0x40000000) + /* - * This is the maximum DMA address that can be DMAd to. - * There should not be more than (0xd0000000 - 0xc0000000) - * bytes of RAM. + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + * + * There is something to do here later !, Mar 2000, Jungjun Kim */ -#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_256M - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_256M) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) #endif diff --git a/trunk/arch/arm/mach-imx/dma.c b/trunk/arch/arm/mach-imx/dma.c index 1536583eece0..c10810c936b3 100644 --- a/trunk/arch/arm/mach-imx/dma.c +++ b/trunk/arch/arm/mach-imx/dma.c @@ -28,11 +28,10 @@ #include #include -#include #include #include #include -#include +#include #include struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; @@ -139,7 +138,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch, int imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, unsigned int dma_length, unsigned int dev_addr, - unsigned int dmamode) + dmamode_t dmamode) { struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; @@ -224,7 +223,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, int imx_dma_setup_sg(imx_dmach_t dma_ch, struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, - unsigned int dev_addr, unsigned int dmamode) + unsigned int dev_addr, dmamode_t dmamode) { int res; struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; diff --git a/trunk/arch/arm/mach-imx/include/mach/imx-dma.h b/trunk/arch/arm/mach-imx/include/mach/imx-dma.h index bbe54df7f0de..44d89c35539a 100644 --- a/trunk/arch/arm/mach-imx/include/mach/imx-dma.h +++ b/trunk/arch/arm/mach-imx/include/mach/imx-dma.h @@ -18,7 +18,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include +#include #ifndef __ASM_ARCH_IMX_DMA_H #define __ASM_ARCH_IMX_DMA_H @@ -48,7 +48,7 @@ struct imx_dma_channel { void (*irq_handler) (int, void *); void (*err_handler) (int, void *, int errcode); void *data; - unsigned int dma_mode; + dmamode_t dma_mode; struct scatterlist *sg; unsigned int sgbc; unsigned int sgcount; @@ -66,18 +66,14 @@ extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; /* The type to distinguish channel numbers parameter from ordinal int type */ typedef int imx_dmach_t; -#define DMA_MODE_READ 0 -#define DMA_MODE_WRITE 1 -#define DMA_MODE_MASK 1 - int imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, - unsigned int dma_length, unsigned int dev_addr, unsigned int dmamode); + unsigned int dma_length, unsigned int dev_addr, dmamode_t dmamode); int imx_dma_setup_sg(imx_dmach_t dma_ch, struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, - unsigned int dev_addr, unsigned int dmamode); + unsigned int dev_addr, dmamode_t dmamode); int imx_dma_setup_handlers(imx_dmach_t dma_ch, diff --git a/trunk/arch/arm/mach-imx/include/mach/io.h b/trunk/arch/arm/mach-imx/include/mach/io.h index 9e197ae4590f..c50c5fa6fb81 100644 --- a/trunk/arch/arm/mach-imx/include/mach/io.h +++ b/trunk/arch/arm/mach-imx/include/mach/io.h @@ -20,9 +20,11 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) +#define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-imx/include/mach/memory.h b/trunk/arch/arm/mach-imx/include/mach/memory.h index a93df7cba694..5c453063c0ed 100644 --- a/trunk/arch/arm/mach-imx/include/mach/memory.h +++ b/trunk/arch/arm/mach-imx/include/mach/memory.h @@ -23,4 +23,14 @@ #define PHYS_OFFSET UL(0x08000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) (x - PAGE_OFFSET + PHYS_OFFSET) +#define __bus_to_virt(x) (x - PHYS_OFFSET + PAGE_OFFSET) + #endif diff --git a/trunk/arch/arm/mach-integrator/include/mach/dma.h b/trunk/arch/arm/mach-integrator/include/mach/dma.h new file mode 100644 index 000000000000..fbebe85a2db7 --- /dev/null +++ b/trunk/arch/arm/mach-integrator/include/mach/dma.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-integrator/include/mach/dma.h + * + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-integrator/include/mach/memory.h b/trunk/arch/arm/mach-integrator/include/mach/memory.h index 2b2e7a110724..be7e63c21d25 100644 --- a/trunk/arch/arm/mach-integrator/include/mach/memory.h +++ b/trunk/arch/arm/mach-integrator/include/mach/memory.h @@ -24,9 +24,16 @@ * Physical DRAM offset. */ #define PHYS_OFFSET UL(0x00000000) - #define BUS_OFFSET UL(0x80000000) -#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET) -#define __bus_to_virt(x) ((x) - BUS_OFFSET + PAGE_OFFSET) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) (x - PAGE_OFFSET + BUS_OFFSET) +#define __bus_to_virt(x) (x - BUS_OFFSET + PAGE_OFFSET) #endif diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/dma.h b/trunk/arch/arm/mach-iop13xx/include/mach/dma.h new file mode 100644 index 000000000000..d79846fbb394 --- /dev/null +++ b/trunk/arch/arm/mach-iop13xx/include/mach/dma.h @@ -0,0 +1,3 @@ +#ifndef _IOP13XX_DMA_H +#define _IOP13XX_DMA_H +#endif diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/memory.h b/trunk/arch/arm/mach-iop13xx/include/mach/memory.h index e012bf13c955..b82602d529bf 100644 --- a/trunk/arch/arm/mach-iop13xx/include/mach/memory.h +++ b/trunk/arch/arm/mach-iop13xx/include/mach/memory.h @@ -16,6 +16,18 @@ #define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) #define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) +/* + * Virtual view <-> PCI DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ + +/* RAM has 1:1 mapping on the PCIe/x Busses */ +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) + static inline dma_addr_t __virt_to_lbus(unsigned long x) { return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE; @@ -43,7 +55,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x) if (is_lbus_device(dev) && __is_lbus_dma(__dma)) \ __virt = __lbus_to_virt(__dma); \ else \ - __virt = __phys_to_virt(__dma); \ + __virt = __bus_to_virt(__dma); \ (void *)__virt; \ }) @@ -54,7 +66,7 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x) if (is_lbus_device(dev) && __is_lbus_virt(__virt)) \ __dma = __virt_to_lbus(__virt); \ else \ - __dma = __virt_to_phys(__virt); \ + __dma = __virt_to_bus(__virt); \ __dma; \ }) diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/timex.h b/trunk/arch/arm/mach-iop13xx/include/mach/timex.h index 45fb2745bb54..5b1f1c8a8270 100644 --- a/trunk/arch/arm/mach-iop13xx/include/mach/timex.h +++ b/trunk/arch/arm/mach-iop13xx/include/mach/timex.h @@ -1 +1,3 @@ +#include + #define CLOCK_TICK_RATE (100 * HZ) diff --git a/trunk/arch/arm/mach-iop32x/include/mach/dma.h b/trunk/arch/arm/mach-iop32x/include/mach/dma.h new file mode 100644 index 000000000000..f8bd817f205d --- /dev/null +++ b/trunk/arch/arm/mach-iop32x/include/mach/dma.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-iop32x/include/mach/dma.h + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ diff --git a/trunk/arch/arm/mach-iop32x/include/mach/io.h b/trunk/arch/arm/mach-iop32x/include/mach/io.h index 339e5854728b..ce54705ba3d4 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/io.h +++ b/trunk/arch/arm/mach-iop32x/include/mach/io.h @@ -11,7 +11,7 @@ #ifndef __IO_H #define __IO_H -#include +#include extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned int mtype); diff --git a/trunk/arch/arm/mach-iop32x/include/mach/memory.h b/trunk/arch/arm/mach-iop32x/include/mach/memory.h index c30f6450ad50..42cd4bf3148c 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/memory.h +++ b/trunk/arch/arm/mach-iop32x/include/mach/memory.h @@ -5,9 +5,22 @@ #ifndef __MEMORY_H #define __MEMORY_H +#include + /* * Physical DRAM offset. */ #define PHYS_OFFSET UL(0xa0000000) +/* + * Virtual view <-> PCI DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) + + #endif diff --git a/trunk/arch/arm/mach-iop32x/include/mach/system.h b/trunk/arch/arm/mach-iop32x/include/mach/system.h index 32d9e5b0a28d..20f923e54f46 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/system.h +++ b/trunk/arch/arm/mach-iop32x/include/mach/system.h @@ -7,9 +7,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ + #include -#include -#include static inline void arch_idle(void) { diff --git a/trunk/arch/arm/mach-iop32x/include/mach/timex.h b/trunk/arch/arm/mach-iop32x/include/mach/timex.h index 7262ab81419d..a541afced3cb 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/timex.h +++ b/trunk/arch/arm/mach-iop32x/include/mach/timex.h @@ -3,4 +3,7 @@ * * IOP32x architecture timex specifications */ + +#include + #define CLOCK_TICK_RATE (100 * HZ) diff --git a/trunk/arch/arm/mach-iop33x/include/mach/dma.h b/trunk/arch/arm/mach-iop33x/include/mach/dma.h new file mode 100644 index 000000000000..d8b42232931d --- /dev/null +++ b/trunk/arch/arm/mach-iop33x/include/mach/dma.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-iop33x/include/mach/dma.h + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ diff --git a/trunk/arch/arm/mach-iop33x/include/mach/io.h b/trunk/arch/arm/mach-iop33x/include/mach/io.h index e99a7ed6d050..158874631217 100644 --- a/trunk/arch/arm/mach-iop33x/include/mach/io.h +++ b/trunk/arch/arm/mach-iop33x/include/mach/io.h @@ -11,7 +11,7 @@ #ifndef __IO_H #define __IO_H -#include +#include extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned int mtype); diff --git a/trunk/arch/arm/mach-iop33x/include/mach/memory.h b/trunk/arch/arm/mach-iop33x/include/mach/memory.h index a30a96aa6d2d..2cef0bbb354f 100644 --- a/trunk/arch/arm/mach-iop33x/include/mach/memory.h +++ b/trunk/arch/arm/mach-iop33x/include/mach/memory.h @@ -5,9 +5,22 @@ #ifndef __MEMORY_H #define __MEMORY_H +#include + /* * Physical DRAM offset. */ #define PHYS_OFFSET UL(0x00000000) +/* + * Virtual view <-> PCI DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) (__virt_to_phys(x)) +#define __bus_to_virt(x) (__phys_to_virt(x)) + + #endif diff --git a/trunk/arch/arm/mach-iop33x/include/mach/timex.h b/trunk/arch/arm/mach-iop33x/include/mach/timex.h index 54c589091d6e..c75760844d49 100644 --- a/trunk/arch/arm/mach-iop33x/include/mach/timex.h +++ b/trunk/arch/arm/mach-iop33x/include/mach/timex.h @@ -3,4 +3,7 @@ * * IOP3xx architecture timex specifications */ + +#include + #define CLOCK_TICK_RATE (100 * HZ) diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/dma.h b/trunk/arch/arm/mach-ixp2000/include/mach/dma.h new file mode 100644 index 000000000000..26063d60f622 --- /dev/null +++ b/trunk/arch/arm/mach-ixp2000/include/mach/dma.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-ixp2000/include/mach/dma.h + * + * Copyright (C) 2002 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/memory.h b/trunk/arch/arm/mach-ixp2000/include/mach/memory.h index aee7eb8a71b2..241529a7c52d 100644 --- a/trunk/arch/arm/mach-ixp2000/include/mach/memory.h +++ b/trunk/arch/arm/mach-ixp2000/include/mach/memory.h @@ -15,6 +15,13 @@ #define PHYS_OFFSET UL(0x00000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ #include #define __virt_to_bus(v) \ diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/dma.h b/trunk/arch/arm/mach-ixp23xx/include/mach/dma.h new file mode 100644 index 000000000000..8886544b93f7 --- /dev/null +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/dma.h @@ -0,0 +1,3 @@ +/* + * arch/arm/mach-ixp23xx/include/mach/dma.h + */ diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/io.h b/trunk/arch/arm/mach-ixp23xx/include/mach/io.h index fd9ef8e519f7..305ea1808c71 100644 --- a/trunk/arch/arm/mach-ixp23xx/include/mach/io.h +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/io.h @@ -20,6 +20,8 @@ #define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) #define __mem_pci(a) (a) +#include /* For BUG */ + static inline void __iomem * ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) { diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h b/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h index fdd138706c70..9d40115f7ebe 100644 --- a/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/memory.h @@ -19,6 +19,16 @@ */ #define PHYS_OFFSET (0x00000000) + +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#ifndef __ASSEMBLY__ + #define __virt_to_bus(v) \ ({ unsigned int ret; \ ret = ((__virt_to_phys(v) - 0x00000000) + \ @@ -33,3 +43,6 @@ #define arch_is_coherent() 1 #endif + + +#endif diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/dma.h b/trunk/arch/arm/mach-ixp4xx/include/mach/dma.h new file mode 100644 index 000000000000..00c5070c0201 --- /dev/null +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/dma.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-ixp4xx/include/mach/dma.h + * + * Copyright (C) 2001-2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#include +#include +#include +#include + +#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/io.h b/trunk/arch/arm/mach-ixp4xx/include/mach/io.h index ce63048d45eb..319948e31bec 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/io.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/io.h @@ -49,6 +49,8 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); #else +#include + /* * In the case of using indirect PCI, we simply return the actual PCI * address and our read/write implementation use that to drive the @@ -239,7 +241,7 @@ __ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) #ifndef CONFIG_PCI -#define __io(v) __typesafe_io(v) +#define __io(v) v #else diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/memory.h b/trunk/arch/arm/mach-ixp4xx/include/mach/memory.h index 98f5e5e20980..c4d2830ac987 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/memory.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/memory.h @@ -22,8 +22,19 @@ void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes); ixp4xx_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (SZ_64M - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) #endif +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + * + * These are dummies for now. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/dma.h b/trunk/arch/arm/mach-kirkwood/include/mach/dma.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/trunk/arch/arm/mach-kirkwood/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/memory.h b/trunk/arch/arm/mach-kirkwood/include/mach/memory.h index 45431e131465..b5fb34bdccd5 100644 --- a/trunk/arch/arm/mach-kirkwood/include/mach/memory.h +++ b/trunk/arch/arm/mach-kirkwood/include/mach/memory.h @@ -7,4 +7,8 @@ #define PHYS_OFFSET UL(0x00000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + #endif diff --git a/trunk/arch/arm/mach-ks8695/include/mach/dma.h b/trunk/arch/arm/mach-ks8695/include/mach/dma.h new file mode 100644 index 000000000000..561206280089 --- /dev/null +++ b/trunk/arch/arm/mach-ks8695/include/mach/dma.h @@ -0,0 +1,17 @@ +/* + * arch/arm/mach-ks8695/include/mach/dma.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-ks8695/include/mach/io.h b/trunk/arch/arm/mach-ks8695/include/mach/io.h index a7a63ac3ba4e..f364f24ffe1e 100644 --- a/trunk/arch/arm/mach-ks8695/include/mach/io.h +++ b/trunk/arch/arm/mach-ks8695/include/mach/io.h @@ -13,7 +13,7 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-ks8695/include/mach/memory.h b/trunk/arch/arm/mach-ks8695/include/mach/memory.h index 6d5887cf5742..8fbc4c76c38b 100644 --- a/trunk/arch/arm/mach-ks8695/include/mach/memory.h +++ b/trunk/arch/arm/mach-ks8695/include/mach/memory.h @@ -37,6 +37,11 @@ extern struct bus_type platform_bus_type; (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) #define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x)) +#else + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif #endif diff --git a/trunk/arch/arm/mach-l7200/include/mach/dma.h b/trunk/arch/arm/mach-l7200/include/mach/dma.h new file mode 100644 index 000000000000..c7e48bd4590c --- /dev/null +++ b/trunk/arch/arm/mach-l7200/include/mach/dma.h @@ -0,0 +1,23 @@ +/* + * arch/arm/mach-l7200/include/mach/dma.h + * + * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) + * + * Changelog: + * 08-29-2000 SJH Created + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* DMA is not yet implemented! It should be the same as acorn, copy over.. */ + +/* + * This is the maximum DMA address that can be DMAd to. + * There should not be more than (0xd0000000 - 0xc0000000) + * bytes of RAM. + */ +#define MAX_DMA_ADDRESS 0xd0000000 + +#define DMA_S0 0 + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-l7200/include/mach/io.h b/trunk/arch/arm/mach-l7200/include/mach/io.h index a770a89fb708..d432ba9e5dff 100644 --- a/trunk/arch/arm/mach-l7200/include/mach/io.h +++ b/trunk/arch/arm/mach-l7200/include/mach/io.h @@ -10,12 +10,18 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff /* * There are not real ISA nor PCI buses, so we fake it. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-l7200/include/mach/memory.h b/trunk/arch/arm/mach-l7200/include/mach/memory.h index 9fb40ed2f03b..f338cf3ffd93 100644 --- a/trunk/arch/arm/mach-l7200/include/mach/memory.h +++ b/trunk/arch/arm/mach-l7200/include/mach/memory.h @@ -17,6 +17,9 @@ */ #define PHYS_OFFSET UL(0xf0000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * Cache flushing area - ROM */ diff --git a/trunk/arch/arm/mach-lh7a40x/include/mach/io.h b/trunk/arch/arm/mach-lh7a40x/include/mach/io.h index 6ece45911cbc..031d26f9163c 100644 --- a/trunk/arch/arm/mach-lh7a40x/include/mach/io.h +++ b/trunk/arch/arm/mach-lh7a40x/include/mach/io.h @@ -11,10 +11,12 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff /* No ISA or PCI bus on this machine. */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #endif /* __ASM_ARCH_IO_H */ diff --git a/trunk/arch/arm/mach-lh7a40x/include/mach/memory.h b/trunk/arch/arm/mach-lh7a40x/include/mach/memory.h index 189d20e543e7..1da14ff66c93 100644 --- a/trunk/arch/arm/mach-lh7a40x/include/mach/memory.h +++ b/trunk/arch/arm/mach-lh7a40x/include/mach/memory.h @@ -19,6 +19,16 @@ */ #define PHYS_OFFSET UL(0xc0000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #ifdef CONFIG_DISCONTIGMEM /* diff --git a/trunk/arch/arm/mach-loki/include/mach/dma.h b/trunk/arch/arm/mach-loki/include/mach/dma.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/trunk/arch/arm/mach-loki/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/trunk/arch/arm/mach-loki/include/mach/memory.h b/trunk/arch/arm/mach-loki/include/mach/memory.h index 2ed7e6e732c2..a39533ab489d 100644 --- a/trunk/arch/arm/mach-loki/include/mach/memory.h +++ b/trunk/arch/arm/mach-loki/include/mach/memory.h @@ -7,4 +7,8 @@ #define PHYS_OFFSET UL(0x00000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + #endif diff --git a/trunk/arch/arm/mach-msm/include/mach/io.h b/trunk/arch/arm/mach-msm/include/mach/io.h index aab964591db4..c6a2feb268b0 100644 --- a/trunk/arch/arm/mach-msm/include/mach/io.h +++ b/trunk/arch/arm/mach-msm/include/mach/io.h @@ -23,7 +23,11 @@ void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype); -#define __io(a) __typesafe_io(a) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) #define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-msm/include/mach/memory.h b/trunk/arch/arm/mach-msm/include/mach/memory.h index f4698baec976..63fd47f2e62e 100644 --- a/trunk/arch/arm/mach-msm/include/mach/memory.h +++ b/trunk/arch/arm/mach-msm/include/mach/memory.h @@ -19,5 +19,9 @@ /* physical offset of RAM */ #define PHYS_OFFSET UL(0x10000000) +/* bus address and physical addresses are identical */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/dma.h b/trunk/arch/arm/mach-mv78xx0/include/mach/dma.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/memory.h b/trunk/arch/arm/mach-mv78xx0/include/mach/memory.h index e663042d307f..9e47a140ff7a 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/memory.h +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/memory.h @@ -7,4 +7,8 @@ #define PHYS_OFFSET UL(0x00000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + #endif diff --git a/trunk/arch/arm/mach-netx/include/mach/dma.h b/trunk/arch/arm/mach-netx/include/mach/dma.h new file mode 100644 index 000000000000..690b3ebc43ac --- /dev/null +++ b/trunk/arch/arm/mach-netx/include/mach/dma.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-netx/include/mach/dma.h + * + * Copyright (C) 2005 Sascha Hauer , Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#define MAX_DMA_CHANNELS 0 +#define MAX_DMA_ADDRESS ~0 diff --git a/trunk/arch/arm/mach-netx/include/mach/io.h b/trunk/arch/arm/mach-netx/include/mach/io.h index c3921cb3b6a6..468b92a82585 100644 --- a/trunk/arch/arm/mach-netx/include/mach/io.h +++ b/trunk/arch/arm/mach-netx/include/mach/io.h @@ -22,7 +22,7 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) +#define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-netx/include/mach/memory.h b/trunk/arch/arm/mach-netx/include/mach/memory.h index 9a363f297f90..53745a1378de 100644 --- a/trunk/arch/arm/mach-netx/include/mach/memory.h +++ b/trunk/arch/arm/mach-netx/include/mach/memory.h @@ -22,5 +22,15 @@ #define PHYS_OFFSET UL(0x80000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/dma.h b/trunk/arch/arm/mach-ns9xxx/include/mach/dma.h new file mode 100644 index 000000000000..3f50d8c9e5c7 --- /dev/null +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/dma.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-ns9xxx/include/mach/dma.h + * + * Copyright (C) 2006 by Digi International Inc. + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#endif /* ifndef __ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/hardware.h b/trunk/arch/arm/mach-ns9xxx/include/mach/hardware.h index 76631128e11c..6dbb2030f563 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/hardware.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/hardware.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#include + /* * NetSilicon NS9xxx internal mapping: * diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/io.h b/trunk/arch/arm/mach-ns9xxx/include/mach/io.h index f08451d2e1bc..027bf649645a 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/io.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/io.h @@ -13,7 +13,7 @@ #define IO_SPACE_LIMIT 0xffffffff /* XXX */ -#define __io(a) __typesafe_io(a) +#define __io(a) ((void __iomem *)(a)) #define __mem_pci(a) (a) #define __mem_isa(a) (IO_BASE + (a)) diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/memory.h b/trunk/arch/arm/mach-ns9xxx/include/mach/memory.h index 6107193adbfe..649ee6235b94 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/memory.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/memory.h @@ -21,4 +21,7 @@ #define PHYS_OFFSET UL(0x00000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-omap1/Kconfig b/trunk/arch/arm/mach-omap1/Kconfig index 10a301e32434..79f0b1f8497b 100644 --- a/trunk/arch/arm/mach-omap1/Kconfig +++ b/trunk/arch/arm/mach-omap1/Kconfig @@ -4,19 +4,16 @@ comment "OMAP Core Type" config ARCH_OMAP730 depends on ARCH_OMAP1 bool "OMAP730 Based System" - select CPU_ARM926T select ARCH_OMAP_OTG config ARCH_OMAP15XX depends on ARCH_OMAP1 default y bool "OMAP15xx Based System" - select CPU_ARM925T config ARCH_OMAP16XX depends on ARCH_OMAP1 bool "OMAP16xx Based System" - select CPU_ARM926T select ARCH_OMAP_OTG comment "OMAP Board Type" diff --git a/trunk/arch/arm/mach-orion5x/include/mach/dma.h b/trunk/arch/arm/mach-orion5x/include/mach/dma.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/trunk/arch/arm/mach-orion5x/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/trunk/arch/arm/mach-orion5x/include/mach/io.h b/trunk/arch/arm/mach-orion5x/include/mach/io.h index c47b033bd999..f24b2513f7f3 100644 --- a/trunk/arch/arm/mach-orion5x/include/mach/io.h +++ b/trunk/arch/arm/mach-orion5x/include/mach/io.h @@ -38,9 +38,14 @@ __arch_iounmap(void __iomem *addr) __iounmap(addr); } +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} + #define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m) #define __arch_iounmap(a) __arch_iounmap(a) -#define __io(a) __typesafe_io(a) +#define __io(a) __io(a) #define __mem_pci(a) (a) diff --git a/trunk/arch/arm/mach-orion5x/include/mach/memory.h b/trunk/arch/arm/mach-orion5x/include/mach/memory.h index 52a2955d0f87..54dd76b013f2 100644 --- a/trunk/arch/arm/mach-orion5x/include/mach/memory.h +++ b/trunk/arch/arm/mach-orion5x/include/mach/memory.h @@ -9,4 +9,8 @@ #define PHYS_OFFSET UL(0x00000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + #endif diff --git a/trunk/arch/arm/mach-pnx4008/dma.c b/trunk/arch/arm/mach-pnx4008/dma.c index 425f7188505e..ac2f70eddb9e 100644 --- a/trunk/arch/arm/mach-pnx4008/dma.c +++ b/trunk/arch/arm/mach-pnx4008/dma.c @@ -25,8 +25,9 @@ #include #include -#include +#include #include +#include #include static struct dma_channel { diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/dma.h b/trunk/arch/arm/mach-pnx4008/include/mach/dma.h index f094bf8bfb18..5442d04fc575 100644 --- a/trunk/arch/arm/mach-pnx4008/include/mach/dma.h +++ b/trunk/arch/arm/mach-pnx4008/include/mach/dma.h @@ -16,6 +16,8 @@ #include "platform.h" +#define MAX_DMA_ADDRESS 0xffffffff + #define MAX_DMA_CHANNELS 8 #define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE) diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/io.h b/trunk/arch/arm/mach-pnx4008/include/mach/io.h index cbf0904540ea..c6206f25839d 100644 --- a/trunk/arch/arm/mach-pnx4008/include/mach/io.h +++ b/trunk/arch/arm/mach-pnx4008/include/mach/io.h @@ -15,7 +15,7 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/memory.h b/trunk/arch/arm/mach-pnx4008/include/mach/memory.h index 0e8770081058..5789a2d16f5a 100644 --- a/trunk/arch/arm/mach-pnx4008/include/mach/memory.h +++ b/trunk/arch/arm/mach-pnx4008/include/mach/memory.h @@ -16,6 +16,9 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET UL(0x80000000) +#define PHYS_OFFSET (0x80000000) + +#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET) #endif diff --git a/trunk/arch/arm/mach-pxa/Kconfig b/trunk/arch/arm/mach-pxa/Kconfig index 740f0a382bac..a062235e83a8 100644 --- a/trunk/arch/arm/mach-pxa/Kconfig +++ b/trunk/arch/arm/mach-pxa/Kconfig @@ -386,19 +386,16 @@ endmenu config PXA25x bool - select CPU_XSCALE help Select code specific to PXA21x/25x/26x variants config PXA27x bool - select CPU_XSCALE help Select code specific to PXA27x variants config PXA3xx bool - select CPU_XSC3 help Select code specific to PXA3xx variants diff --git a/trunk/arch/arm/mach-pxa/dma.c b/trunk/arch/arm/mach-pxa/dma.c index b1514fb20d3a..c0be17e0ab82 100644 --- a/trunk/arch/arm/mach-pxa/dma.c +++ b/trunk/arch/arm/mach-pxa/dma.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include diff --git a/trunk/arch/arm/mach-pxa/ezx.c b/trunk/arch/arm/mach-pxa/ezx.c index 83c56d3abacb..cc3d850cc0b6 100644 --- a/trunk/arch/arm/mach-pxa/ezx.c +++ b/trunk/arch/arm/mach-pxa/ezx.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-pxa/include/mach/io.h b/trunk/arch/arm/mach-pxa/include/mach/io.h index 262691fb97d8..600fd4f76603 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/io.h +++ b/trunk/arch/arm/mach-pxa/include/mach/io.h @@ -6,13 +6,15 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H +#include + #define IO_SPACE_LIMIT 0xffffffff /* * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(a)) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-pxa/include/mach/memory.h b/trunk/arch/arm/mach-pxa/include/mach/memory.h index f626730ee42e..59aef89808d6 100644 --- a/trunk/arch/arm/mach-pxa/include/mach/memory.h +++ b/trunk/arch/arm/mach-pxa/include/mach/memory.h @@ -17,6 +17,16 @@ */ #define PHYS_OFFSET UL(0xa0000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * The nodes are matched with the physical SDRAM banks as follows: * @@ -37,7 +47,6 @@ void cmx2xx_pci_adjust_zones(int node, unsigned long *size, cmx2xx_pci_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) #endif #endif diff --git a/trunk/arch/arm/mach-pxa/mioa701.c b/trunk/arch/arm/mach-pxa/mioa701.c index 782903fe9c6c..0842c531ee4d 100644 --- a/trunk/arch/arm/mach-pxa/mioa701.c +++ b/trunk/arch/arm/mach-pxa/mioa701.c @@ -565,7 +565,7 @@ static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state) u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); /* Devices prepare suspend */ - is_bt_on = !!gpio_get_value(GPIO83_BT_ON); + is_bt_on = gpio_get_value(GPIO83_BT_ON); pxa2xx_mfp_set_lpm(GPIO83_BT_ON, is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); diff --git a/trunk/arch/arm/mach-pxa/mioa701_bootresume.S b/trunk/arch/arm/mach-pxa/mioa701_bootresume.S index 324d25a48c85..a647693d9856 100644 --- a/trunk/arch/arm/mach-pxa/mioa701_bootresume.S +++ b/trunk/arch/arm/mach-pxa/mioa701_bootresume.S @@ -24,7 +24,6 @@ ENTRY(mioa701_jumpaddr) 1: mov r0, #0xa0000000 @ Don't suppose memory access works orr r0, r0, #0x00200000 @ even if it's supposed to - orr r0, r0, #0x0000b000 mov r1, #0 str r1, [r0] @ Early disable resume for next boot ldr r0, mioa701_jumpaddr @ (Murphy's Law) diff --git a/trunk/arch/arm/mach-pxa/smemc.c b/trunk/arch/arm/mach-pxa/smemc.c index d6f6904132a6..ad346addc028 100644 --- a/trunk/arch/arm/mach-pxa/smemc.c +++ b/trunk/arch/arm/mach-pxa/smemc.c @@ -8,8 +8,6 @@ #include #include -#include - #define SMEMC_PHYS_BASE (0x4A000000) #define SMEMC_PHYS_SIZE (0x90) diff --git a/trunk/arch/arm/mach-pxa/time.c b/trunk/arch/arm/mach-pxa/time.c index ef4ddf9d5040..f8a9a62959e5 100644 --- a/trunk/arch/arm/mach-pxa/time.c +++ b/trunk/arch/arm/mach-pxa/time.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-realview/Kconfig b/trunk/arch/arm/mach-realview/Kconfig index 603d1db9baf0..5ccde7cf39e8 100644 --- a/trunk/arch/arm/mach-realview/Kconfig +++ b/trunk/arch/arm/mach-realview/Kconfig @@ -10,7 +10,6 @@ config MACH_REALVIEW_EB config REALVIEW_EB_ARM11MP bool "Support ARM11MPCore tile" depends on MACH_REALVIEW_EB - select CPU_V6 help Enable support for the ARM11MPCore tile on the Realview platform. @@ -34,7 +33,6 @@ config MACH_REALVIEW_PB11MP config MACH_REALVIEW_PB1176 bool "Support RealView/PB1176 platform" - select CPU_V6 select ARM_GIC help Include support for the ARM(R) RealView ARM1176 Platform Baseboard. diff --git a/trunk/arch/arm/mach-realview/include/mach/dma.h b/trunk/arch/arm/mach-realview/include/mach/dma.h new file mode 100644 index 000000000000..f1a5a1a10952 --- /dev/null +++ b/trunk/arch/arm/mach-realview/include/mach/dma.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-realview/include/mach/dma.h + * + * Copyright (C) 2003 ARM Limited. + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-realview/include/mach/io.h b/trunk/arch/arm/mach-realview/include/mach/io.h index f05bcdf605d8..aa069424d310 100644 --- a/trunk/arch/arm/mach-realview/include/mach/io.h +++ b/trunk/arch/arm/mach-realview/include/mach/io.h @@ -22,7 +22,12 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} + +#define __io(a) __io(a) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-realview/include/mach/memory.h b/trunk/arch/arm/mach-realview/include/mach/memory.h index 65a0742094f7..0e673483a141 100644 --- a/trunk/arch/arm/mach-realview/include/mach/memory.h +++ b/trunk/arch/arm/mach-realview/include/mach/memory.h @@ -25,4 +25,14 @@ */ #define PHYS_OFFSET UL(0x00000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + #endif diff --git a/trunk/arch/arm/mach-rpc/include/mach/isa-dma.h b/trunk/arch/arm/mach-rpc/include/mach/dma.h similarity index 71% rename from trunk/arch/arm/mach-rpc/include/mach/isa-dma.h rename to trunk/arch/arm/mach-rpc/include/mach/dma.h index bad720548587..360b56f8f29f 100644 --- a/trunk/arch/arm/mach-rpc/include/mach/isa-dma.h +++ b/trunk/arch/arm/mach-rpc/include/mach/dma.h @@ -1,5 +1,5 @@ /* - * arch/arm/mach-rpc/include/mach/isa-dma.h + * arch/arm/mach-rpc/include/mach/dma.h * * Copyright (C) 1997 Russell King * @@ -10,6 +10,12 @@ #ifndef __ASM_ARCH_DMA_H #define __ASM_ARCH_DMA_H +/* + * This is the maximum DMA address that can be DMAd to. + * There should not be more than (0xd0000000 - 0xc0000000) + * bytes of RAM. + */ +#define MAX_DMA_ADDRESS 0xd0000000 #define MAX_DMA_CHANNELS 8 #define DMA_0 0 diff --git a/trunk/arch/arm/mach-rpc/include/mach/io.h b/trunk/arch/arm/mach-rpc/include/mach/io.h index 20da7f486e51..9f0553b7ec28 100644 --- a/trunk/arch/arm/mach-rpc/include/mach/io.h +++ b/trunk/arch/arm/mach-rpc/include/mach/io.h @@ -17,6 +17,49 @@ #define IO_SPACE_LIMIT 0xffffffff +/* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int __v, __r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (__v) \ + : "r" (__r), "Ir" (o)); \ + __v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int __v, __r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (__v) \ + : "r" (__r), "Ir" (o)); \ + __v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int __r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (__r), "Ir" (o));\ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int __r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (__r), "Ir" (o));\ + }) + /* * We use two different types of addressing - PC style addresses, and ARM * addresses. PC style accesses the PC hardware with the normal PC IO @@ -189,13 +232,15 @@ DECLARE_IO(int,l,"") result; \ }) +#define __ioaddrc(port) __ioaddr(port) + #define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) #define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) #define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) #define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) - +#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) /* the following macro is deprecated */ #define ioaddr(port) ((unsigned long)__ioaddr((port))) diff --git a/trunk/arch/arm/mach-rpc/include/mach/irqs.h b/trunk/arch/arm/mach-rpc/include/mach/irqs.h index 3d2037496e38..4ce6ca97f669 100644 --- a/trunk/arch/arm/mach-rpc/include/mach/irqs.h +++ b/trunk/arch/arm/mach-rpc/include/mach/irqs.h @@ -44,4 +44,3 @@ #define IRQ_TIMER IRQ_TIMER0 -#define NR_IRQS 128 diff --git a/trunk/arch/arm/mach-rpc/include/mach/memory.h b/trunk/arch/arm/mach-rpc/include/mach/memory.h index 78191bf25192..9bf7e43e2863 100644 --- a/trunk/arch/arm/mach-rpc/include/mach/memory.h +++ b/trunk/arch/arm/mach-rpc/include/mach/memory.h @@ -23,6 +23,13 @@ */ #define PHYS_OFFSET UL(0x10000000) +/* + * These are exactly the same on the RiscPC as the + * physical memory view. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * Cache flushing area - ROM */ diff --git a/trunk/arch/arm/mach-s3c2400/include/mach/memory.h b/trunk/arch/arm/mach-s3c2400/include/mach/memory.h index cf5901ffd385..8f4878e4f591 100644 --- a/trunk/arch/arm/mach-s3c2400/include/mach/memory.h +++ b/trunk/arch/arm/mach-s3c2400/include/mach/memory.h @@ -17,4 +17,7 @@ #define PHYS_OFFSET UL(0x0C000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-s3c2410/Kconfig b/trunk/arch/arm/mach-s3c2410/Kconfig index 7315569fbfd7..99fdc736698c 100644 --- a/trunk/arch/arm/mach-s3c2410/Kconfig +++ b/trunk/arch/arm/mach-s3c2410/Kconfig @@ -7,7 +7,6 @@ config CPU_S3C2410 bool depends on ARCH_S3C2410 - select CPU_ARM920T select S3C2410_CLOCK select S3C2410_GPIO select CPU_LLSERIAL_S3C2410 diff --git a/trunk/arch/arm/mach-s3c2410/dma.c b/trunk/arch/arm/mach-s3c2410/dma.c index 552b4c778fdc..7d914a470b6c 100644 --- a/trunk/arch/arm/mach-s3c2410/dma.c +++ b/trunk/arch/arm/mach-s3c2410/dma.c @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -24,12 +25,12 @@ #include #include -#include +#include #include #include #include #include -#include +#include static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { [DMACH_XD0] = { diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/dma.h b/trunk/arch/arm/mach-s3c2410/include/mach/dma.h index 13358ce2128c..891b53cd69b8 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/dma.h @@ -16,6 +16,11 @@ #include #include +/* + * This is the maximum DMA address(physical address) that can be DMAd to. + * + */ +#define MAX_DMA_ADDRESS 0x40000000 #define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ /* We use `virtual` dma channels to hide the fact we have only a limited @@ -249,7 +254,7 @@ typedef unsigned long dma_device_t; * request a dma channel exclusivley */ -extern int s3c2410_dma_request(unsigned int channel, +extern int s3c2410_dma_request(dmach_t channel, struct s3c2410_dma_client *, void *dev); @@ -258,14 +263,14 @@ extern int s3c2410_dma_request(unsigned int channel, * change the state of the dma channel */ -extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op); +extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op); /* s3c2410_dma_setflags * * set the channel's flags to a given state */ -extern int s3c2410_dma_setflags(unsigned int channel, +extern int s3c2410_dma_setflags(dmach_t channel, unsigned int flags); /* s3c2410_dma_free @@ -273,7 +278,7 @@ extern int s3c2410_dma_setflags(unsigned int channel, * free the dma channel (will also abort any outstanding operations) */ -extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *); +extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *); /* s3c2410_dma_enqueue * @@ -282,7 +287,7 @@ extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *); * drained before the buffer is given to the DMA system. */ -extern int s3c2410_dma_enqueue(unsigned int channel, void *id, +extern int s3c2410_dma_enqueue(dmach_t channel, void *id, dma_addr_t data, int size); /* s3c2410_dma_config @@ -290,7 +295,7 @@ extern int s3c2410_dma_enqueue(unsigned int channel, void *id, * configure the dma channel */ -extern int s3c2410_dma_config(unsigned int channel, int xferunit, int dcon); +extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); /* s3c2410_dma_devconfig * @@ -305,11 +310,11 @@ extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, * get the position that the dma transfer is currently at */ -extern int s3c2410_dma_getposition(unsigned int channel, +extern int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dest); -extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn); -extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn); +extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn); +extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn); /* DMA Register definitions */ diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/memory.h b/trunk/arch/arm/mach-s3c2410/include/mach/memory.h index 6f1e5871ae4b..93782628a786 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/memory.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/memory.h @@ -13,4 +13,7 @@ #define PHYS_OFFSET UL(0x30000000) +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + #endif diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/system-reset.h b/trunk/arch/arm/mach-s3c2410/include/mach/system-reset.h index 7613d0a384ba..43535a0e7186 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/system-reset.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/system-reset.h @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2410/mach-bast.c b/trunk/arch/arm/mach-s3c2410/mach-bast.c index c04c24444e0d..8db9c700e3c2 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-bast.c +++ b/trunk/arch/arm/mach-s3c2410/mach-bast.c @@ -44,8 +44,8 @@ #include #include -#include -#include +#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2410/mach-h1940.c b/trunk/arch/arm/mach-s3c2410/mach-h1940.c index 32d550fcff4d..98716d0108e9 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-h1940.c +++ b/trunk/arch/arm/mach-s3c2410/mach-h1940.c @@ -38,7 +38,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2410/mach-n30.c b/trunk/arch/arm/mach-s3c2410/mach-n30.c index 7a7c45d28fe7..82505517846c 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-n30.c +++ b/trunk/arch/arm/mach-s3c2410/mach-n30.c @@ -40,14 +40,14 @@ #include #include -#include +#include #include #include #include #include #include -#include +#include static struct map_desc n30_iodesc[] __initdata = { /* nothing here yet */ diff --git a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c index ef868472f6a4..661807e14e8a 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c @@ -50,8 +50,8 @@ #include #include #include -#include -#include +#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2412/Kconfig b/trunk/arch/arm/mach-s3c2412/Kconfig index ca99564ae4b5..c59a9d2ee9a6 100644 --- a/trunk/arch/arm/mach-s3c2412/Kconfig +++ b/trunk/arch/arm/mach-s3c2412/Kconfig @@ -7,7 +7,6 @@ config CPU_S3C2412 bool depends on ARCH_S3C2410 - select CPU_ARM926T select CPU_LLSERIAL_S3C2440 select S3C2412_PM if PM select S3C2412_DMA if S3C2410_DMA diff --git a/trunk/arch/arm/mach-s3c2412/dma.c b/trunk/arch/arm/mach-s3c2412/dma.c index 919856c9433f..ba0591e71f32 100644 --- a/trunk/arch/arm/mach-s3c2412/dma.c +++ b/trunk/arch/arm/mach-s3c2412/dma.c @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -25,13 +26,13 @@ #include #include -#include +#include #include #include #include #include #include -#include +#include #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } diff --git a/trunk/arch/arm/mach-s3c2412/mach-jive.c b/trunk/arch/arm/mach-s3c2412/mach-jive.c index 25ff1ec9f8ad..b08f18c8c47a 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-jive.c +++ b/trunk/arch/arm/mach-s3c2412/mach-jive.c @@ -31,8 +31,8 @@ #include #include -#include -#include +#include +#include #include #include @@ -52,7 +52,7 @@ #include #include #include -#include +#include static struct map_desc jive_iodesc[] __initdata = { }; diff --git a/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c b/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c index 8fd17b8d5679..c719b5a740a9 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/trunk/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -37,7 +37,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2412/mach-vstms.c b/trunk/arch/arm/mach-s3c2412/mach-vstms.c index da32a6cb17ae..4cfa19ad9be0 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-vstms.c +++ b/trunk/arch/arm/mach-s3c2412/mach-vstms.c @@ -39,7 +39,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2412/s3c2412.c b/trunk/arch/arm/mach-s3c2412/s3c2412.c index a086818e117e..313759c3da69 100644 --- a/trunk/arch/arm/mach-s3c2412/s3c2412.c +++ b/trunk/arch/arm/mach-s3c2412/s3c2412.c @@ -39,7 +39,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2440/Kconfig b/trunk/arch/arm/mach-s3c2440/Kconfig index 0429d255b0d8..25de042ab996 100644 --- a/trunk/arch/arm/mach-s3c2440/Kconfig +++ b/trunk/arch/arm/mach-s3c2440/Kconfig @@ -7,7 +7,6 @@ config CPU_S3C2440 bool depends on ARCH_S3C2410 - select CPU_ARM920T select S3C2410_CLOCK select S3C2410_PM if PM select S3C2410_GPIO diff --git a/trunk/arch/arm/mach-s3c2440/dma.c b/trunk/arch/arm/mach-s3c2440/dma.c index 5b5ee0b8f4e0..32303f6a8321 100644 --- a/trunk/arch/arm/mach-s3c2440/dma.c +++ b/trunk/arch/arm/mach-s3c2440/dma.c @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -24,12 +25,12 @@ #include #include -#include +#include #include #include #include #include -#include +#include static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { [DMACH_XD0] = { diff --git a/trunk/arch/arm/mach-s3c2440/mach-anubis.c b/trunk/arch/arm/mach-s3c2440/mach-anubis.c index 334379bdfc6e..e2beca470484 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-anubis.c +++ b/trunk/arch/arm/mach-s3c2440/mach-anubis.c @@ -39,7 +39,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c b/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c index 07b42a0207d1..66876c6f2f1c 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -35,7 +35,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2440/mach-osiris.c b/trunk/arch/arm/mach-s3c2440/mach-osiris.c index 884a3c7ae75f..2361d606abc5 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-osiris.c +++ b/trunk/arch/arm/mach-s3c2440/mach-osiris.c @@ -37,7 +37,7 @@ #include #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c index fbd081de592f..4d14c7cff892 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c @@ -42,7 +42,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c2442/Kconfig b/trunk/arch/arm/mach-s3c2442/Kconfig index b289d198020e..26d131a77074 100644 --- a/trunk/arch/arm/mach-s3c2442/Kconfig +++ b/trunk/arch/arm/mach-s3c2442/Kconfig @@ -7,7 +7,6 @@ config CPU_S3C2442 bool depends on ARCH_S3C2410 - select CPU_ARM920T select S3C2410_CLOCK select S3C2410_GPIO select S3C2410_PM if PM diff --git a/trunk/arch/arm/mach-s3c2443/dma.c b/trunk/arch/arm/mach-s3c2443/dma.c index 2a58a4d5aa5a..f73ccb25ff94 100644 --- a/trunk/arch/arm/mach-s3c2443/dma.c +++ b/trunk/arch/arm/mach-s3c2443/dma.c @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -25,12 +26,12 @@ #include #include -#include +#include #include #include #include #include -#include +#include #define MAP(x) { \ [0] = (x) | DMA_CH_VALID, \ diff --git a/trunk/arch/arm/mach-sa1100/collie_pm.c b/trunk/arch/arm/mach-sa1100/collie_pm.c index 947883a483df..b1161fc80602 100644 --- a/trunk/arch/arm/mach-sa1100/collie_pm.c +++ b/trunk/arch/arm/mach-sa1100/collie_pm.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/trunk/arch/arm/mach-sa1100/dma.c b/trunk/arch/arm/mach-sa1100/dma.c index 3f445ffd99f8..f990a3e85846 100644 --- a/trunk/arch/arm/mach-sa1100/dma.c +++ b/trunk/arch/arm/mach-sa1100/dma.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #undef DEBUG diff --git a/trunk/arch/arm/mach-sa1100/include/mach/io.h b/trunk/arch/arm/mach-sa1100/include/mach/io.h index d8b43f3dcd2d..0c070a6149bc 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/io.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/io.h @@ -16,7 +16,11 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-sa1100/include/mach/memory.h b/trunk/arch/arm/mach-sa1100/include/mach/memory.h index e9f8eed900f5..1c127b68581d 100644 --- a/trunk/arch/arm/mach-sa1100/include/mach/memory.h +++ b/trunk/arch/arm/mach-sa1100/include/mach/memory.h @@ -23,11 +23,22 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); sa1111_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_1M) #endif #endif +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + * + * On the SA1100, bus addresses are equivalent to physical addresses. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * Because of the wide memory address space between physical RAM banks on the * SA1100, it's much convenient to use Linux's SparseMEM support to implement diff --git a/trunk/arch/arm/mach-shark/core.c b/trunk/arch/arm/mach-shark/core.c index a23fd3d0163a..a9400d984451 100644 --- a/trunk/arch/arm/mach-shark/core.c +++ b/trunk/arch/arm/mach-shark/core.c @@ -16,8 +16,6 @@ #include #include -#include - #include #include #include diff --git a/trunk/arch/arm/mach-shark/include/mach/isa-dma.h b/trunk/arch/arm/mach-shark/include/mach/dma.h similarity index 79% rename from trunk/arch/arm/mach-shark/include/mach/isa-dma.h rename to trunk/arch/arm/mach-shark/include/mach/dma.h index 864298ff3927..c0a29bd2a74f 100644 --- a/trunk/arch/arm/mach-shark/include/mach/isa-dma.h +++ b/trunk/arch/arm/mach-shark/include/mach/dma.h @@ -1,5 +1,5 @@ /* - * arch/arm/mach-shark/include/mach/isa-dma.h + * arch/arm/mach-shark/include/mach/dma.h * * by Alexander Schulz */ @@ -10,6 +10,7 @@ * The rest is not DMAable. See dev / .properties * in OpenFirmware. */ +#define MAX_DMA_ADDRESS 0xC0400000 #define MAX_DMA_CHANNELS 8 #define DMA_ISA_CASCADE 4 diff --git a/trunk/arch/arm/mach-shark/include/mach/hardware.h b/trunk/arch/arm/mach-shark/include/mach/hardware.h index 01bf76099ce5..cb0ee2943c1a 100644 --- a/trunk/arch/arm/mach-shark/include/mach/hardware.h +++ b/trunk/arch/arm/mach-shark/include/mach/hardware.h @@ -28,6 +28,8 @@ #define ROMCARD_SIZE 0x08000000 #define ROMCARD_START 0x10000000 +#define PCIO_BASE 0xe0000000 + /* defines for the Framebuffer */ #define FB_START 0x06000000 diff --git a/trunk/arch/arm/mach-shark/include/mach/io.h b/trunk/arch/arm/mach-shark/include/mach/io.h index c5cee829fc87..92475922c068 100644 --- a/trunk/arch/arm/mach-shark/include/mach/io.h +++ b/trunk/arch/arm/mach-shark/include/mach/io.h @@ -11,10 +11,46 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define PCIO_BASE 0xe0000000 -#define IO_SPACE_LIMIT 0xffffffff +#include -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#define __mem_pci(addr) (addr) +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) + + +static inline unsigned int __ioaddr (unsigned int port) \ +{ \ + if (__PORT_PCIO(port)) \ + return (unsigned int)(PCIO_BASE + (port)); \ + else \ + return (unsigned int)(IO_BASE + (port)); \ +} + +#define __mem_pci(addr) (addr) + +/* + * Translated address IO functions + * + * IO address has already been translated to a virtual address + */ +#define outb_t(v,p) \ + (*(volatile unsigned char *)(p) = (v)) + +#define inb_t(p) \ + (*(volatile unsigned char *)(p)) + +#define outl_t(v,p) \ + (*(volatile unsigned long *)(p) = (v)) + +#define inl_t(p) \ + (*(volatile unsigned long *)(p)) #endif diff --git a/trunk/arch/arm/mach-shark/include/mach/memory.h b/trunk/arch/arm/mach-shark/include/mach/memory.h index c5ab038925d6..b7874ad9f9f6 100644 --- a/trunk/arch/arm/mach-shark/include/mach/memory.h +++ b/trunk/arch/arm/mach-shark/include/mach/memory.h @@ -33,10 +33,12 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig __arch_adjust_zones(node, size, holes) #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_4M - 1) -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_4M) #endif +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + /* * Cache flushing area */ diff --git a/trunk/arch/arm/mach-versatile/Kconfig b/trunk/arch/arm/mach-versatile/Kconfig index c781f30c8368..95096afd5271 100644 --- a/trunk/arch/arm/mach-versatile/Kconfig +++ b/trunk/arch/arm/mach-versatile/Kconfig @@ -3,14 +3,12 @@ menu "Versatile platform type" config ARCH_VERSATILE_PB bool "Support Versatile/PB platform" - select CPU_ARM926T default y help Include support for the ARM(R) Versatile/PB platform. config MACH_VERSATILE_AB bool "Support Versatile/AB platform" - select CPU_ARM926T help Include support for the ARM(R) Versatile/AP platform. diff --git a/trunk/arch/arm/mach-versatile/include/mach/dma.h b/trunk/arch/arm/mach-versatile/include/mach/dma.h new file mode 100644 index 000000000000..0aabf12c8834 --- /dev/null +++ b/trunk/arch/arm/mach-versatile/include/mach/dma.h @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-versatile/include/mach/dma.h + * + * Copyright (C) 2003 ARM Limited. + * Copyright (C) 1997,1998 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ diff --git a/trunk/arch/arm/mach-versatile/include/mach/io.h b/trunk/arch/arm/mach-versatile/include/mach/io.h index f067c14c7182..c0b9dd1d0257 100644 --- a/trunk/arch/arm/mach-versatile/include/mach/io.h +++ b/trunk/arch/arm/mach-versatile/include/mach/io.h @@ -22,7 +22,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)addr; +} +#define __io(a) __io(a) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/mach-versatile/include/mach/irqs.h b/trunk/arch/arm/mach-versatile/include/mach/irqs.h index 9bfdb30e1f3f..216a1312e62e 100644 --- a/trunk/arch/arm/mach-versatile/include/mach/irqs.h +++ b/trunk/arch/arm/mach-versatile/include/mach/irqs.h @@ -60,6 +60,39 @@ #define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31) #define IRQ_VIC_END (IRQ_VIC_START + 31) +#define IRQMASK_WDOGINT INTMASK_WDOGINT +#define IRQMASK_SOFTINT INTMASK_SOFTINT +#define IRQMASK_COMMRx INTMASK_COMMRx +#define IRQMASK_COMMTx INTMASK_COMMTx +#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 +#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 +#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0 +#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1 +#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2 +#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3 +#define IRQMASK_RTCINT INTMASK_RTCINT +#define IRQMASK_SSPINT INTMASK_SSPINT +#define IRQMASK_UARTINT0 INTMASK_UARTINT0 +#define IRQMASK_UARTINT1 INTMASK_UARTINT1 +#define IRQMASK_UARTINT2 INTMASK_UARTINT2 +#define IRQMASK_SCIINT INTMASK_SCIINT +#define IRQMASK_CLCDINT INTMASK_CLCDINT +#define IRQMASK_DMAINT INTMASK_DMAINT +#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT +#define IRQMASK_MBXINT INTMASK_MBXINT +#define IRQMASK_GNDINT INTMASK_GNDINT +#define IRQMASK_VICSOURCE21 INTMASK_VICSOURCE21 +#define IRQMASK_VICSOURCE22 INTMASK_VICSOURCE22 +#define IRQMASK_VICSOURCE23 INTMASK_VICSOURCE23 +#define IRQMASK_VICSOURCE24 INTMASK_VICSOURCE24 +#define IRQMASK_VICSOURCE25 INTMASK_VICSOURCE25 +#define IRQMASK_VICSOURCE26 INTMASK_VICSOURCE26 +#define IRQMASK_VICSOURCE27 INTMASK_VICSOURCE27 +#define IRQMASK_VICSOURCE28 INTMASK_VICSOURCE28 +#define IRQMASK_VICSOURCE29 INTMASK_VICSOURCE29 +#define IRQMASK_VICSOURCE30 INTMASK_VICSOURCE30 +#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31 + /* * FIQ interrupts definitions are the same as the INT definitions. */ @@ -97,6 +130,39 @@ #define FIQ_VICSOURCE31 INT_VICSOURCE31 +#define FIQMASK_WDOGINT INTMASK_WDOGINT +#define FIQMASK_SOFTINT INTMASK_SOFTINT +#define FIQMASK_COMMRx INTMASK_COMMRx +#define FIQMASK_COMMTx INTMASK_COMMTx +#define FIQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 +#define FIQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 +#define FIQMASK_GPIOINT0 INTMASK_GPIOINT0 +#define FIQMASK_GPIOINT1 INTMASK_GPIOINT1 +#define FIQMASK_GPIOINT2 INTMASK_GPIOINT2 +#define FIQMASK_GPIOINT3 INTMASK_GPIOINT3 +#define FIQMASK_RTCINT INTMASK_RTCINT +#define FIQMASK_SSPINT INTMASK_SSPINT +#define FIQMASK_UARTINT0 INTMASK_UARTINT0 +#define FIQMASK_UARTINT1 INTMASK_UARTINT1 +#define FIQMASK_UARTINT2 INTMASK_UARTINT2 +#define FIQMASK_SCIINT INTMASK_SCIINT +#define FIQMASK_CLCDINT INTMASK_CLCDINT +#define FIQMASK_DMAINT INTMASK_DMAINT +#define FIQMASK_PWRFAILINT INTMASK_PWRFAILINT +#define FIQMASK_MBXINT INTMASK_MBXINT +#define FIQMASK_GNDINT INTMASK_GNDINT +#define FIQMASK_VICSOURCE21 INTMASK_VICSOURCE21 +#define FIQMASK_VICSOURCE22 INTMASK_VICSOURCE22 +#define FIQMASK_VICSOURCE23 INTMASK_VICSOURCE23 +#define FIQMASK_VICSOURCE24 INTMASK_VICSOURCE24 +#define FIQMASK_VICSOURCE25 INTMASK_VICSOURCE25 +#define FIQMASK_VICSOURCE26 INTMASK_VICSOURCE26 +#define FIQMASK_VICSOURCE27 INTMASK_VICSOURCE27 +#define FIQMASK_VICSOURCE28 INTMASK_VICSOURCE28 +#define FIQMASK_VICSOURCE29 INTMASK_VICSOURCE29 +#define FIQMASK_VICSOURCE30 INTMASK_VICSOURCE30 +#define FIQMASK_VICSOURCE31 INTMASK_VICSOURCE31 + /* * Secondary interrupt controller */ @@ -122,4 +188,24 @@ #define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) #define IRQ_SIC_END 63 +#define SIC_IRQMASK_MMCI0B SIC_INTMASK_MMCI0B +#define SIC_IRQMASK_MMCI1B SIC_INTMASK_MMCI1B +#define SIC_IRQMASK_KMI0 SIC_INTMASK_KMI0 +#define SIC_IRQMASK_KMI1 SIC_INTMASK_KMI1 +#define SIC_IRQMASK_SCI3 SIC_INTMASK_SCI3 +#define SIC_IRQMASK_UART3 SIC_INTMASK_UART3 +#define SIC_IRQMASK_CLCD SIC_INTMASK_CLCD +#define SIC_IRQMASK_TOUCH SIC_INTMASK_TOUCH +#define SIC_IRQMASK_KEYPAD SIC_INTMASK_KEYPAD +#define SIC_IRQMASK_DoC SIC_INTMASK_DoC +#define SIC_IRQMASK_MMCI0A SIC_INTMASK_MMCI0A +#define SIC_IRQMASK_MMCI1A SIC_INTMASK_MMCI1A +#define SIC_IRQMASK_AACI SIC_INTMASK_AACI +#define SIC_IRQMASK_ETH SIC_INTMASK_ETH +#define SIC_IRQMASK_USB SIC_INTMASK_USB +#define SIC_IRQMASK_PCI0 SIC_INTMASK_PCI0 +#define SIC_IRQMASK_PCI1 SIC_INTMASK_PCI1 +#define SIC_IRQMASK_PCI2 SIC_INTMASK_PCI2 +#define SIC_IRQMASK_PCI3 SIC_INTMASK_PCI3 + #define NR_IRQS 64 diff --git a/trunk/arch/arm/mach-versatile/include/mach/memory.h b/trunk/arch/arm/mach-versatile/include/mach/memory.h index 79aeab86b903..b6315c0602ac 100644 --- a/trunk/arch/arm/mach-versatile/include/mach/memory.h +++ b/trunk/arch/arm/mach-versatile/include/mach/memory.h @@ -25,4 +25,14 @@ */ #define PHYS_OFFSET UL(0x00000000) +/* + * Virtual view <-> DMA view memory address translations + * virt_to_bus: Used to translate the virtual address to an + * address suitable to be passed to set_dma_addr + * bus_to_virt: Used to convert an address for DMA operations + * to an address that the kernel can use. + */ +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) + #endif diff --git a/trunk/arch/arm/mach-versatile/include/mach/platform.h b/trunk/arch/arm/mach-versatile/include/mach/platform.h index 83207395191a..f91ba930ca8a 100644 --- a/trunk/arch/arm/mach-versatile/include/mach/platform.h +++ b/trunk/arch/arm/mach-versatile/include/mach/platform.h @@ -347,6 +347,44 @@ #define INT_VICSOURCE30 30 /* PCI 3 */ #define INT_VICSOURCE31 31 /* SIC source */ +/* + * Interrupt bit positions + * + */ +#define INTMASK_WDOGINT (1 << INT_WDOGINT) +#define INTMASK_SOFTINT (1 << INT_SOFTINT) +#define INTMASK_COMMRx (1 << INT_COMMRx) +#define INTMASK_COMMTx (1 << INT_COMMTx) +#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1) +#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3) +#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0) +#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1) +#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2) +#define INTMASK_GPIOINT3 (1 << INT_GPIOINT3) +#define INTMASK_RTCINT (1 << INT_RTCINT) +#define INTMASK_SSPINT (1 << INT_SSPINT) +#define INTMASK_UARTINT0 (1 << INT_UARTINT0) +#define INTMASK_UARTINT1 (1 << INT_UARTINT1) +#define INTMASK_UARTINT2 (1 << INT_UARTINT2) +#define INTMASK_SCIINT (1 << INT_SCIINT) +#define INTMASK_CLCDINT (1 << INT_CLCDINT) +#define INTMASK_DMAINT (1 << INT_DMAINT) +#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT) +#define INTMASK_MBXINT (1 << INT_MBXINT) +#define INTMASK_GNDINT (1 << INT_GNDINT) +#define INTMASK_VICSOURCE21 (1 << INT_VICSOURCE21) +#define INTMASK_VICSOURCE22 (1 << INT_VICSOURCE22) +#define INTMASK_VICSOURCE23 (1 << INT_VICSOURCE23) +#define INTMASK_VICSOURCE24 (1 << INT_VICSOURCE24) +#define INTMASK_VICSOURCE25 (1 << INT_VICSOURCE25) +#define INTMASK_VICSOURCE26 (1 << INT_VICSOURCE26) +#define INTMASK_VICSOURCE27 (1 << INT_VICSOURCE27) +#define INTMASK_VICSOURCE28 (1 << INT_VICSOURCE28) +#define INTMASK_VICSOURCE29 (1 << INT_VICSOURCE29) +#define INTMASK_VICSOURCE30 (1 << INT_VICSOURCE30) +#define INTMASK_VICSOURCE31 (1 << INT_VICSOURCE31) + + #define VERSATILE_SC_VALID_INT 0x003FFFFF #define MAXIRQNUM 31 @@ -379,6 +417,26 @@ #define SIC_INT_PCI3 30 +#define SIC_INTMASK_MMCI0B (1 << SIC_INT_MMCI0B) +#define SIC_INTMASK_MMCI1B (1 << SIC_INT_MMCI1B) +#define SIC_INTMASK_KMI0 (1 << SIC_INT_KMI0) +#define SIC_INTMASK_KMI1 (1 << SIC_INT_KMI1) +#define SIC_INTMASK_SCI3 (1 << SIC_INT_SCI3) +#define SIC_INTMASK_UART3 (1 << SIC_INT_UART3) +#define SIC_INTMASK_CLCD (1 << SIC_INT_CLCD) +#define SIC_INTMASK_TOUCH (1 << SIC_INT_TOUCH) +#define SIC_INTMASK_KEYPAD (1 << SIC_INT_KEYPAD) +#define SIC_INTMASK_DoC (1 << SIC_INT_DoC) +#define SIC_INTMASK_MMCI0A (1 << SIC_INT_MMCI0A) +#define SIC_INTMASK_MMCI1A (1 << SIC_INT_MMCI1A) +#define SIC_INTMASK_AACI (1 << SIC_INT_AACI) +#define SIC_INTMASK_ETH (1 << SIC_INT_ETH) +#define SIC_INTMASK_USB (1 << SIC_INT_USB) +#define SIC_INTMASK_PCI0 (1 << SIC_INT_PCI0) +#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) +#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) +#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) + /* * Clean base - dummy * diff --git a/trunk/arch/arm/mm/Kconfig b/trunk/arch/arm/mm/Kconfig index cf44de512830..ab5f7a21350b 100644 --- a/trunk/arch/arm/mm/Kconfig +++ b/trunk/arch/arm/mm/Kconfig @@ -10,7 +10,8 @@ config CPU_32 # ARM610 config CPU_ARM610 - bool "Support ARM610 processor" if ARCH_RPC + bool "Support ARM610 processor" + depends on ARCH_RPC select CPU_32v3 select CPU_CACHE_V3 select CPU_CACHE_VIVT @@ -42,7 +43,8 @@ config CPU_ARM7TDMI # ARM710 config CPU_ARM710 - bool "Support ARM710 processor" if ARCH_RPC + bool "Support ARM710 processor" if !ARCH_CLPS7500 && ARCH_RPC + default y if ARCH_CLPS7500 select CPU_32v3 select CPU_CACHE_V3 select CPU_CACHE_VIVT @@ -61,7 +63,8 @@ config CPU_ARM710 # ARM720T config CPU_ARM720T - bool "Support ARM720T processor" if ARCH_INTEGRATOR + bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR + default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X select CPU_32v4T select CPU_ABRT_LV4T select CPU_PABRT_NOIFAR @@ -111,7 +114,9 @@ config CPU_ARM9TDMI # ARM920T config CPU_ARM920T - bool "Support ARM920T processor" if ARCH_INTEGRATOR + bool "Support ARM920T processor" + depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 + default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 select CPU_32v4T select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -133,6 +138,8 @@ config CPU_ARM920T # ARM922T config CPU_ARM922T bool "Support ARM922T processor" if ARCH_INTEGRATOR + depends on ARCH_LH7A40X || ARCH_INTEGRATOR || ARCH_KS8695 + default y if ARCH_LH7A40X || ARCH_KS8695 select CPU_32v4T select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -152,6 +159,8 @@ config CPU_ARM922T # ARM925T config CPU_ARM925T bool "Support ARM925T processor" if ARCH_OMAP1 + depends on ARCH_OMAP15XX + default y if ARCH_OMAP15XX select CPU_32v4T select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -170,7 +179,22 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T - bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB + bool "Support ARM926T processor" + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || \ + MACH_VERSATILE_AB || ARCH_OMAP730 || \ + ARCH_OMAP16XX || MACH_REALVIEW_EB || \ + ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \ + ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \ + ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \ + ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \ + ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2 + default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \ + ARCH_OMAP730 || ARCH_OMAP16XX || \ + ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \ + ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \ + ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \ + ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \ + ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2 select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_PABRT_NOIFAR @@ -223,7 +247,8 @@ config CPU_ARM946E # ARM1020 - needs validating config CPU_ARM1020 - bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR + bool "Support ARM1020T (rev 0) processor" + depends on ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -241,7 +266,8 @@ config CPU_ARM1020 # ARM1020E - needs validating config CPU_ARM1020E - bool "Support ARM1020E processor" if ARCH_INTEGRATOR + bool "Support ARM1020E processor" + depends on ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -254,7 +280,8 @@ config CPU_ARM1020E # ARM1022E config CPU_ARM1022 - bool "Support ARM1022E processor" if ARCH_INTEGRATOR + bool "Support ARM1022E processor" + depends on ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV4T select CPU_PABRT_NOIFAR @@ -272,7 +299,8 @@ config CPU_ARM1022 # ARM1026EJ-S config CPU_ARM1026 - bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR + bool "Support ARM1026EJ-S processor" + depends on ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 select CPU_PABRT_NOIFAR @@ -289,7 +317,8 @@ config CPU_ARM1026 # SA110 config CPU_SA110 - bool "Support StrongARM(R) SA-110 processor" if ARCH_RPC + bool "Support StrongARM(R) SA-110 processor" if !ARCH_EBSA110 && !FOOTBRIDGE && !ARCH_TBOX && !ARCH_SHARK && !ARCH_NEXUSPCI && ARCH_RPC + default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_TBOX || ARCH_SHARK || ARCH_NEXUSPCI select CPU_32v3 if ARCH_RPC select CPU_32v4 if !ARCH_RPC select CPU_ABRT_EV4 @@ -311,6 +340,8 @@ config CPU_SA110 # SA1100 config CPU_SA1100 bool + depends on ARCH_SA1100 + default y select CPU_32v4 select CPU_ABRT_EV4 select CPU_PABRT_NOIFAR @@ -322,6 +353,8 @@ config CPU_SA1100 # XScale config CPU_XSCALE bool + depends on ARCH_IOP32X || ARCH_IOP33X || PXA25x || PXA27x || ARCH_IXP4XX || ARCH_IXP2000 + default y select CPU_32v5 select CPU_ABRT_EV5T select CPU_PABRT_NOIFAR @@ -332,6 +365,8 @@ config CPU_XSCALE # XScale Core Version 3 config CPU_XSC3 bool + depends on ARCH_IXP23XX || ARCH_IOP13XX || PXA3xx + default y select CPU_32v5 select CPU_ABRT_EV5T select CPU_PABRT_NOIFAR @@ -343,6 +378,8 @@ config CPU_XSC3 # Feroceon config CPU_FEROCEON bool + depends on ARCH_ORION5X || ARCH_LOKI || ARCH_KIRKWOOD || ARCH_MV78XX0 + default y select CPU_32v5 select CPU_ABRT_EV5T select CPU_PABRT_NOIFAR @@ -362,7 +399,10 @@ config CPU_FEROCEON_OLD_ID # ARMv6 config CPU_V6 - bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB + bool "Support ARM V6 processor" + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 + default y if ARCH_MX3 + default y if ARCH_MSM select CPU_32v6 select CPU_ABRT_EV6 select CPU_PABRT_NOIFAR @@ -387,7 +427,8 @@ config CPU_32v6K # ARMv7 config CPU_V7 - bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB + bool "Support ARM V7 processor" + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3 select CPU_32v6K select CPU_32v7 select CPU_ABRT_EV7 diff --git a/trunk/arch/arm/mm/alignment.c b/trunk/arch/arm/mm/alignment.c index c5a57fbf095d..133e65d166b3 100644 --- a/trunk/arch/arm/mm/alignment.c +++ b/trunk/arch/arm/mm/alignment.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mm/cache-v3.S b/trunk/arch/arm/mm/cache-v3.S index 8a4abebc478a..3b3639eb7ca5 100644 --- a/trunk/arch/arm/mm/cache-v3.S +++ b/trunk/arch/arm/mm/cache-v3.S @@ -9,6 +9,7 @@ */ #include #include +#include #include #include "proc-macros.S" diff --git a/trunk/arch/arm/mm/cache-v4.S b/trunk/arch/arm/mm/cache-v4.S index 3668611cb400..5786adf10040 100644 --- a/trunk/arch/arm/mm/cache-v4.S +++ b/trunk/arch/arm/mm/cache-v4.S @@ -9,6 +9,7 @@ */ #include #include +#include #include #include "proc-macros.S" diff --git a/trunk/arch/arm/mm/cache-v4wt.S b/trunk/arch/arm/mm/cache-v4wt.S index c54fa2cc40e6..51a9b0b273b6 100644 --- a/trunk/arch/arm/mm/cache-v4wt.S +++ b/trunk/arch/arm/mm/cache-v4wt.S @@ -13,6 +13,7 @@ */ #include #include +#include #include #include "proc-macros.S" diff --git a/trunk/arch/arm/mm/cache-v7.S b/trunk/arch/arm/mm/cache-v7.S index be93ff02a98d..d19c2bec2b1f 100644 --- a/trunk/arch/arm/mm/cache-v7.S +++ b/trunk/arch/arm/mm/cache-v7.S @@ -26,7 +26,6 @@ * - mm - mm_struct describing address space */ ENTRY(v7_flush_dcache_all) - dmb @ ensure ordering with previous memory accesses mrc p15, 1, r0, c0, c0, 1 @ read clidr ands r3, r0, #0x7000000 @ extract loc from clidr mov r3, r3, lsr #23 @ left align loc bit field @@ -65,7 +64,6 @@ skip: finished: mov r10, #0 @ swith back to cache level 0 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr - dsb isb mov pc, lr ENDPROC(v7_flush_dcache_all) diff --git a/trunk/arch/arm/mm/copypage-feroceon.S b/trunk/arch/arm/mm/copypage-feroceon.S new file mode 100644 index 000000000000..7eb0d320d240 --- /dev/null +++ b/trunk/arch/arm/mm/copypage-feroceon.S @@ -0,0 +1,95 @@ +/* + * linux/arch/arm/lib/copypage-feroceon.S + * + * Copyright (C) 2008 Marvell Semiconductors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This handles copy_user_page and clear_user_page on Feroceon + * more optimally than the generic implementations. + */ +#include +#include +#include + + .text + .align 5 + +ENTRY(feroceon_copy_user_page) + stmfd sp!, {r4-r9, lr} + mov ip, #PAGE_SZ +1: mov lr, r1 + ldmia r1!, {r2 - r9} + pld [lr, #32] + pld [lr, #64] + pld [lr, #96] + pld [lr, #128] + pld [lr, #160] + pld [lr, #192] + pld [lr, #224] + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + ldmia r1!, {r2 - r9} + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + stmia r0, {r2 - r9} + subs ip, ip, #(32 * 8) + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + bne 1b + mcr p15, 0, ip, c7, c10, 4 @ drain WB + ldmfd sp!, {r4-r9, pc} + + .align 5 + +ENTRY(feroceon_clear_user_page) + stmfd sp!, {r4-r7, lr} + mov r1, #PAGE_SZ/32 + mov r2, #0 + mov r3, #0 + mov r4, #0 + mov r5, #0 + mov r6, #0 + mov r7, #0 + mov ip, #0 + mov lr, #0 +1: stmia r0, {r2-r7, ip, lr} + subs r1, r1, #1 + mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line + add r0, r0, #32 + bne 1b + mcr p15, 0, r1, c7, c10, 4 @ drain WB + ldmfd sp!, {r4-r7, pc} + + __INITDATA + + .type feroceon_user_fns, #object +ENTRY(feroceon_user_fns) + .long feroceon_clear_user_page + .long feroceon_copy_user_page + .size feroceon_user_fns, . - feroceon_user_fns diff --git a/trunk/arch/arm/mm/copypage-feroceon.c b/trunk/arch/arm/mm/copypage-feroceon.c deleted file mode 100644 index c3ba6a94da0c..000000000000 --- a/trunk/arch/arm/mm/copypage-feroceon.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * linux/arch/arm/mm/copypage-feroceon.S - * - * Copyright (C) 2008 Marvell Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This handles copy_user_highpage and clear_user_page on Feroceon - * more optimally than the generic implementations. - */ -#include -#include - -static void __attribute__((naked)) -feroceon_copy_user_page(void *kto, const void *kfrom) -{ - asm("\ - stmfd sp!, {r4-r9, lr} \n\ - mov ip, %0 \n\ -1: mov lr, r1 \n\ - ldmia r1!, {r2 - r9} \n\ - pld [lr, #32] \n\ - pld [lr, #64] \n\ - pld [lr, #96] \n\ - pld [lr, #128] \n\ - pld [lr, #160] \n\ - pld [lr, #192] \n\ - pld [lr, #224] \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - ldmia r1!, {r2 - r9} \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - stmia r0, {r2 - r9} \n\ - subs ip, ip, #(32 * 8) \n\ - mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D line\n\ - add r0, r0, #32 \n\ - bne 1b \n\ - mcr p15, 0, ip, c7, c10, 4 @ drain WB\n\ - ldmfd sp!, {r4-r9, pc}" - : - : "I" (PAGE_SIZE)); -} - -void feroceon_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) -{ - void *kto, *kfrom; - - kto = kmap_atomic(to, KM_USER0); - kfrom = kmap_atomic(from, KM_USER1); - feroceon_copy_user_page(kto, kfrom); - kunmap_atomic(kfrom, KM_USER1); - kunmap_atomic(kto, KM_USER0); -} - -void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr) -{ - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile ("\ - mov r1, %2 \n\ - mov r2, #0 \n\ - mov r3, #0 \n\ - mov r4, #0 \n\ - mov r5, #0 \n\ - mov r6, #0 \n\ - mov r7, #0 \n\ - mov ip, #0 \n\ - mov lr, #0 \n\ -1: stmia %0, {r2-r7, ip, lr} \n\ - subs r1, r1, #1 \n\ - mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\ - add %0, %0, #32 \n\ - bne 1b \n\ - mcr p15, 0, r1, c7, c10, 4 @ drain WB" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 32) - : "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr"); - kunmap_atomic(kaddr, KM_USER0); -} - -struct cpu_user_fns feroceon_user_fns __initdata = { - .cpu_clear_user_highpage = feroceon_clear_user_highpage, - .cpu_copy_user_highpage = feroceon_copy_user_highpage, -}; - diff --git a/trunk/arch/arm/mm/copypage-v3.S b/trunk/arch/arm/mm/copypage-v3.S new file mode 100644 index 000000000000..2ee394b11bcb --- /dev/null +++ b/trunk/arch/arm/mm/copypage-v3.S @@ -0,0 +1,67 @@ +/* + * linux/arch/arm/lib/copypage.S + * + * Copyright (C) 1995-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * ASM optimised string functions + */ +#include +#include +#include +#include + + .text + .align 5 +/* + * ARMv3 optimised copy_user_page + * + * FIXME: do we need to handle cache stuff... + */ +ENTRY(v3_copy_user_page) + stmfd sp!, {r4, lr} @ 2 + mov r2, #PAGE_SZ/64 @ 1 + ldmia r1!, {r3, r4, ip, lr} @ 4+1 +1: stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4+1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4+1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4 + subs r2, r2, #1 @ 1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmneia r1!, {r3, r4, ip, lr} @ 4 + bne 1b @ 1 + ldmfd sp!, {r4, pc} @ 3 + + .align 5 +/* + * ARMv3 optimised clear_user_page + * + * FIXME: do we need to handle cache stuff... + */ +ENTRY(v3_clear_user_page) + str lr, [sp, #-4]! + mov r1, #PAGE_SZ/64 @ 1 + mov r2, #0 @ 1 + mov r3, #0 @ 1 + mov ip, #0 @ 1 + mov lr, #0 @ 1 +1: stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + subs r1, r1, #1 @ 1 + bne 1b @ 1 + ldr pc, [sp], #4 + + __INITDATA + + .type v3_user_fns, #object +ENTRY(v3_user_fns) + .long v3_clear_user_page + .long v3_copy_user_page + .size v3_user_fns, . - v3_user_fns diff --git a/trunk/arch/arm/mm/copypage-v3.c b/trunk/arch/arm/mm/copypage-v3.c deleted file mode 100644 index 70ed96c8af8e..000000000000 --- a/trunk/arch/arm/mm/copypage-v3.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * linux/arch/arm/mm/copypage-v3.c - * - * Copyright (C) 1995-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -/* - * ARMv3 optimised copy_user_highpage - * - * FIXME: do we need to handle cache stuff... - */ -static void __attribute__((naked)) -v3_copy_user_page(void *kto, const void *kfrom) -{ - asm("\n\ - stmfd sp!, {r4, lr} @ 2\n\ - mov r2, %2 @ 1\n\ - ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\ -1: stmia %1!, {r3, r4, ip, lr} @ 4\n\ - ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\ - stmia %1!, {r3, r4, ip, lr} @ 4\n\ - ldmia %0!, {r3, r4, ip, lr} @ 4+1\n\ - stmia %1!, {r3, r4, ip, lr} @ 4\n\ - ldmia %0!, {r3, r4, ip, lr} @ 4\n\ - subs r2, r2, #1 @ 1\n\ - stmia %1!, {r3, r4, ip, lr} @ 4\n\ - ldmneia %0!, {r3, r4, ip, lr} @ 4\n\ - bne 1b @ 1\n\ - ldmfd sp!, {r4, pc} @ 3" - : - : "r" (kfrom), "r" (kto), "I" (PAGE_SIZE / 64)); -} - -void v3_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) -{ - void *kto, *kfrom; - - kto = kmap_atomic(to, KM_USER0); - kfrom = kmap_atomic(from, KM_USER1); - v3_copy_user_page(kto, kfrom); - kunmap_atomic(kfrom, KM_USER1); - kunmap_atomic(kto, KM_USER0); -} - -/* - * ARMv3 optimised clear_user_page - * - * FIXME: do we need to handle cache stuff... - */ -void v3_clear_user_highpage(struct page *page, unsigned long vaddr) -{ - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile("\n\ - mov r1, %2 @ 1\n\ - mov r2, #0 @ 1\n\ - mov r3, #0 @ 1\n\ - mov ip, #0 @ 1\n\ - mov lr, #0 @ 1\n\ -1: stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - subs r1, r1, #1 @ 1\n\ - bne 1b @ 1" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 64) - : "r1", "r2", "r3", "ip", "lr"); - kunmap_atomic(kaddr, KM_USER0); -} - -struct cpu_user_fns v3_user_fns __initdata = { - .cpu_clear_user_highpage = v3_clear_user_highpage, - .cpu_copy_user_highpage = v3_copy_user_highpage, -}; diff --git a/trunk/arch/arm/mm/copypage-v4mc.c b/trunk/arch/arm/mm/copypage-v4mc.c index bdb5fd983b15..8d33e2549344 100644 --- a/trunk/arch/arm/mm/copypage-v4mc.c +++ b/trunk/arch/arm/mm/copypage-v4mc.c @@ -15,8 +15,8 @@ */ #include #include -#include +#include #include #include #include @@ -33,7 +33,7 @@ static DEFINE_SPINLOCK(minicache_lock); /* - * ARMv4 mini-dcache optimised copy_user_highpage + * ARMv4 mini-dcache optimised copy_user_page * * We flush the destination cache lines just before we write the data into the * corresponding address. Since the Dcache is read-allocate, this removes the @@ -42,7 +42,7 @@ static DEFINE_SPINLOCK(minicache_lock); * * Note: We rely on all ARMv4 processors implementing the "invalidate D line" * instruction. If your processor does not supply this, you have to write your - * own copy_user_highpage that does the right thing. + * own copy_user_page that does the right thing. */ static void __attribute__((naked)) mc_copy_user_page(void *from, void *to) @@ -68,53 +68,50 @@ mc_copy_user_page(void *from, void *to) : "r" (from), "r" (to), "I" (PAGE_SIZE / 64)); } -void v4_mc_copy_user_highpage(struct page *from, struct page *to, - unsigned long vaddr) +void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) { - void *kto = kmap_atomic(to, KM_USER1); + struct page *page = virt_to_page(kfrom); - if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) - __flush_dcache_page(page_mapping(from), from); + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); spin_lock(&minicache_lock); - set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); + set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); flush_tlb_kernel_page(0xffff8000); mc_copy_user_page((void *)0xffff8000, kto); spin_unlock(&minicache_lock); - - kunmap_atomic(kto, KM_USER1); } /* * ARMv4 optimised clear_user_page */ -void v4_mc_clear_user_highpage(struct page *page, unsigned long vaddr) +void __attribute__((naked)) +v4_mc_clear_user_page(void *kaddr, unsigned long vaddr) { - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile("\ - mov r1, %2 @ 1\n\ + asm volatile( + "str lr, [sp, #-4]!\n\ + mov r1, %0 @ 1\n\ mov r2, #0 @ 1\n\ mov r3, #0 @ 1\n\ mov ip, #0 @ 1\n\ mov lr, #0 @ 1\n\ -1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ +1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ + stmia r0!, {r2, r3, ip, lr} @ 4\n\ + stmia r0!, {r2, r3, ip, lr} @ 4\n\ + mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ + stmia r0!, {r2, r3, ip, lr} @ 4\n\ + stmia r0!, {r2, r3, ip, lr} @ 4\n\ subs r1, r1, #1 @ 1\n\ - bne 1b @ 1" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 64) - : "r1", "r2", "r3", "ip", "lr"); - kunmap_atomic(kaddr, KM_USER0); + bne 1b @ 1\n\ + ldr pc, [sp], #4" + : + : "I" (PAGE_SIZE / 64)); } struct cpu_user_fns v4_mc_user_fns __initdata = { - .cpu_clear_user_highpage = v4_mc_clear_user_highpage, - .cpu_copy_user_highpage = v4_mc_copy_user_highpage, + .cpu_clear_user_page = v4_mc_clear_user_page, + .cpu_copy_user_page = v4_mc_copy_user_page, }; diff --git a/trunk/arch/arm/mm/copypage-v4wb.S b/trunk/arch/arm/mm/copypage-v4wb.S new file mode 100644 index 000000000000..83117354b1cd --- /dev/null +++ b/trunk/arch/arm/mm/copypage-v4wb.S @@ -0,0 +1,79 @@ +/* + * linux/arch/arm/lib/copypage.S + * + * Copyright (C) 1995-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * ASM optimised string functions + */ +#include +#include +#include + + .text + .align 5 +/* + * ARMv4 optimised copy_user_page + * + * We flush the destination cache lines just before we write the data into the + * corresponding address. Since the Dcache is read-allocate, this removes the + * Dcache aliasing issue. The writes will be forwarded to the write buffer, + * and merged as appropriate. + * + * Note: We rely on all ARMv4 processors implementing the "invalidate D line" + * instruction. If your processor does not supply this, you have to write your + * own copy_user_page that does the right thing. + */ +ENTRY(v4wb_copy_user_page) + stmfd sp!, {r4, lr} @ 2 + mov r2, #PAGE_SZ/64 @ 1 + ldmia r1!, {r3, r4, ip, lr} @ 4 +1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4+1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4 + mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4 + subs r2, r2, #1 @ 1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmneia r1!, {r3, r4, ip, lr} @ 4 + bne 1b @ 1 + mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB + ldmfd sp!, {r4, pc} @ 3 + + .align 5 +/* + * ARMv4 optimised clear_user_page + * + * Same story as above. + */ +ENTRY(v4wb_clear_user_page) + str lr, [sp, #-4]! + mov r1, #PAGE_SZ/64 @ 1 + mov r2, #0 @ 1 + mov r3, #0 @ 1 + mov ip, #0 @ 1 + mov lr, #0 @ 1 +1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + subs r1, r1, #1 @ 1 + bne 1b @ 1 + mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB + ldr pc, [sp], #4 + + __INITDATA + + .type v4wb_user_fns, #object +ENTRY(v4wb_user_fns) + .long v4wb_clear_user_page + .long v4wb_copy_user_page + .size v4wb_user_fns, . - v4wb_user_fns diff --git a/trunk/arch/arm/mm/copypage-v4wb.c b/trunk/arch/arm/mm/copypage-v4wb.c deleted file mode 100644 index 3ec93dab7656..000000000000 --- a/trunk/arch/arm/mm/copypage-v4wb.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * linux/arch/arm/mm/copypage-v4wb.c - * - * Copyright (C) 1995-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include - -/* - * ARMv4 optimised copy_user_highpage - * - * We flush the destination cache lines just before we write the data into the - * corresponding address. Since the Dcache is read-allocate, this removes the - * Dcache aliasing issue. The writes will be forwarded to the write buffer, - * and merged as appropriate. - * - * Note: We rely on all ARMv4 processors implementing the "invalidate D line" - * instruction. If your processor does not supply this, you have to write your - * own copy_user_highpage that does the right thing. - */ -static void __attribute__((naked)) -v4wb_copy_user_page(void *kto, const void *kfrom) -{ - asm("\ - stmfd sp!, {r4, lr} @ 2\n\ - mov r2, %0 @ 1\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ -1: mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ - mcr p15, 0, r0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ - subs r2, r2, #1 @ 1\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmneia r1!, {r3, r4, ip, lr} @ 4\n\ - bne 1b @ 1\n\ - mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB\n\ - ldmfd sp!, {r4, pc} @ 3" - : - : "I" (PAGE_SIZE / 64)); -} - -void v4wb_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) -{ - void *kto, *kfrom; - - kto = kmap_atomic(to, KM_USER0); - kfrom = kmap_atomic(from, KM_USER1); - v4wb_copy_user_page(kto, kfrom); - kunmap_atomic(kfrom, KM_USER1); - kunmap_atomic(kto, KM_USER0); -} - -/* - * ARMv4 optimised clear_user_page - * - * Same story as above. - */ -void v4wb_clear_user_highpage(struct page *page, unsigned long vaddr) -{ - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile("\ - mov r1, %2 @ 1\n\ - mov r2, #0 @ 1\n\ - mov r3, #0 @ 1\n\ - mov ip, #0 @ 1\n\ - mov lr, #0 @ 1\n\ -1: mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - mcr p15, 0, %0, c7, c6, 1 @ 1 invalidate D line\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - subs r1, r1, #1 @ 1\n\ - bne 1b @ 1\n\ - mcr p15, 0, r1, c7, c10, 4 @ 1 drain WB" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 64) - : "r1", "r2", "r3", "ip", "lr"); - kunmap_atomic(kaddr, KM_USER0); -} - -struct cpu_user_fns v4wb_user_fns __initdata = { - .cpu_clear_user_highpage = v4wb_clear_user_highpage, - .cpu_copy_user_highpage = v4wb_copy_user_highpage, -}; diff --git a/trunk/arch/arm/mm/copypage-v4wt.S b/trunk/arch/arm/mm/copypage-v4wt.S new file mode 100644 index 000000000000..e1f2af28d549 --- /dev/null +++ b/trunk/arch/arm/mm/copypage-v4wt.S @@ -0,0 +1,73 @@ +/* + * linux/arch/arm/lib/copypage-v4.S + * + * Copyright (C) 1995-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * ASM optimised string functions + * + * This is for CPUs with a writethrough cache and 'flush ID cache' is + * the only supported cache operation. + */ +#include +#include +#include + + .text + .align 5 +/* + * ARMv4 optimised copy_user_page + * + * Since we have writethrough caches, we don't have to worry about + * dirty data in the cache. However, we do have to ensure that + * subsequent reads are up to date. + */ +ENTRY(v4wt_copy_user_page) + stmfd sp!, {r4, lr} @ 2 + mov r2, #PAGE_SZ/64 @ 1 + ldmia r1!, {r3, r4, ip, lr} @ 4 +1: stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4+1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmia r1!, {r3, r4, ip, lr} @ 4 + subs r2, r2, #1 @ 1 + stmia r0!, {r3, r4, ip, lr} @ 4 + ldmneia r1!, {r3, r4, ip, lr} @ 4 + bne 1b @ 1 + mcr p15, 0, r2, c7, c7, 0 @ flush ID cache + ldmfd sp!, {r4, pc} @ 3 + + .align 5 +/* + * ARMv4 optimised clear_user_page + * + * Same story as above. + */ +ENTRY(v4wt_clear_user_page) + str lr, [sp, #-4]! + mov r1, #PAGE_SZ/64 @ 1 + mov r2, #0 @ 1 + mov r3, #0 @ 1 + mov ip, #0 @ 1 + mov lr, #0 @ 1 +1: stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + stmia r0!, {r2, r3, ip, lr} @ 4 + subs r1, r1, #1 @ 1 + bne 1b @ 1 + mcr p15, 0, r2, c7, c7, 0 @ flush ID cache + ldr pc, [sp], #4 + + __INITDATA + + .type v4wt_user_fns, #object +ENTRY(v4wt_user_fns) + .long v4wt_clear_user_page + .long v4wt_copy_user_page + .size v4wt_user_fns, . - v4wt_user_fns diff --git a/trunk/arch/arm/mm/copypage-v4wt.c b/trunk/arch/arm/mm/copypage-v4wt.c deleted file mode 100644 index 0f1188efae45..000000000000 --- a/trunk/arch/arm/mm/copypage-v4wt.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * linux/arch/arm/mm/copypage-v4wt.S - * - * Copyright (C) 1995-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This is for CPUs with a writethrough cache and 'flush ID cache' is - * the only supported cache operation. - */ -#include -#include - -/* - * ARMv4 optimised copy_user_highpage - * - * Since we have writethrough caches, we don't have to worry about - * dirty data in the cache. However, we do have to ensure that - * subsequent reads are up to date. - */ -static void __attribute__((naked)) -v4wt_copy_user_page(void *kto, const void *kfrom) -{ - asm("\ - stmfd sp!, {r4, lr} @ 2\n\ - mov r2, %0 @ 1\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ -1: stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4+1\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmia r1!, {r3, r4, ip, lr} @ 4\n\ - subs r2, r2, #1 @ 1\n\ - stmia r0!, {r3, r4, ip, lr} @ 4\n\ - ldmneia r1!, {r3, r4, ip, lr} @ 4\n\ - bne 1b @ 1\n\ - mcr p15, 0, r2, c7, c7, 0 @ flush ID cache\n\ - ldmfd sp!, {r4, pc} @ 3" - : - : "I" (PAGE_SIZE / 64)); -} - -void v4wt_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) -{ - void *kto, *kfrom; - - kto = kmap_atomic(to, KM_USER0); - kfrom = kmap_atomic(from, KM_USER1); - v4wt_copy_user_page(kto, kfrom); - kunmap_atomic(kfrom, KM_USER1); - kunmap_atomic(kto, KM_USER0); -} - -/* - * ARMv4 optimised clear_user_page - * - * Same story as above. - */ -void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr) -{ - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile("\ - mov r1, %2 @ 1\n\ - mov r2, #0 @ 1\n\ - mov r3, #0 @ 1\n\ - mov ip, #0 @ 1\n\ - mov lr, #0 @ 1\n\ -1: stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - stmia %0!, {r2, r3, ip, lr} @ 4\n\ - subs r1, r1, #1 @ 1\n\ - bne 1b @ 1\n\ - mcr p15, 0, r2, c7, c7, 0 @ flush ID cache" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 64) - : "r1", "r2", "r3", "ip", "lr"); - kunmap_atomic(kaddr, KM_USER0); -} - -struct cpu_user_fns v4wt_user_fns __initdata = { - .cpu_clear_user_highpage = v4wt_clear_user_highpage, - .cpu_copy_user_highpage = v4wt_copy_user_highpage, -}; diff --git a/trunk/arch/arm/mm/copypage-v6.c b/trunk/arch/arm/mm/copypage-v6.c index 4127a7bddfe5..0e21c0767580 100644 --- a/trunk/arch/arm/mm/copypage-v6.c +++ b/trunk/arch/arm/mm/copypage-v6.c @@ -10,8 +10,8 @@ #include #include #include -#include +#include #include #include #include @@ -33,56 +33,41 @@ static DEFINE_SPINLOCK(v6_lock); * Copy the user page. No aliasing to deal with so we can just * attack the kernel's existing mapping of these pages. */ -static void v6_copy_user_highpage_nonaliasing(struct page *to, - struct page *from, unsigned long vaddr) +static void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr) { - void *kto, *kfrom; - - kfrom = kmap_atomic(from, KM_USER0); - kto = kmap_atomic(to, KM_USER1); copy_page(kto, kfrom); - kunmap_atomic(kto, KM_USER1); - kunmap_atomic(kfrom, KM_USER0); } /* * Clear the user page. No aliasing to deal with so we can just * attack the kernel's existing mapping of this page. */ -static void v6_clear_user_highpage_nonaliasing(struct page *page, unsigned long vaddr) +static void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr) { - void *kaddr = kmap_atomic(page, KM_USER0); clear_page(kaddr); - kunmap_atomic(kaddr, KM_USER0); } /* - * Discard data in the kernel mapping for the new page. - * FIXME: needs this MCRR to be supported. + * Copy the page, taking account of the cache colour. */ -static void discard_old_kernel_data(void *kto) +static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr) { + unsigned int offset = CACHE_COLOUR(vaddr); + unsigned long from, to; + struct page *page = virt_to_page(kfrom); + + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); + + /* + * Discard data in the kernel mapping for the new page. + * FIXME: needs this MCRR to be supported. + */ __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06" : : "r" (kto), "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES) : "cc"); -} - -/* - * Copy the page, taking account of the cache colour. - */ -static void v6_copy_user_highpage_aliasing(struct page *to, - struct page *from, unsigned long vaddr) -{ - unsigned int offset = CACHE_COLOUR(vaddr); - unsigned long kfrom, kto; - - if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) - __flush_dcache_page(page_mapping(from), from); - - /* FIXME: not highmem safe */ - discard_old_kernel_data(page_address(to)); /* * Now copy the page using the same cache colour as the @@ -90,16 +75,16 @@ static void v6_copy_user_highpage_aliasing(struct page *to, */ spin_lock(&v6_lock); - set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0); - set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0); + set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, PAGE_KERNEL), 0); + set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, PAGE_KERNEL), 0); - kfrom = from_address + (offset << PAGE_SHIFT); - kto = to_address + (offset << PAGE_SHIFT); + from = from_address + (offset << PAGE_SHIFT); + to = to_address + (offset << PAGE_SHIFT); - flush_tlb_kernel_page(kfrom); - flush_tlb_kernel_page(kto); + flush_tlb_kernel_page(from); + flush_tlb_kernel_page(to); - copy_page((void *)kto, (void *)kfrom); + copy_page((void *)to, (void *)from); spin_unlock(&v6_lock); } @@ -109,13 +94,20 @@ static void v6_copy_user_highpage_aliasing(struct page *to, * so remap the kernel page into the same cache colour as the user * page. */ -static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vaddr) +static void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr) { unsigned int offset = CACHE_COLOUR(vaddr); unsigned long to = to_address + (offset << PAGE_SHIFT); - /* FIXME: not highmem safe */ - discard_old_kernel_data(page_address(page)); + /* + * Discard data in the kernel mapping for the new page + * FIXME: needs this MCRR to be supported. + */ + __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06" + : + : "r" (kaddr), + "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES) + : "cc"); /* * Now clear the page using the same cache colour as @@ -123,7 +115,7 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad */ spin_lock(&v6_lock); - set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0); + set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, PAGE_KERNEL), 0); flush_tlb_kernel_page(to); clear_page((void *)to); @@ -131,15 +123,15 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad } struct cpu_user_fns v6_user_fns __initdata = { - .cpu_clear_user_highpage = v6_clear_user_highpage_nonaliasing, - .cpu_copy_user_highpage = v6_copy_user_highpage_nonaliasing, + .cpu_clear_user_page = v6_clear_user_page_nonaliasing, + .cpu_copy_user_page = v6_copy_user_page_nonaliasing, }; static int __init v6_userpage_init(void) { if (cache_is_vipt_aliasing()) { - cpu_user.cpu_clear_user_highpage = v6_clear_user_highpage_aliasing; - cpu_user.cpu_copy_user_highpage = v6_copy_user_highpage_aliasing; + cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing; + cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing; } return 0; diff --git a/trunk/arch/arm/mm/copypage-xsc3.S b/trunk/arch/arm/mm/copypage-xsc3.S new file mode 100644 index 000000000000..9a2cb4332b4c --- /dev/null +++ b/trunk/arch/arm/mm/copypage-xsc3.S @@ -0,0 +1,97 @@ +/* + * linux/arch/arm/lib/copypage-xsc3.S + * + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Adapted for 3rd gen XScale core, no more mini-dcache + * Author: Matt Gilbert (matthew.m.gilbert@intel.com) + */ + +#include +#include +#include + +/* + * General note: + * We don't really want write-allocate cache behaviour for these functions + * since that will just eat through 8K of the cache. + */ + + .text + .align 5 +/* + * XSC3 optimised copy_user_page + * r0 = destination + * r1 = source + * r2 = virtual user address of ultimate destination page + * + * The source page may have some clean entries in the cache already, but we + * can safely ignore them - break_cow() will flush them out of the cache + * if we eventually end up using our copied page. + * + */ +ENTRY(xsc3_mc_copy_user_page) + stmfd sp!, {r4, r5, lr} + mov lr, #PAGE_SZ/64-1 + + pld [r1, #0] + pld [r1, #32] +1: pld [r1, #64] + pld [r1, #96] + +2: ldrd r2, [r1], #8 + mov ip, r0 + ldrd r4, [r1], #8 + mcr p15, 0, ip, c7, c6, 1 @ invalidate + strd r2, [r0], #8 + ldrd r2, [r1], #8 + strd r4, [r0], #8 + ldrd r4, [r1], #8 + strd r2, [r0], #8 + strd r4, [r0], #8 + ldrd r2, [r1], #8 + mov ip, r0 + ldrd r4, [r1], #8 + mcr p15, 0, ip, c7, c6, 1 @ invalidate + strd r2, [r0], #8 + ldrd r2, [r1], #8 + subs lr, lr, #1 + strd r4, [r0], #8 + ldrd r4, [r1], #8 + strd r2, [r0], #8 + strd r4, [r0], #8 + bgt 1b + beq 2b + + ldmfd sp!, {r4, r5, pc} + + .align 5 +/* + * XScale optimised clear_user_page + * r0 = destination + * r1 = virtual user address of ultimate destination page + */ +ENTRY(xsc3_mc_clear_user_page) + mov r1, #PAGE_SZ/32 + mov r2, #0 + mov r3, #0 +1: mcr p15, 0, r0, c7, c6, 1 @ invalidate line + strd r2, [r0], #8 + strd r2, [r0], #8 + strd r2, [r0], #8 + strd r2, [r0], #8 + subs r1, r1, #1 + bne 1b + mov pc, lr + + __INITDATA + + .type xsc3_mc_user_fns, #object +ENTRY(xsc3_mc_user_fns) + .long xsc3_mc_clear_user_page + .long xsc3_mc_copy_user_page + .size xsc3_mc_user_fns, . - xsc3_mc_user_fns diff --git a/trunk/arch/arm/mm/copypage-xsc3.c b/trunk/arch/arm/mm/copypage-xsc3.c deleted file mode 100644 index 39a994542cad..000000000000 --- a/trunk/arch/arm/mm/copypage-xsc3.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * linux/arch/arm/mm/copypage-xsc3.S - * - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Adapted for 3rd gen XScale core, no more mini-dcache - * Author: Matt Gilbert (matthew.m.gilbert@intel.com) - */ -#include -#include - -/* - * General note: - * We don't really want write-allocate cache behaviour for these functions - * since that will just eat through 8K of the cache. - */ - -/* - * XSC3 optimised copy_user_highpage - * r0 = destination - * r1 = source - * - * The source page may have some clean entries in the cache already, but we - * can safely ignore them - break_cow() will flush them out of the cache - * if we eventually end up using our copied page. - * - */ -static void __attribute__((naked)) -xsc3_mc_copy_user_page(void *kto, const void *kfrom) -{ - asm("\ - stmfd sp!, {r4, r5, lr} \n\ - mov lr, %0 \n\ - \n\ - pld [r1, #0] \n\ - pld [r1, #32] \n\ -1: pld [r1, #64] \n\ - pld [r1, #96] \n\ - \n\ -2: ldrd r2, [r1], #8 \n\ - mov ip, r0 \n\ - ldrd r4, [r1], #8 \n\ - mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\ - strd r2, [r0], #8 \n\ - ldrd r2, [r1], #8 \n\ - strd r4, [r0], #8 \n\ - ldrd r4, [r1], #8 \n\ - strd r2, [r0], #8 \n\ - strd r4, [r0], #8 \n\ - ldrd r2, [r1], #8 \n\ - mov ip, r0 \n\ - ldrd r4, [r1], #8 \n\ - mcr p15, 0, ip, c7, c6, 1 @ invalidate\n\ - strd r2, [r0], #8 \n\ - ldrd r2, [r1], #8 \n\ - subs lr, lr, #1 \n\ - strd r4, [r0], #8 \n\ - ldrd r4, [r1], #8 \n\ - strd r2, [r0], #8 \n\ - strd r4, [r0], #8 \n\ - bgt 1b \n\ - beq 2b \n\ - \n\ - ldmfd sp!, {r4, r5, pc}" - : - : "I" (PAGE_SIZE / 64 - 1)); -} - -void xsc3_mc_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) -{ - void *kto, *kfrom; - - kto = kmap_atomic(to, KM_USER0); - kfrom = kmap_atomic(from, KM_USER1); - xsc3_mc_copy_user_page(kto, kfrom); - kunmap_atomic(kfrom, KM_USER1); - kunmap_atomic(kto, KM_USER0); -} - -/* - * XScale optimised clear_user_page - * r0 = destination - * r1 = virtual user address of ultimate destination page - */ -void xsc3_mc_clear_user_highpage(struct page *page, unsigned long vaddr) -{ - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); - asm volatile ("\ - mov r1, %2 \n\ - mov r2, #0 \n\ - mov r3, #0 \n\ -1: mcr p15, 0, %0, c7, c6, 1 @ invalidate line\n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ - subs r1, r1, #1 \n\ - bne 1b" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 32) - : "r1", "r2", "r3"); - kunmap_atomic(kaddr, KM_USER0); -} - -struct cpu_user_fns xsc3_mc_user_fns __initdata = { - .cpu_clear_user_highpage = xsc3_mc_clear_user_highpage, - .cpu_copy_user_highpage = xsc3_mc_copy_user_highpage, -}; diff --git a/trunk/arch/arm/mm/copypage-xscale.c b/trunk/arch/arm/mm/copypage-xscale.c index d18f2397ee2d..bad49331bbf9 100644 --- a/trunk/arch/arm/mm/copypage-xscale.c +++ b/trunk/arch/arm/mm/copypage-xscale.c @@ -15,8 +15,8 @@ */ #include #include -#include +#include #include #include #include @@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(minicache_lock); /* - * XScale mini-dcache optimised copy_user_highpage + * XScale mini-dcache optimised copy_user_page * * We flush the destination cache lines just before we write the data into the * corresponding address. Since the Dcache is read-allocate, this removes the @@ -90,53 +90,48 @@ mc_copy_user_page(void *from, void *to) : "r" (from), "r" (to), "I" (PAGE_SIZE / 64 - 1)); } -void xscale_mc_copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr) +void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) { - void *kto = kmap_atomic(to, KM_USER1); + struct page *page = virt_to_page(kfrom); - if (test_and_clear_bit(PG_dcache_dirty, &from->flags)) - __flush_dcache_page(page_mapping(from), from); + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); spin_lock(&minicache_lock); - set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); + set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); flush_tlb_kernel_page(COPYPAGE_MINICACHE); mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); spin_unlock(&minicache_lock); - - kunmap_atomic(kto, KM_USER1); } /* * XScale optimised clear_user_page */ -void -xscale_mc_clear_user_highpage(struct page *page, unsigned long vaddr) +void __attribute__((naked)) +xscale_mc_clear_user_page(void *kaddr, unsigned long vaddr) { - void *ptr, *kaddr = kmap_atomic(page, KM_USER0); asm volatile( - "mov r1, %2 \n\ + "mov r1, %0 \n\ mov r2, #0 \n\ mov r3, #0 \n\ -1: mov ip, %0 \n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ - strd r2, [%0], #8 \n\ +1: mov ip, r0 \n\ + strd r2, [r0], #8 \n\ + strd r2, [r0], #8 \n\ + strd r2, [r0], #8 \n\ + strd r2, [r0], #8 \n\ mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\ subs r1, r1, #1 \n\ mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\ - bne 1b" - : "=r" (ptr) - : "0" (kaddr), "I" (PAGE_SIZE / 32) - : "r1", "r2", "r3", "ip"); - kunmap_atomic(kaddr, KM_USER0); + bne 1b \n\ + mov pc, lr" + : + : "I" (PAGE_SIZE / 32)); } struct cpu_user_fns xscale_mc_user_fns __initdata = { - .cpu_clear_user_highpage = xscale_mc_clear_user_highpage, - .cpu_copy_user_highpage = xscale_mc_copy_user_highpage, + .cpu_clear_user_page = xscale_mc_clear_user_page, + .cpu_copy_user_page = xscale_mc_copy_user_page, }; diff --git a/trunk/arch/arm/mm/fault.c b/trunk/arch/arm/mm/fault.c index ffd8b228a139..2df8d9facf57 100644 --- a/trunk/arch/arm/mm/fault.c +++ b/trunk/arch/arm/mm/fault.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -84,14 +83,13 @@ void show_pte(struct mm_struct *mm, unsigned long addr) break; } +#ifndef CONFIG_HIGHMEM /* We must not map this if we have highmem enabled */ - if (PageHighMem(pfn_to_page(pmd_val(*pmd) >> PAGE_SHIFT))) - break; - pte = pte_offset_map(pmd, addr); printk(", *pte=%08lx", pte_val(*pte)); printk(", *ppte=%08lx", pte_val(pte[-PTRS_PER_PTE])); pte_unmap(pte); +#endif } while(0); printk("\n"); diff --git a/trunk/arch/arm/mm/init.c b/trunk/arch/arm/mm/init.c index ab5c9abd5c34..82c4b4217989 100644 --- a/trunk/arch/arm/mm/init.c +++ b/trunk/arch/arm/mm/init.c @@ -64,11 +64,10 @@ static int __init parse_tag_initrd2(const struct tag *tag) __tagtable(ATAG_INITRD2, parse_tag_initrd2); /* - * This keeps memory configuration data used by a couple memory - * initialization functions, as well as show_mem() for the skipping - * of holes in the memory map. It is populated by arm_add_memory(). + * This is used to pass memory configuration data from paging_init + * to mem_init, and by show_mem() to skip holes in the memory map. */ -struct meminfo meminfo; +static struct meminfo meminfo = { 0, }; void show_mem(void) { @@ -332,12 +331,13 @@ static void __init bootmem_free_node(int node, struct meminfo *mi) free_area_init_node(node, zone_size, start_pfn, zhole_size); } -void __init bootmem_init(void) +void __init bootmem_init(struct meminfo *mi) { - struct meminfo *mi = &meminfo; unsigned long memend_pfn = 0; int node, initrd_node; + memcpy(&meminfo, mi, sizeof(meminfo)); + /* * Locate which node contains the ramdisk image, if any. */ @@ -394,22 +394,20 @@ void __init bootmem_init(void) max_pfn = max_low_pfn = memend_pfn - PHYS_PFN_OFFSET; } -static inline int free_area(unsigned long pfn, unsigned long end, char *s) +static inline void free_area(unsigned long addr, unsigned long end, char *s) { - unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10); + unsigned int size = (end - addr) >> 10; - for (; pfn < end; pfn++) { - struct page *page = pfn_to_page(pfn); + for (; addr < end; addr += PAGE_SIZE) { + struct page *page = virt_to_page(addr); ClearPageReserved(page); init_page_count(page); - __free_page(page); - pages++; + free_page(addr); + totalram_pages++; } if (size && s) printk(KERN_INFO "Freeing %s memory: %dK\n", s, size); - - return pages; } static inline void @@ -480,9 +478,13 @@ static void __init free_unused_memmap_node(int node, struct meminfo *mi) */ void __init mem_init(void) { - unsigned int codesize, datasize, initsize; + unsigned int codepages, datapages, initpages; int i, node; + codepages = &_etext - &_text; + datapages = &_end - &__data_start; + initpages = &__init_end - &__init_begin; + #ifndef CONFIG_DISCONTIGMEM max_mapnr = virt_to_page(high_memory) - mem_map; #endif @@ -499,8 +501,7 @@ void __init mem_init(void) #ifdef CONFIG_SA1111 /* now that our DMA memory is actually so designated, we can free it */ - totalram_pages += free_area(PHYS_PFN_OFFSET, - __phys_to_pfn(__pa(swapper_pg_dir)), NULL); + free_area(PAGE_OFFSET, (unsigned long)swapper_pg_dir, NULL); #endif /* @@ -508,21 +509,18 @@ void __init mem_init(void) * real number of pages we have in this system */ printk(KERN_INFO "Memory:"); + num_physpages = 0; for (i = 0; i < meminfo.nr_banks; i++) { num_physpages += bank_pfn_size(&meminfo.bank[i]); printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20); } - printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); - - codesize = &_etext - &_text; - datasize = &_end - &__data_start; - initsize = &__init_end - &__init_begin; + printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); printk(KERN_NOTICE "Memory: %luKB available (%dK code, " "%dK data, %dK init)\n", (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), - codesize >> 10, datasize >> 10, initsize >> 10); + codepages >> 10, datapages >> 10, initpages >> 10); if (PAGE_SIZE >= 16384 && num_physpages <= 128) { extern int sysctl_overcommit_memory; @@ -537,10 +535,11 @@ void __init mem_init(void) void free_initmem(void) { - if (!machine_is_integrator() && !machine_is_cintegrator()) - totalram_pages += free_area(__phys_to_pfn(__pa(&__init_begin)), - __phys_to_pfn(__pa(&__init_end)), - "init"); + if (!machine_is_integrator() && !machine_is_cintegrator()) { + free_area((unsigned long)(&__init_begin), + (unsigned long)(&__init_end), + "init"); + } } #ifdef CONFIG_BLK_DEV_INITRD @@ -550,9 +549,7 @@ static int keep_initrd; void free_initrd_mem(unsigned long start, unsigned long end) { if (!keep_initrd) - totalram_pages += free_area(__phys_to_pfn(__pa(start)), - __phys_to_pfn(__pa(end)), - "initrd"); + free_area(start, end, "initrd"); } static int __init keepinitrd_setup(char *__unused) diff --git a/trunk/arch/arm/mm/mm.h b/trunk/arch/arm/mm/mm.h index 94367bdbb5a8..5d9f53907b4e 100644 --- a/trunk/arch/arm/mm/mm.h +++ b/trunk/arch/arm/mm/mm.h @@ -32,7 +32,7 @@ struct meminfo; struct pglist_data; void __init create_mapping(struct map_desc *md); -void __init bootmem_init(void); +void __init bootmem_init(struct meminfo *mi); void reserve_node_zero(struct pglist_data *pgdat); extern void _text, _stext, _etext, __data_start, _end, __init_begin, __init_end; diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index c0b9a78d7b87..7f36c825718d 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -646,79 +646,61 @@ static void __init early_vmalloc(char **arg) "vmalloc area too small, limiting to %luMB\n", vmalloc_reserve >> 20); } - - if (vmalloc_reserve > VMALLOC_END - (PAGE_OFFSET + SZ_32M)) { - vmalloc_reserve = VMALLOC_END - (PAGE_OFFSET + SZ_32M); - printk(KERN_WARNING - "vmalloc area is too big, limiting to %luMB\n", - vmalloc_reserve >> 20); - } } __early_param("vmalloc=", early_vmalloc); #define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve) -static void __init sanity_check_meminfo(void) +static int __init check_membank_valid(struct membank *mb) { - int i, j; + /* + * Check whether this memory region has non-zero size or + * invalid node number. + */ + if (mb->size == 0 || mb->node >= MAX_NUMNODES) + return 0; - for (i = 0, j = 0; i < meminfo.nr_banks; i++) { - struct membank *bank = &meminfo.bank[j]; - *bank = meminfo.bank[i]; + /* + * Check whether this memory region would entirely overlap + * the vmalloc area. + */ + if (phys_to_virt(mb->start) >= VMALLOC_MIN) { + printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " + "(vmalloc region overlap).\n", + mb->start, mb->start + mb->size - 1); + return 0; + } -#ifdef CONFIG_HIGHMEM - /* - * Split those memory banks which are partially overlapping - * the vmalloc area greatly simplifying things later. - */ - if (__va(bank->start) < VMALLOC_MIN && - bank->size > VMALLOC_MIN - __va(bank->start)) { - if (meminfo.nr_banks >= NR_BANKS) { - printk(KERN_CRIT "NR_BANKS too low, " - "ignoring high memory\n"); - } else { - memmove(bank + 1, bank, - (meminfo.nr_banks - i) * sizeof(*bank)); - meminfo.nr_banks++; - i++; - bank[1].size -= VMALLOC_MIN - __va(bank->start); - bank[1].start = __pa(VMALLOC_MIN - 1) + 1; - j++; - } - bank->size = VMALLOC_MIN - __va(bank->start); - } -#else - /* - * Check whether this memory bank would entirely overlap - * the vmalloc area. - */ - if (__va(bank->start) >= VMALLOC_MIN) { - printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " - "(vmalloc region overlap).\n", - bank->start, bank->start + bank->size - 1); - continue; - } + /* + * Check whether this memory region would partially overlap + * the vmalloc area. + */ + if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) || + phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) { + unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start); + + printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " + "to -%.8lx (vmalloc region overlap).\n", + mb->start, mb->start + mb->size - 1, + mb->start + newsize - 1); + mb->size = newsize; + } - /* - * Check whether this memory bank would partially overlap - * the vmalloc area. - */ - if (__va(bank->start + bank->size) > VMALLOC_MIN || - __va(bank->start + bank->size) < __va(bank->start)) { - unsigned long newsize = VMALLOC_MIN - __va(bank->start); - printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " - "to -%.8lx (vmalloc region overlap).\n", - bank->start, bank->start + bank->size - 1, - bank->start + newsize - 1); - bank->size = newsize; - } -#endif - j++; + return 1; +} + +static void __init sanity_check_meminfo(struct meminfo *mi) +{ + int i, j; + + for (i = 0, j = 0; i < mi->nr_banks; i++) { + if (check_membank_valid(&mi->bank[i])) + mi->bank[j++] = mi->bank[i]; } - meminfo.nr_banks = j; + mi->nr_banks = j; } -static inline void prepare_page_table(void) +static inline void prepare_page_table(struct meminfo *mi) { unsigned long addr; @@ -739,7 +721,7 @@ static inline void prepare_page_table(void) * Clear out all the kernel space mappings, except for the first * memory bank, up to the end of the vmalloc region. */ - for (addr = __phys_to_virt(bank_phys_end(&meminfo.bank[0])); + for (addr = __phys_to_virt(mi->bank[0].start + mi->bank[0].size); addr < VMALLOC_END; addr += PGDIR_SIZE) pmd_clear(pmd_off_k(addr)); } @@ -898,14 +880,14 @@ static void __init devicemaps_init(struct machine_desc *mdesc) * paging_init() sets up the page tables, initialises the zone memory * maps, and sets up the zero page, bad page and bad page tables. */ -void __init paging_init(struct machine_desc *mdesc) +void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) { void *zero_page; build_mem_type_table(); - sanity_check_meminfo(); - prepare_page_table(); - bootmem_init(); + sanity_check_meminfo(mi); + prepare_page_table(mi); + bootmem_init(mi); devicemaps_init(mdesc); top_pmd = pmd_off_k(0xffff0000); @@ -914,7 +896,7 @@ void __init paging_init(struct machine_desc *mdesc) * allocate the zero page. Note that we count on this going ok. */ zero_page = alloc_bootmem_low_pages(PAGE_SIZE); - memset(zero_page, 0, PAGE_SIZE); + memzero(zero_page, PAGE_SIZE); empty_zero_page = virt_to_page(zero_page); flush_dcache_page(empty_zero_page); } diff --git a/trunk/arch/arm/mm/nommu.c b/trunk/arch/arm/mm/nommu.c index c085f4e8248b..07b62b238979 100644 --- a/trunk/arch/arm/mm/nommu.c +++ b/trunk/arch/arm/mm/nommu.c @@ -41,13 +41,27 @@ void __init reserve_node_zero(pg_data_t *pgdat) BOOTMEM_DEFAULT); } +static void __init sanity_check_meminfo(struct meminfo *mi) +{ + int i, j; + + for (i = 0, j = 0; i < mi->nr_banks; i++) { + struct membank *mb = &mi->bank[i]; + + if (mb->size != 0 && mb->node < MAX_NUMNODES) + mi->bank[j++] = mi->bank[i]; + } + mi->nr_banks = j; +} + /* * paging_init() sets up the page tables, initialises the zone memory * maps, and sets up the zero page, bad page and bad page tables. */ -void __init paging_init(struct machine_desc *mdesc) +void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) { - bootmem_init(); + sanity_check_meminfo(mi); + bootmem_init(mi); } /* diff --git a/trunk/arch/arm/mm/pgd.c b/trunk/arch/arm/mm/pgd.c index 2690146161ba..e0f19ab91163 100644 --- a/trunk/arch/arm/mm/pgd.c +++ b/trunk/arch/arm/mm/pgd.c @@ -31,7 +31,7 @@ pgd_t *get_pgd_slow(struct mm_struct *mm) if (!new_pgd) goto no_pgd; - memset(new_pgd, 0, FIRST_KERNEL_PGD_NR * sizeof(pgd_t)); + memzero(new_pgd, FIRST_KERNEL_PGD_NR * sizeof(pgd_t)); /* * Copy over the kernel and IO PGD entries diff --git a/trunk/arch/arm/mm/proc-syms.c b/trunk/arch/arm/mm/proc-syms.c index 4ad3bf291ad3..2b5ba396e3a6 100644 --- a/trunk/arch/arm/mm/proc-syms.c +++ b/trunk/arch/arm/mm/proc-syms.c @@ -33,8 +33,8 @@ EXPORT_SYMBOL(cpu_cache); #ifdef CONFIG_MMU #ifndef MULTI_USER -EXPORT_SYMBOL(__cpu_clear_user_highpage); -EXPORT_SYMBOL(__cpu_copy_user_highpage); +EXPORT_SYMBOL(__cpu_clear_user_page); +EXPORT_SYMBOL(__cpu_copy_user_page); #else EXPORT_SYMBOL(cpu_user); #endif diff --git a/trunk/arch/arm/mm/proc-v6.S b/trunk/arch/arm/mm/proc-v6.S index f0cc599facb7..294943b85973 100644 --- a/trunk/arch/arm/mm/proc-v6.S +++ b/trunk/arch/arm/mm/proc-v6.S @@ -71,8 +71,6 @@ ENTRY(cpu_v6_reset) * IRQs are already disabled. */ ENTRY(cpu_v6_do_idle) - mov r1, #0 - mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt mov pc, lr diff --git a/trunk/arch/arm/mm/proc-v7.S b/trunk/arch/arm/mm/proc-v7.S index d1ebec42521d..4d3c0a73e7fb 100644 --- a/trunk/arch/arm/mm/proc-v7.S +++ b/trunk/arch/arm/mm/proc-v7.S @@ -20,17 +20,9 @@ #define TTB_C (1 << 0) #define TTB_S (1 << 1) -#define TTB_RGN_NC (0 << 3) -#define TTB_RGN_OC_WBWA (1 << 3) #define TTB_RGN_OC_WT (2 << 3) #define TTB_RGN_OC_WB (3 << 3) -#ifndef CONFIG_SMP -#define TTB_FLAGS TTB_C|TTB_RGN_OC_WB @ mark PTWs cacheable, outer WB -#else -#define TTB_FLAGS TTB_C|TTB_S|TTB_RGN_OC_WBWA @ mark PTWs cacheable and shared, outer WBWA -#endif - ENTRY(cpu_v7_proc_init) mov pc, lr ENDPROC(cpu_v7_proc_init) @@ -63,7 +55,6 @@ ENDPROC(cpu_v7_reset) * IRQs are already disabled. */ ENTRY(cpu_v7_do_idle) - dsb @ WFI may enter a low-power mode wfi mov pc, lr ENDPROC(cpu_v7_do_idle) @@ -94,7 +85,7 @@ ENTRY(cpu_v7_switch_mm) #ifdef CONFIG_MMU mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - orr r0, r0, #TTB_FLAGS + orr r0, r0, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID isb 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 @@ -171,11 +162,6 @@ cpu_v7_name: * - cache type register is implemented */ __v7_setup: -#ifdef CONFIG_SMP - mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode - orr r0, r0, #(0x1 << 6) - mcr p15, 0, r0, c1, c0, 1 -#endif adr r12, __v7_setup_stack @ the local stack stmia r12, {r0-r5, r7, r9, r11, lr} bl v7_flush_dcache_all @@ -188,7 +174,8 @@ __v7_setup: #ifdef CONFIG_MMU mcr p15, 0, r10, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r10, c2, c0, 2 @ TTB control register - orr r4, r4, #TTB_FLAGS + orr r4, r4, #TTB_RGN_OC_WB @ mark PTWs outer cacheable, WB + mcr p15, 0, r4, c2, c0, 0 @ load TTB0 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 mov r10, #0x1f @ domains 0, 1 = manager mcr p15, 0, r10, c3, c0, 0 @ load domain access register diff --git a/trunk/arch/arm/plat-mxc/Kconfig b/trunk/arch/arm/plat-mxc/Kconfig index a1612958a59e..b2a7e3fad117 100644 --- a/trunk/arch/arm/plat-mxc/Kconfig +++ b/trunk/arch/arm/plat-mxc/Kconfig @@ -8,13 +8,11 @@ choice config ARCH_MX2 bool "MX2-based" - select CPU_ARM926T help This enables support for systems based on the Freescale i.MX2 family config ARCH_MX3 bool "MX3-based" - select CPU_V6 help This enables support for systems based on the Freescale i.MX3 family diff --git a/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c b/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c index 214274344442..b296f19fd89a 100644 --- a/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c +++ b/trunk/arch/arm/plat-mxc/dma-mx1-mx2.c @@ -34,7 +34,7 @@ #include #include #include -#include +#include #include #define DMA_DCR 0x00 /* Control Register */ diff --git a/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h b/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h index 6cc6f0c8cb25..e85fd946116c 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h +++ b/trunk/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h @@ -22,7 +22,7 @@ * MA 02110-1301, USA. */ -#include +#include #ifndef __ASM_ARCH_MXC_DMA_H #define __ASM_ARCH_MXC_DMA_H diff --git a/trunk/arch/arm/plat-mxc/include/mach/dma.h b/trunk/arch/arm/plat-mxc/include/mach/dma.h new file mode 100644 index 000000000000..c822d569a05e --- /dev/null +++ b/trunk/arch/arm/plat-mxc/include/mach/dma.h @@ -0,0 +1,14 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_DMA_H__ +#define __ASM_ARCH_MXC_DMA_H__ + +#endif diff --git a/trunk/arch/arm/plat-mxc/include/mach/io.h b/trunk/arch/arm/plat-mxc/include/mach/io.h index c0cb267e7403..5d4cb1196441 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/io.h +++ b/trunk/arch/arm/plat-mxc/include/mach/io.h @@ -35,8 +35,8 @@ __mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) #endif /* io address mapping macro */ -#define __io(a) __typesafe_io(a) +#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) +#define __mem_pci(a) (a) #endif diff --git a/trunk/arch/arm/plat-mxc/include/mach/memory.h b/trunk/arch/arm/plat-mxc/include/mach/memory.h index 203688e6164e..d7a8d3ebed57 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/memory.h +++ b/trunk/arch/arm/plat-mxc/include/mach/memory.h @@ -13,4 +13,17 @@ #include +/* + * Virtual view <-> DMA view memory address translations + * This macro is used to translate the virtual address to an address + * suitable to be passed to set_dma_addr() + */ +#define __virt_to_bus(a) __virt_to_phys(a) + +/* + * Used to convert an address for DMA operations to an address that the + * kernel can use. + */ +#define __bus_to_virt(a) __phys_to_virt(a) + #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ diff --git a/trunk/arch/arm/plat-omap/Kconfig b/trunk/arch/arm/plat-omap/Kconfig index 46d3b0b9ce69..a94f0c44ebc8 100644 --- a/trunk/arch/arm/plat-omap/Kconfig +++ b/trunk/arch/arm/plat-omap/Kconfig @@ -14,11 +14,9 @@ config ARCH_OMAP1 config ARCH_OMAP2 bool "TI OMAP2" - select CPU_V6 config ARCH_OMAP3 bool "TI OMAP3" - select CPU_V7 endchoice diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index 7686b9fa53f2..50f8b4ad9a09 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -29,7 +29,7 @@ #include #include -#include +#include #include diff --git a/trunk/arch/arm/plat-omap/gpio.c b/trunk/arch/arm/plat-omap/gpio.c index 424049d83fbe..8679fbca6bbe 100644 --- a/trunk/arch/arm/plat-omap/gpio.c +++ b/trunk/arch/arm/plat-omap/gpio.c @@ -101,7 +101,6 @@ #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 #define OMAP24XX_GPIO_IRQENABLE2 0x002c #define OMAP24XX_GPIO_IRQENABLE1 0x001c -#define OMAP24XX_GPIO_WAKE_EN 0x0020 #define OMAP24XX_GPIO_CTRL 0x0030 #define OMAP24XX_GPIO_OE 0x0034 #define OMAP24XX_GPIO_DATAIN 0x0038 @@ -1552,7 +1551,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) #endif #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) case METHOD_GPIO_24XX: - wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; + wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; break; @@ -1575,7 +1574,7 @@ static int omap_gpio_resume(struct sys_device *dev) { int i; - if (!cpu_class_is_omap2() && !cpu_is_omap16xx()) + if (!cpu_is_omap24xx() && !cpu_is_omap16xx()) return 0; for (i = 0; i < gpio_bank_count; i++) { diff --git a/trunk/arch/arm/plat-omap/include/mach/io.h b/trunk/arch/arm/plat-omap/include/mach/io.h index d92bf7964481..adc83b7b8205 100644 --- a/trunk/arch/arm/plat-omap/include/mach/io.h +++ b/trunk/arch/arm/plat-omap/include/mach/io.h @@ -42,8 +42,8 @@ * We don't actually have real ISA nor PCI buses, but there is so many * drivers out there that might just work if we fake them... */ -#define __io(a) __typesafe_io(a) -#define __mem_pci(a) (a) +#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) +#define __mem_pci(a) (a) /* * ---------------------------------------------------------------------------- @@ -51,6 +51,8 @@ * ---------------------------------------------------------------------------- */ +#define PCIO_BASE 0 + #if defined(CONFIG_ARCH_OMAP1) #define IO_PHYS 0xFFFB0000 diff --git a/trunk/arch/arm/plat-omap/include/mach/memory.h b/trunk/arch/arm/plat-omap/include/mach/memory.h index 211c9f6619e9..d40cac60b959 100644 --- a/trunk/arch/arm/plat-omap/include/mach/memory.h +++ b/trunk/arch/arm/plat-omap/include/mach/memory.h @@ -42,8 +42,19 @@ #define PHYS_OFFSET UL(0x80000000) #endif +/* + * Conversion between SDRAM and fake PCI bus, used by USB + * NOTE: Physical address must be converted to Local Bus address + * on OMAP-1510 only + */ + /* * Bus address is physical address, except for OMAP-1510 Local Bus. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +/* * OMAP-1510 bus address is translated into a Local Bus address if the * OMAP bus type is lbus. We do the address translation based on the * device overriding the defaults used in the dma-mapping API. @@ -63,16 +74,16 @@ #define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ (dma_addr_t)virt_to_lbus(page_address(page)) : \ - (dma_addr_t)__virt_to_phys(page_address(page));}) + (dma_addr_t)__virt_to_bus(page_address(page));}) #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ lbus_to_virt(addr) : \ - __phys_to_virt(addr)); }) + __bus_to_virt(addr)); }) #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ (dma_addr_t) (is_lbus_device(dev) ? \ virt_to_lbus(__addr) : \ - __virt_to_phys(__addr)); }) + __virt_to_bus(__addr)); }) #endif /* CONFIG_ARCH_OMAP15XX */ diff --git a/trunk/arch/arm/plat-omap/include/mach/pm.h b/trunk/arch/arm/plat-omap/include/mach/pm.h index 2a9c27ad4c37..768eb6e7abcf 100644 --- a/trunk/arch/arm/plat-omap/include/mach/pm.h +++ b/trunk/arch/arm/plat-omap/include/mach/pm.h @@ -128,7 +128,7 @@ void clk_deny_idle(struct clk *clk); * clk_allow_idle - Counters previous clk_deny_idle * @clk: clock signal handle */ -void clk_allow_idle(struct clk *clk); +void clk_deny_idle(struct clk *clk); extern void omap_pm_idle(void); extern void omap_pm_suspend(void); diff --git a/trunk/arch/arm/plat-s3c/include/plat/uncompress.h b/trunk/arch/arm/plat-s3c/include/plat/uncompress.h index 8a8a927292e0..4df006b9cc10 100644 --- a/trunk/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/trunk/arch/arm/plat-s3c/include/plat/uncompress.h @@ -28,7 +28,7 @@ static void arch_detect_cpu(void); /* defines for UART registers */ #include -#include +#include /* working in physical space... */ #undef S3C2410_WDOGREG diff --git a/trunk/arch/arm/plat-s3c24xx/common-smdk.c b/trunk/arch/arm/plat-s3c24xx/common-smdk.c index 3d4837021ac7..3098736c65d9 100644 --- a/trunk/arch/arm/plat-s3c24xx/common-smdk.c +++ b/trunk/arch/arm/plat-s3c24xx/common-smdk.c @@ -38,7 +38,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/arch/arm/plat-s3c24xx/devs.c b/trunk/arch/arm/plat-s3c24xx/devs.c index adf535aaf43a..e93f8bf6d338 100644 --- a/trunk/arch/arm/plat-s3c24xx/devs.c +++ b/trunk/arch/arm/plat-s3c24xx/devs.c @@ -29,11 +29,11 @@ #include #include -#include +#include #include #include -#include +#include /* Serial port registrations */ diff --git a/trunk/arch/arm/plat-s3c24xx/dma.c b/trunk/arch/arm/plat-s3c24xx/dma.c index 63bb22b973e3..1baf941d1930 100644 --- a/trunk/arch/arm/plat-s3c24xx/dma.c +++ b/trunk/arch/arm/plat-s3c24xx/dma.c @@ -31,8 +31,9 @@ #include #include #include -#include +#include +#include #include #include @@ -803,7 +804,7 @@ EXPORT_SYMBOL(s3c2410_dma_request); * allowed to go through. */ -int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client) +int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); unsigned long flags; @@ -994,7 +995,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan) } int -s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op) +s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); @@ -1042,7 +1043,7 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl); * dcon: base value of the DCONx register */ -int s3c2410_dma_config(unsigned int channel, +int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon) { @@ -1091,7 +1092,7 @@ int s3c2410_dma_config(unsigned int channel, EXPORT_SYMBOL(s3c2410_dma_config); -int s3c2410_dma_setflags(unsigned int channel, unsigned int flags) +int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); @@ -1112,7 +1113,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags); * irq? */ -int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn) +int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); @@ -1128,7 +1129,7 @@ int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn) EXPORT_SYMBOL(s3c2410_dma_set_opfn); -int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn) +int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); @@ -1218,7 +1219,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig); * returns the current transfer points for the dma source and destination */ -int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *dst) +int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); diff --git a/trunk/arch/arm/tools/mach-types b/trunk/arch/arm/tools/mach-types index fd23c0e9e698..43aa2020f85c 100644 --- a/trunk/arch/arm/tools/mach-types +++ b/trunk/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Sun Nov 30 16:39:36 2008 +# Last update: Thu Sep 25 10:10:50 2008 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -1380,7 +1380,7 @@ holon MACH_HOLON HOLON 1377 olip8 MACH_OLIP8 OLIP8 1378 ghi270hg MACH_GHI270HG GHI270HG 1379 davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 -davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381 +davinci_dm355_evm MACH_DAVINCI_DM350_EVM DAVINCI_DM350_EVM 1381 blackriver MACH_BLACKRIVER BLACKRIVER 1383 sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384 cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385 @@ -1771,7 +1771,7 @@ axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779 at572d940deb MACH_AT572D940DEB AT572D940DEB 1780 davinci_da8xx_evm MACH_DAVINCI_DA8XX_EVM DAVINCI_DA8XX_EVM 1781 ep9302 MACH_EP9302 EP9302 1782 -at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 +at572d940hfeb MACH_AT572D940HFEB AT572D940HFEB 1783 cybook3 MACH_CYBOOK3 CYBOOK3 1784 wdg002 MACH_WDG002 WDG002 1785 sg560adsl MACH_SG560ADSL SG560ADSL 1786 @@ -1899,98 +1899,3 @@ rut100 MACH_RUT100 RUT100 1908 asusp535 MACH_ASUSP535 ASUSP535 1909 htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910 sygdg1 MACH_SYGDG1 SYGDG1 1911 -sygdg2 MACH_SYGDG2 SYGDG2 1912 -seoul MACH_SEOUL SEOUL 1913 -salerno MACH_SALERNO SALERNO 1914 -ucn_s3c64xx MACH_UCN_S3C64XX UCN_S3C64XX 1915 -msm7201a MACH_MSM7201A MSM7201A 1916 -lpr1 MACH_LPR1 LPR1 1917 -armadillo500fx MACH_ARMADILLO500FX ARMADILLO500FX 1918 -g3evm MACH_G3EVM G3EVM 1919 -z3_dm355 MACH_Z3_DM355 Z3_DM355 1920 -w90p910evb MACH_W90P910EVB W90P910EVB 1921 -w90p920evb MACH_W90P920EVB W90P920EVB 1922 -w90p950evb MACH_W90P950EVB W90P950EVB 1923 -w90n960evb MACH_W90N960EVB W90N960EVB 1924 -camhd MACH_CAMHD CAMHD 1925 -mvc100 MACH_MVC100 MVC100 1926 -electrum_200 MACH_ELECTRUM_200 ELECTRUM_200 1927 -htcjade MACH_HTCJADE HTCJADE 1928 -memphis MACH_MEMPHIS MEMPHIS 1929 -imx27sbc MACH_IMX27SBC IMX27SBC 1930 -lextar MACH_LEXTAR LEXTAR 1931 -mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932 -ncp MACH_NCP NCP 1933 -z32an_series MACH_Z32AN Z32AN 1934 -tmq_capd MACH_TMQ_CAPD TMQ_CAPD 1935 -omap3_wl MACH_OMAP3_WL OMAP3_WL 1936 -chumby MACH_CHUMBY CHUMBY 1937 -atsarm9 MACH_ATSARM9 ATSARM9 1938 -davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939 -bahamas MACH_BAHAMAS BAHAMAS 1940 -das MACH_DAS DAS 1941 -minidas MACH_MINIDAS MINIDAS 1942 -vk1000 MACH_VK1000 VK1000 1943 -centro MACH_CENTRO CENTRO 1944 -ctera_2bay MACH_CTERA_2BAY CTERA_2BAY 1945 -edgeconnect MACH_EDGECONNECT EDGECONNECT 1946 -nd27000 MACH_ND27000 ND27000 1947 -cobra MACH_GEMALTO_COBRA GEMALTO_COBRA 1948 -ingelabs_comet MACH_INGELABS_COMET INGELABS_COMET 1949 -pollux_wiz MACH_POLLUX_WIZ POLLUX_WIZ 1950 -blackstone MACH_BLACKSTONE BLACKSTONE 1951 -topaz MACH_TOPAZ TOPAZ 1952 -aixle MACH_AIXLE AIXLE 1953 -mw998 MACH_MW998 MW998 1954 -nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955 -vsc5605ev MACH_VSC5605EV VSC5605EV 1956 -nt98700dk MACH_NT98700DK NT98700DK 1957 -icontact MACH_ICONTACT ICONTACT 1958 -swarco_frcpu MACH_SWARCO_FRCPU SWARCO_FRCPU 1959 -swarco_scpu MACH_SWARCO_SCPU SWARCO_SCPU 1960 -bbox_p16 MACH_BBOX_P16 BBOX_P16 1961 -bstd MACH_BSTD BSTD 1962 -sbc2440ii MACH_SBC2440II SBC2440II 1963 -pcm034 MACH_PCM034 PCM034 1964 -neso MACH_NESO NESO 1965 -wlnx_9g20 MACH_WLNX_9G20 WLNX_9G20 1966 -omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967 -totemnova MACH_TOTEMNOVA TOTEMNOVA 1968 -c5000 MACH_C5000 C5000 1969 -unipo_at91sam9263 MACH_UNIPO_AT91SAM9263 UNIPO_AT91SAM9263 1970 -ethernut5 MACH_ETHERNUT5 ETHERNUT5 1971 -arm11 MACH_ARM11 ARM11 1972 -cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 -cpupxa255 MACH_CPUPXA255 CPUPXA255 1974 -cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 -cheflux MACH_CHEFLUX CHEFLUX 1976 -eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977 -opcotec MACH_OPCOTEC OPCOTEC 1978 -yt MACH_YT YT 1979 -motoq MACH_MOTOQ MOTOQ 1980 -bsb1 MACH_BSB1 BSB1 1981 -acs5k MACH_ACS5K ACS5K 1982 -milan MACH_MILAN MILAN 1983 -quartzv2 MACH_QUARTZV2 QUARTZV2 1984 -rsvp MACH_RSVP RSVP 1985 -rmp200 MACH_RMP200 RMP200 1986 -snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987 -dsm320 MACH_DSM320 DSM320 1988 -adsgcm MACH_ADSGCM ADSGCM 1989 -ase2_400 MACH_ASE2_400 ASE2_400 1990 -pizza MACH_PIZZA PIZZA 1991 -spot_ngpl MACH_SPOT_NGPL SPOT_NGPL 1992 -armata MACH_ARMATA ARMATA 1993 -exeda MACH_EXEDA EXEDA 1994 -mx31sf005 MACH_MX31SF005 MX31SF005 1995 -f5d8231_4_v2 MACH_F5D8231_4_V2 F5D8231_4_V2 1996 -q2440 MACH_Q2440 Q2440 1997 -qq2440 MACH_QQ2440 QQ2440 1998 -mini2440 MACH_MINI2440 MINI2440 1999 -colibri300 MACH_COLIBRI300 COLIBRI300 2000 -jades MACH_JADES JADES 2001 -spark MACH_SPARK SPARK 2002 -benzina MACH_BENZINA BENZINA 2003 -blaze MACH_BLAZE BLAZE 2004 -linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 -htcvenus MACH_HTCVENUS HTCVENUS 2006 diff --git a/trunk/arch/arm/vfp/vfphw.S b/trunk/arch/arm/vfp/vfphw.S index 3c73aafe3e01..a62dcf7098ba 100644 --- a/trunk/arch/arm/vfp/vfphw.S +++ b/trunk/arch/arm/vfp/vfphw.S @@ -101,12 +101,9 @@ ENTRY(vfp_support_entry) VFPFSTMIA r4, r5 @ save the working registers VFPFMRX r5, FPSCR @ current status tst r1, #FPEXC_EX @ is there additional state to save? - beq 1f - VFPFMRX r6, FPINST @ FPINST (only if FPEXC.EX is set) - tst r1, #FPEXC_FP2V @ is there an FPINST2 to read? - beq 1f - VFPFMRX r8, FPINST2 @ FPINST2 if needed (and present) -1: + VFPFMRX r6, FPINST, NE @ FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? + VFPFMRX r8, FPINST2, NE @ FPINST2 if needed (and present) stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 @ and point r4 at the word at the @ start of the register dump @@ -120,12 +117,9 @@ no_old_VFP_process: @ FPEXC is in a safe state ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 tst r1, #FPEXC_EX @ is there additional state to restore? - beq 1f - VFPFMXR FPINST, r6 @ restore FPINST (only if FPEXC.EX is set) - tst r1, #FPEXC_FP2V @ is there an FPINST2 to write? - beq 1f - VFPFMXR FPINST2, r8 @ FPINST2 if needed (and present) -1: + VFPFMXR FPINST, r6, NE @ restore FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to write? + VFPFMXR FPINST2, r8, NE @ FPINST2 if needed (and present) VFPFMXR FPSCR, r5 @ restore status check_for_exception: @@ -181,12 +175,9 @@ ENTRY(vfp_save_state) VFPFSTMIA r0, r2 @ save the working registers VFPFMRX r2, FPSCR @ current status tst r1, #FPEXC_EX @ is there additional state to save? - beq 1f - VFPFMRX r3, FPINST @ FPINST (only if FPEXC.EX is set) - tst r1, #FPEXC_FP2V @ is there an FPINST2 to read? - beq 1f - VFPFMRX r12, FPINST2 @ FPINST2 if needed (and present) -1: + VFPFMRX r3, FPINST, NE @ FPINST (only if FPEXC.EX is set) + tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? + VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 mov pc, lr ENDPROC(vfp_save_state) diff --git a/trunk/arch/arm/vfp/vfpmodule.c b/trunk/arch/arm/vfp/vfpmodule.c index 67ca340a7c85..c0d2c9bb952b 100644 --- a/trunk/arch/arm/vfp/vfpmodule.c +++ b/trunk/arch/arm/vfp/vfpmodule.c @@ -371,15 +371,6 @@ static int __init vfp_init(void) * in place; report VFP support to userspace. */ elf_hwcap |= HWCAP_VFP; -#ifdef CONFIG_NEON - /* - * Check for the presence of the Advanced SIMD - * load/store instructions, integer and single - * precision floating point operations. - */ - if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100) - elf_hwcap |= HWCAP_NEON; -#endif } return 0; } diff --git a/trunk/drivers/i2c/busses/i2c-s3c2410.c b/trunk/drivers/i2c/busses/i2c-s3c2410.c index fdebd930408e..1fac4e233133 100644 --- a/trunk/drivers/i2c/busses/i2c-s3c2410.c +++ b/trunk/drivers/i2c/busses/i2c-s3c2410.c @@ -40,8 +40,8 @@ #include #include -#include -#include +#include +#include /* i2c controller state */ diff --git a/trunk/drivers/ide/Kconfig b/trunk/drivers/ide/Kconfig index 57630402ea67..6d7401772a8f 100644 --- a/trunk/drivers/ide/Kconfig +++ b/trunk/drivers/ide/Kconfig @@ -732,7 +732,7 @@ config BLK_DEV_IDE_TX4939 config IDE_ARM tristate "ARM IDE support" - depends on ARM && (ARCH_RPC || ARCH_SHARK) + depends on ARM && (ARCH_CLPS7500 || ARCH_RPC || ARCH_SHARK) default y config BLK_DEV_IDE_ICSIDE diff --git a/trunk/drivers/ide/ide_arm.c b/trunk/drivers/ide/ide_arm.c index bdcac94d7c1f..f728f2927b5a 100644 --- a/trunk/drivers/ide/ide_arm.c +++ b/trunk/drivers/ide/ide_arm.c @@ -15,8 +15,15 @@ #define DRV_NAME "ide_arm" -#define IDE_ARM_IO 0x1f0 -#define IDE_ARM_IRQ IRQ_HARDDISK +#ifdef CONFIG_ARCH_CLPS7500 +# include +# +# define IDE_ARM_IO (ISASLOT_IO + 0x1f0) +# define IDE_ARM_IRQ IRQ_ISA_14 +#else +# define IDE_ARM_IO 0x1f0 +# define IDE_ARM_IRQ IRQ_HARDDISK +#endif static int __init ide_arm_init(void) { diff --git a/trunk/drivers/input/serio/Kconfig b/trunk/drivers/input/serio/Kconfig index da3c3a5d2689..27d70d326ff3 100644 --- a/trunk/drivers/input/serio/Kconfig +++ b/trunk/drivers/input/serio/Kconfig @@ -79,7 +79,7 @@ config SERIO_PARKBD config SERIO_RPCKBD tristate "Acorn RiscPC keyboard controller" - depends on ARCH_ACORN + depends on ARCH_ACORN || ARCH_CLPS7500 default y help Say Y here if you have the Acorn RiscPC and want to use an AT diff --git a/trunk/drivers/mfd/asic3.c b/trunk/drivers/mfd/asic3.c index 9e485459f63b..e4c0db4dc7b1 100644 --- a/trunk/drivers/mfd/asic3.c +++ b/trunk/drivers/mfd/asic3.c @@ -474,9 +474,9 @@ static __init int asic3_gpio_probe(struct platform_device *pdev, u16 dir_reg[ASIC3_NUM_GPIO_BANKS]; int i; - memset(alt_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); - memset(out_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); - memset(dir_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); + memzero(alt_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); + memzero(out_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); + memzero(dir_reg, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); /* Enable all GPIOs */ asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); diff --git a/trunk/drivers/mfd/mcp-core.c b/trunk/drivers/mfd/mcp-core.c index 6063dc2b52e8..b4ed57e02729 100644 --- a/trunk/drivers/mfd/mcp-core.c +++ b/trunk/drivers/mfd/mcp-core.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include #include "mcp.h" diff --git a/trunk/drivers/mfd/mcp-sa11x0.c b/trunk/drivers/mfd/mcp-sa11x0.c index 62b32dabf629..28380b20bc70 100644 --- a/trunk/drivers/mfd/mcp-sa11x0.c +++ b/trunk/drivers/mfd/mcp-sa11x0.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include #include #include diff --git a/trunk/drivers/mfd/ucb1x00-assabet.c b/trunk/drivers/mfd/ucb1x00-assabet.c index 86fed4870f93..61aeaf79640d 100644 --- a/trunk/drivers/mfd/ucb1x00-assabet.c +++ b/trunk/drivers/mfd/ucb1x00-assabet.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include "ucb1x00.h" diff --git a/trunk/drivers/mfd/ucb1x00-core.c b/trunk/drivers/mfd/ucb1x00-core.c index 6860c924f364..a316f1b75933 100644 --- a/trunk/drivers/mfd/ucb1x00-core.c +++ b/trunk/drivers/mfd/ucb1x00-core.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include "ucb1x00.h" diff --git a/trunk/drivers/mfd/ucb1x00-ts.c b/trunk/drivers/mfd/ucb1x00-ts.c index 61b7d3eb9a2f..44762ca86a8d 100644 --- a/trunk/drivers/mfd/ucb1x00-ts.c +++ b/trunk/drivers/mfd/ucb1x00-ts.c @@ -31,7 +31,7 @@ #include #include -#include +#include #include #include diff --git a/trunk/drivers/mmc/host/pxamci.c b/trunk/drivers/mmc/host/pxamci.c index f88cc7406354..a1700a80e2fd 100644 --- a/trunk/drivers/mmc/host/pxamci.c +++ b/trunk/drivers/mmc/host/pxamci.c @@ -26,12 +26,11 @@ #include #include #include -#include +#include +#include #include -#include -#include #include #include diff --git a/trunk/drivers/mmc/host/s3cmci.c b/trunk/drivers/mmc/host/s3cmci.c index fcc98a4cce3c..3b2085b57769 100644 --- a/trunk/drivers/mmc/host/s3cmci.c +++ b/trunk/drivers/mmc/host/s3cmci.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include "s3cmci.h" diff --git a/trunk/drivers/mtd/maps/ixp2000.c b/trunk/drivers/mtd/maps/ixp2000.c index 3ea1de9be720..dcdb1f17577d 100644 --- a/trunk/drivers/mtd/maps/ixp2000.c +++ b/trunk/drivers/mtd/maps/ixp2000.c @@ -170,7 +170,7 @@ static int ixp2000_flash_probe(struct platform_device *dev) err = -ENOMEM; goto Error; } - memset(info, 0, sizeof(struct ixp2000_flash_info)); + memzero(info, sizeof(struct ixp2000_flash_info)); platform_set_drvdata(dev, info); diff --git a/trunk/drivers/mtd/maps/ixp4xx.c b/trunk/drivers/mtd/maps/ixp4xx.c index 16555cbeaea4..9c7a5fbd4e51 100644 --- a/trunk/drivers/mtd/maps/ixp4xx.c +++ b/trunk/drivers/mtd/maps/ixp4xx.c @@ -201,7 +201,7 @@ static int ixp4xx_flash_probe(struct platform_device *dev) err = -ENOMEM; goto Error; } - memset(info, 0, sizeof(struct ixp4xx_flash_info)); + memzero(info, sizeof(struct ixp4xx_flash_info)); platform_set_drvdata(dev, info); diff --git a/trunk/drivers/mtd/nand/s3c2410.c b/trunk/drivers/mtd/nand/s3c2410.c index 8e375d5fe231..556139ed1fdf 100644 --- a/trunk/drivers/mtd/nand/s3c2410.c +++ b/trunk/drivers/mtd/nand/s3c2410.c @@ -45,8 +45,8 @@ #include -#include -#include +#include +#include #ifdef CONFIG_MTD_NAND_S3C2410_HWECC static int hardware_ecc = 1; @@ -818,7 +818,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, goto exit_error; } - memset(info, 0, sizeof(*info)); + memzero(info, sizeof(*info)); platform_set_drvdata(pdev, info); spin_lock_init(&info->controller.lock); @@ -883,7 +883,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, goto exit_error; } - memset(info->mtds, 0, size); + memzero(info->mtds, size); /* initialise all possible chips */ diff --git a/trunk/drivers/net/cs89x0.c b/trunk/drivers/net/cs89x0.c index 0b729f7d91fc..7107620f615d 100644 --- a/trunk/drivers/net/cs89x0.c +++ b/trunk/drivers/net/cs89x0.c @@ -170,7 +170,11 @@ static char version[] __initdata = /* The cs8900 has 4 IRQ pins, software selectable. cs8900_irq_map maps them to system IRQ numbers. This mapping is card specific and is set to the configuration of the Cirrus Eval board for this chip. */ -#if defined(CONFIG_SH_HICOSH4) +#ifdef CONFIG_ARCH_CLPS7500 +static unsigned int netcard_portlist[] __used __initdata = + { 0x80090303, 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; +static unsigned int cs8900_irq_map[] = {12,0,0,0}; +#elif defined(CONFIG_SH_HICOSH4) static unsigned int netcard_portlist[] __used __initdata = { 0x0300, 0}; static unsigned int cs8900_irq_map[] = {1,0,0,0}; diff --git a/trunk/drivers/net/irda/pxaficp_ir.c b/trunk/drivers/net/irda/pxaficp_ir.c index 37424f01ebee..c5b02b66f756 100644 --- a/trunk/drivers/net/irda/pxaficp_ir.c +++ b/trunk/drivers/net/irda/pxaficp_ir.c @@ -22,9 +22,8 @@ #include #include -#include +#include #include -#include #include #define IrSR_RXPL_NEG_IS_ZERO (1<<4) diff --git a/trunk/drivers/net/smc91x.h b/trunk/drivers/net/smc91x.h index 37e2cb4f4f88..a07cc9351c6b 100644 --- a/trunk/drivers/net/smc91x.h +++ b/trunk/drivers/net/smc91x.h @@ -527,8 +527,7 @@ struct smc_local { * as RX which can overrun memory and lose packets. */ #include -#include -#include +#include #include #ifdef SMC_insl diff --git a/trunk/drivers/rtc/rtc-s3c.c b/trunk/drivers/rtc/rtc-s3c.c index 7a568beba3f0..f59277bbedaa 100644 --- a/trunk/drivers/rtc/rtc-s3c.c +++ b/trunk/drivers/rtc/rtc-s3c.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include /* I have yet to find an S3C implementation with more than one * of these rtc blocks in */ diff --git a/trunk/drivers/serial/serial_lh7a40x.c b/trunk/drivers/serial/serial_lh7a40x.c index a7bf024a8286..61dc8b3daa26 100644 --- a/trunk/drivers/serial/serial_lh7a40x.c +++ b/trunk/drivers/serial/serial_lh7a40x.c @@ -41,10 +41,9 @@ #include #include #include -#include +#include #include -#include #define DEV_MAJOR 204 #define DEV_MINOR 16 diff --git a/trunk/drivers/spi/pxa2xx_spi.c b/trunk/drivers/spi/pxa2xx_spi.c index 6104f461a3cd..cf12f2d84be2 100644 --- a/trunk/drivers/spi/pxa2xx_spi.c +++ b/trunk/drivers/spi/pxa2xx_spi.c @@ -32,8 +32,8 @@ #include #include #include +#include -#include #include #include #include diff --git a/trunk/drivers/spi/spi_s3c24xx.c b/trunk/drivers/spi/spi_s3c24xx.c index 256d18395a23..c252cbac00f1 100644 --- a/trunk/drivers/spi/spi_s3c24xx.c +++ b/trunk/drivers/spi/spi_s3c24xx.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include struct s3c24xx_spi { diff --git a/trunk/drivers/usb/gadget/pxa25x_udc.c b/trunk/drivers/usb/gadget/pxa25x_udc.c index 8c5026be79d4..a4790f3c7cd3 100644 --- a/trunk/drivers/usb/gadget/pxa25x_udc.c +++ b/trunk/drivers/usb/gadget/pxa25x_udc.c @@ -141,11 +141,7 @@ static int is_vbus_present(void) if (mach->gpio_vbus) { int value = gpio_get_value(mach->gpio_vbus); - - if (mach->gpio_vbus_inverted) - return !value; - else - return !!value; + return mach->gpio_vbus_inverted ? !value : value; } if (mach->udc_is_connected) return mach->udc_is_connected(); @@ -986,7 +982,7 @@ static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) struct pxa25x_udc *udc; udc = container_of(_gadget, struct pxa25x_udc, gadget); - udc->vbus = is_active; + udc->vbus = (is_active != 0); DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); pullup(udc); return 0; @@ -1403,8 +1399,12 @@ lubbock_vbus_irq(int irq, void *_dev) static irqreturn_t udc_vbus_irq(int irq, void *_dev) { struct pxa25x_udc *dev = _dev; + int vbus = gpio_get_value(dev->mach->gpio_vbus); - pxa25x_udc_vbus_session(&dev->gadget, is_vbus_present()); + if (dev->mach->gpio_vbus_inverted) + vbus = !vbus; + + pxa25x_udc_vbus_session(&dev->gadget, vbus); return IRQ_HANDLED; } diff --git a/trunk/drivers/usb/gadget/s3c2410_udc.c b/trunk/drivers/usb/gadget/s3c2410_udc.c index 8d8d65165983..00ba06b44752 100644 --- a/trunk/drivers/usb/gadget/s3c2410_udc.c +++ b/trunk/drivers/usb/gadget/s3c2410_udc.c @@ -53,8 +53,8 @@ #include #include -#include -#include +#include +#include #include "s3c2410_udc.h" diff --git a/trunk/drivers/video/Kconfig b/trunk/drivers/video/Kconfig index 237301849075..3f3ce13fef43 100644 --- a/trunk/drivers/video/Kconfig +++ b/trunk/drivers/video/Kconfig @@ -362,7 +362,7 @@ endchoice config FB_ACORN bool "Acorn VIDC support" - depends on (FB = y) && ARM && ARCH_ACORN + depends on (FB = y) && ARM && (ARCH_ACORN || ARCH_CLPS7500) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT diff --git a/trunk/drivers/video/amba-clcd.c b/trunk/drivers/video/amba-clcd.c index 70ba1bd845fb..a7a1c891bfa2 100644 --- a/trunk/drivers/video/amba-clcd.c +++ b/trunk/drivers/video/amba-clcd.c @@ -350,7 +350,7 @@ static int clcdfb_register(struct clcd_fb *fb) } fb->fb.fix.mmio_start = fb->dev->res.start; - fb->fb.fix.mmio_len = 4096; + fb->fb.fix.mmio_len = SZ_4K; fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len); if (!fb->regs) { diff --git a/trunk/drivers/video/omap/Makefile b/trunk/drivers/video/omap/Makefile index ed13889c1162..99da8b6d2c36 100644 --- a/trunk/drivers/video/omap/Makefile +++ b/trunk/drivers/video/omap/Makefile @@ -23,6 +23,7 @@ objs-y$(CONFIG_MACH_OMAP_PALMZ71) += lcd_palmz71.o objs-$(CONFIG_ARCH_OMAP16XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1610.o objs-$(CONFIG_ARCH_OMAP15XX)$(CONFIG_MACH_OMAP_INNOVATOR) += lcd_inn1510.o objs-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o +objs-y$(CONFIG_MACH_SX1) += lcd_sx1.o omapfb-objs := $(objs-yy) diff --git a/trunk/drivers/video/omap/lcd_sx1.c b/trunk/drivers/video/omap/lcd_sx1.c new file mode 100644 index 000000000000..e55de201b8ff --- /dev/null +++ b/trunk/drivers/video/omap/lcd_sx1.c @@ -0,0 +1,327 @@ +/* + * LCD panel support for the Siemens SX1 mobile phone + * + * Current version : Vovan888@gmail.com, great help from FCA00000 + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * OMAP310 GPIO registers + */ +#define GPIO_DATA_INPUT 0xfffce000 +#define GPIO_DATA_OUTPUT 0xfffce004 +#define GPIO_DIR_CONTROL 0xfffce008 +#define GPIO_INT_CONTROL 0xfffce00c +#define GPIO_INT_MASK 0xfffce010 +#define GPIO_INT_STATUS 0xfffce014 +#define GPIO_PIN_CONTROL 0xfffce018 + + +#define A_LCD_SSC_RD 3 +#define A_LCD_SSC_SD 7 +#define _A_LCD_RESET 9 +#define _A_LCD_SSC_CS 12 +#define _A_LCD_SSC_A0 13 + +#define DSP_REG 0xE1017024 + +const unsigned char INIT_1[12] = { + 0x1C, 0x02, 0x88, 0x00, 0x1E, 0xE0, 0x00, 0xDC, 0x00, 0x02, 0x00 +}; + +const unsigned char INIT_2[127] = { + 0x15, 0x00, 0x29, 0x00, 0x3E, 0x00, 0x51, 0x00, + 0x65, 0x00, 0x7A, 0x00, 0x8D, 0x00, 0xA1, 0x00, + 0xB6, 0x00, 0xC7, 0x00, 0xD8, 0x00, 0xEB, 0x00, + 0xFB, 0x00, 0x0B, 0x01, 0x1B, 0x01, 0x27, 0x01, + 0x34, 0x01, 0x41, 0x01, 0x4C, 0x01, 0x55, 0x01, + 0x5F, 0x01, 0x68, 0x01, 0x70, 0x01, 0x78, 0x01, + 0x7E, 0x01, 0x86, 0x01, 0x8C, 0x01, 0x94, 0x01, + 0x9B, 0x01, 0xA1, 0x01, 0xA4, 0x01, 0xA9, 0x01, + 0xAD, 0x01, 0xB2, 0x01, 0xB7, 0x01, 0xBC, 0x01, + 0xC0, 0x01, 0xC4, 0x01, 0xC8, 0x01, 0xCB, 0x01, + 0xCF, 0x01, 0xD2, 0x01, 0xD5, 0x01, 0xD8, 0x01, + 0xDB, 0x01, 0xE0, 0x01, 0xE3, 0x01, 0xE6, 0x01, + 0xE8, 0x01, 0xEB, 0x01, 0xEE, 0x01, 0xF1, 0x01, + 0xF3, 0x01, 0xF8, 0x01, 0xF9, 0x01, 0xFC, 0x01, + 0x00, 0x02, 0x03, 0x02, 0x07, 0x02, 0x09, 0x02, + 0x0E, 0x02, 0x13, 0x02, 0x1C, 0x02, 0x00 +}; + +const unsigned char INIT_3[15] = { + 0x14, 0x26, 0x33, 0x3D, 0x45, 0x4D, 0x53, 0x59, + 0x5E, 0x63, 0x67, 0x6D, 0x71, 0x78, 0xFF +}; + +static void epson_sendbyte(int flag, unsigned char byte) +{ + int i, shifter = 0x80; + + if (!flag) + gpio_set_value(_A_LCD_SSC_A0, 0); + mdelay(2); + gpio_set_value(A_LCD_SSC_RD, 1); + + gpio_set_value(A_LCD_SSC_SD, flag); + + OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200); + OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202); + for (i = 0; i < 8; i++) { + OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200); + gpio_set_value(A_LCD_SSC_SD, shifter & byte); + OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202); + shifter >>= 1; + } + gpio_set_value(_A_LCD_SSC_A0, 1); +} + +static void init_system(void) +{ + omap_mcbsp_request(OMAP_MCBSP3); + omap_mcbsp_stop(OMAP_MCBSP3); +} + +static void setup_GPIO(void) +{ + /* new wave */ + gpio_request(A_LCD_SSC_RD, "lcd_ssc_rd"); + gpio_request(A_LCD_SSC_SD, "lcd_ssc_sd"); + gpio_request(_A_LCD_RESET, "lcd_reset"); + gpio_request(_A_LCD_SSC_CS, "lcd_ssc_cs"); + gpio_request(_A_LCD_SSC_A0, "lcd_ssc_a0"); + + /* set GPIOs to output, with initial data */ + gpio_direction_output(A_LCD_SSC_RD, 1); + gpio_direction_output(A_LCD_SSC_SD, 0); + gpio_direction_output(_A_LCD_RESET, 0); + gpio_direction_output(_A_LCD_SSC_CS, 1); + gpio_direction_output(_A_LCD_SSC_A0, 1); +} + +static void display_init(void) +{ + int i; + + omap_cfg_reg(MCBSP3_CLKX); + + mdelay(2); + setup_GPIO(); + mdelay(2); + + /* reset LCD */ + gpio_set_value(A_LCD_SSC_SD, 1); + epson_sendbyte(0, 0x25); + + gpio_set_value(_A_LCD_RESET, 0); + mdelay(10); + gpio_set_value(_A_LCD_RESET, 1); + + gpio_set_value(_A_LCD_SSC_CS, 1); + mdelay(2); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD, phase 1 */ + epson_sendbyte(0, 0xCA); + for (i = 0; i < 10; i++) + epson_sendbyte(1, INIT_1[i]); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 2 */ + epson_sendbyte(0, 0xCB); + for (i = 0; i < 125; i++) + epson_sendbyte(1, INIT_2[i]); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 2a */ + epson_sendbyte(0, 0xCC); + for (i = 0; i < 14; i++) + epson_sendbyte(1, INIT_3[i]); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 3 */ + epson_sendbyte(0, 0xBC); + epson_sendbyte(1, 0x08); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 4 */ + epson_sendbyte(0, 0x07); + epson_sendbyte(1, 0x05); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 5 */ + epson_sendbyte(0, 0x94); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 6 */ + epson_sendbyte(0, 0xC6); + epson_sendbyte(1, 0x80); + gpio_set_value(_A_LCD_SSC_CS, 1); + mdelay(100); /* used to be 1000 */ + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 7 */ + epson_sendbyte(0, 0x16); + epson_sendbyte(1, 0x02); + epson_sendbyte(1, 0x00); + epson_sendbyte(1, 0xB1); + epson_sendbyte(1, 0x00); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 8 */ + epson_sendbyte(0, 0x76); + epson_sendbyte(1, 0x00); + epson_sendbyte(1, 0x00); + epson_sendbyte(1, 0xDB); + epson_sendbyte(1, 0x00); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); + + /* init LCD phase 9 */ + epson_sendbyte(0, 0xAF); + gpio_set_value(_A_LCD_SSC_CS, 1); +} + +static int sx1_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev) +{ + return 0; +} + +static void sx1_panel_cleanup(struct lcd_panel *panel) +{ +} + +static void sx1_panel_disable(struct lcd_panel *panel) +{ + printk(KERN_INFO "SX1: LCD panel disable\n"); + sx1_setmmipower(0); + gpio_set_value(_A_LCD_SSC_CS, 1); + + epson_sendbyte(0, 0x25); + gpio_set_value(_A_LCD_SSC_CS, 0); + + epson_sendbyte(0, 0xAE); + gpio_set_value(_A_LCD_SSC_CS, 1); + mdelay(100); + gpio_set_value(_A_LCD_SSC_CS, 0); + + epson_sendbyte(0, 0x95); + gpio_set_value(_A_LCD_SSC_CS, 1); +} + +static int sx1_panel_enable(struct lcd_panel *panel) +{ + printk(KERN_INFO "lcd_sx1: LCD panel enable\n"); + init_system(); + display_init(); + + sx1_setmmipower(1); + sx1_setbacklight(0x18); + sx1_setkeylight (0x06); + return 0; +} + + +static unsigned long sx1_panel_get_caps(struct lcd_panel *panel) +{ + return 0; +} + +struct lcd_panel sx1_panel = { + .name = "sx1", + .config = OMAP_LCDC_PANEL_TFT | OMAP_LCDC_INV_VSYNC | + OMAP_LCDC_INV_HSYNC | OMAP_LCDC_INV_PIX_CLOCK | + OMAP_LCDC_INV_OUTPUT_EN, + + .x_res = 176, + .y_res = 220, + .data_lines = 16, + .bpp = 16, + .hsw = 5, + .hfp = 5, + .hbp = 5, + .vsw = 2, + .vfp = 1, + .vbp = 1, + .pixel_clock = 1500, + + .init = sx1_panel_init, + .cleanup = sx1_panel_cleanup, + .enable = sx1_panel_enable, + .disable = sx1_panel_disable, + .get_caps = sx1_panel_get_caps, +}; + +static int sx1_panel_probe(struct platform_device *pdev) +{ + omapfb_register_panel(&sx1_panel); + return 0; +} + +static int sx1_panel_remove(struct platform_device *pdev) +{ + return 0; +} + +static int sx1_panel_suspend(struct platform_device *pdev, pm_message_t mesg) +{ + return 0; +} + +static int sx1_panel_resume(struct platform_device *pdev) +{ + return 0; +} + +struct platform_driver sx1_panel_driver = { + .probe = sx1_panel_probe, + .remove = sx1_panel_remove, + .suspend = sx1_panel_suspend, + .resume = sx1_panel_resume, + .driver = { + .name = "lcd_sx1", + .owner = THIS_MODULE, + }, +}; + +static int sx1_panel_drv_init(void) +{ + return platform_driver_register(&sx1_panel_driver); +} + +static void sx1_panel_drv_cleanup(void) +{ + platform_driver_unregister(&sx1_panel_driver); +} + +module_init(sx1_panel_drv_init); +module_exit(sx1_panel_drv_cleanup); diff --git a/trunk/drivers/video/sa1100fb.c b/trunk/drivers/video/sa1100fb.c index 076f946fa0f5..c052bd4c0b06 100644 --- a/trunk/drivers/video/sa1100fb.c +++ b/trunk/drivers/video/sa1100fb.c @@ -114,7 +114,7 @@ * - convert dma address types to dma_addr_t * - remove unused 'montype' stuff * - remove redundant zero inits of init_var after the initial - * memset. + * memzero. * - remove allow_modeset (acornfb idea does not belong here) * * 2001/05/28: diff --git a/trunk/drivers/watchdog/s3c2410_wdt.c b/trunk/drivers/watchdog/s3c2410_wdt.c index e31925ee8346..f7f6ce82a5e2 100644 --- a/trunk/drivers/watchdog/s3c2410_wdt.c +++ b/trunk/drivers/watchdog/s3c2410_wdt.c @@ -42,7 +42,7 @@ #undef S3C_VA_WATCHDOG #define S3C_VA_WATCHDOG (0) -#include +#include #define PFX "s3c2410-wdt: " diff --git a/trunk/drivers/watchdog/sa1100_wdt.c b/trunk/drivers/watchdog/sa1100_wdt.c index d6fbb4657210..ed01e4c2beff 100644 --- a/trunk/drivers/watchdog/sa1100_wdt.c +++ b/trunk/drivers/watchdog/sa1100_wdt.c @@ -27,7 +27,6 @@ #include #include #include -#include #ifdef CONFIG_ARCH_PXA #include diff --git a/trunk/arch/arm/plat-s3c/include/plat/iic.h b/trunk/include/asm-arm/plat-s3c/iic.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/iic.h rename to trunk/include/asm-arm/plat-s3c/iic.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/nand.h b/trunk/include/asm-arm/plat-s3c/nand.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/nand.h rename to trunk/include/asm-arm/plat-s3c/nand.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/regs-ac97.h b/trunk/include/asm-arm/plat-s3c/regs-ac97.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/regs-ac97.h rename to trunk/include/asm-arm/plat-s3c/regs-ac97.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/regs-iic.h b/trunk/include/asm-arm/plat-s3c/regs-iic.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/regs-iic.h rename to trunk/include/asm-arm/plat-s3c/regs-iic.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/regs-nand.h b/trunk/include/asm-arm/plat-s3c/regs-nand.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/regs-nand.h rename to trunk/include/asm-arm/plat-s3c/regs-nand.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/regs-rtc.h b/trunk/include/asm-arm/plat-s3c/regs-rtc.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/regs-rtc.h rename to trunk/include/asm-arm/plat-s3c/regs-rtc.h diff --git a/trunk/arch/arm/plat-s3c/include/plat/regs-watchdog.h b/trunk/include/asm-arm/plat-s3c/regs-watchdog.h similarity index 100% rename from trunk/arch/arm/plat-s3c/include/plat/regs-watchdog.h rename to trunk/include/asm-arm/plat-s3c/regs-watchdog.h diff --git a/trunk/arch/arm/plat-s3c24xx/include/plat/mci.h b/trunk/include/asm-arm/plat-s3c24xx/mci.h similarity index 100% rename from trunk/arch/arm/plat-s3c24xx/include/plat/mci.h rename to trunk/include/asm-arm/plat-s3c24xx/mci.h diff --git a/trunk/arch/arm/plat-s3c24xx/include/plat/regs-spi.h b/trunk/include/asm-arm/plat-s3c24xx/regs-spi.h similarity index 100% rename from trunk/arch/arm/plat-s3c24xx/include/plat/regs-spi.h rename to trunk/include/asm-arm/plat-s3c24xx/regs-spi.h diff --git a/trunk/arch/arm/plat-s3c24xx/include/plat/regs-udc.h b/trunk/include/asm-arm/plat-s3c24xx/regs-udc.h similarity index 100% rename from trunk/arch/arm/plat-s3c24xx/include/plat/regs-udc.h rename to trunk/include/asm-arm/plat-s3c24xx/regs-udc.h diff --git a/trunk/arch/arm/plat-s3c24xx/include/plat/udc.h b/trunk/include/asm-arm/plat-s3c24xx/udc.h similarity index 100% rename from trunk/arch/arm/plat-s3c24xx/include/plat/udc.h rename to trunk/include/asm-arm/plat-s3c24xx/udc.h diff --git a/trunk/include/linux/highmem.h b/trunk/include/linux/highmem.h index 13875ce9112a..7dcbc82f3b7b 100644 --- a/trunk/include/linux/highmem.h +++ b/trunk/include/linux/highmem.h @@ -63,14 +63,12 @@ static inline void *kmap_atomic(struct page *page, enum km_type idx) #endif /* CONFIG_HIGHMEM */ /* when CONFIG_HIGHMEM is not set these will be plain clear/copy_page */ -#ifndef clear_user_highpage static inline void clear_user_highpage(struct page *page, unsigned long vaddr) { void *addr = kmap_atomic(page, KM_USER0); clear_user_page(addr, vaddr, page); kunmap_atomic(addr, KM_USER0); } -#endif #ifndef __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE /** diff --git a/trunk/sound/soc/s3c24xx/s3c2443-ac97.c b/trunk/sound/soc/s3c24xx/s3c2443-ac97.c index c473a3b97b55..19c5c3cf5d8c 100644 --- a/trunk/sound/soc/s3c24xx/s3c2443-ac97.c +++ b/trunk/sound/soc/s3c24xx/s3c2443-ac97.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include #include #include