diff --git a/[refs] b/[refs] index fac80b606f58..a013702b66cf 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7992018d979460af59fbae8a48f9641305aea438 +refs/heads/master: b8947444a738c6407466244c60e9e4a2999af555 diff --git a/trunk/Documentation/DocBook/kernel-locking.tmpl b/trunk/Documentation/DocBook/kernel-locking.tmpl index 0a441f73261a..644c3884fab9 100644 --- a/trunk/Documentation/DocBook/kernel-locking.tmpl +++ b/trunk/Documentation/DocBook/kernel-locking.tmpl @@ -551,12 +551,10 @@ spin_lock_irqsave(), which is a superset of all other spinlock primitives. - Table of Locking Requirements - IRQ Handler A @@ -578,128 +576,97 @@ IRQ Handler B -SLIS +spin_lock_irqsave None Softirq A -SLI -SLI -SL +spin_lock_irq +spin_lock_irq +spin_lock Softirq B -SLI -SLI -SL -SL +spin_lock_irq +spin_lock_irq +spin_lock +spin_lock Tasklet A -SLI -SLI -SL -SL +spin_lock_irq +spin_lock_irq +spin_lock +spin_lock None Tasklet B -SLI -SLI -SL -SL -SL +spin_lock_irq +spin_lock_irq +spin_lock +spin_lock +spin_lock None Timer A -SLI -SLI -SL -SL -SL -SL +spin_lock_irq +spin_lock_irq +spin_lock +spin_lock +spin_lock +spin_lock None Timer B -SLI -SLI -SL -SL -SL -SL -SL +spin_lock_irq +spin_lock_irq +spin_lock +spin_lock +spin_lock +spin_lock +spin_lock None User Context A -SLI -SLI -SLBH -SLBH -SLBH -SLBH -SLBH -SLBH +spin_lock_irq +spin_lock_irq +spin_lock_bh +spin_lock_bh +spin_lock_bh +spin_lock_bh +spin_lock_bh +spin_lock_bh None User Context B -SLI -SLI -SLBH -SLBH -SLBH -SLBH -SLBH -SLBH -DI -None - - - - -
- - -Legend for Locking Requirements Table - - - - -SLIS -spin_lock_irqsave - - -SLI spin_lock_irq - - -SL -spin_lock - - -SLBH +spin_lock_irq +spin_lock_bh +spin_lock_bh +spin_lock_bh +spin_lock_bh +spin_lock_bh spin_lock_bh - - -DI down_interruptible +None
- diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 5c8695a3d139..498ff31f3aa1 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -328,20 +328,21 @@ Who: Adrian Bunk --------------------------- -What: libata spindown skipping and warning +What: libata.spindown_compat module parameter When: Dec 2008 -Why: Some halt(8) implementations synchronize caches for and spin - down libata disks because libata didn't use to spin down disk on - system halt (only synchronized caches). - Spin down on system halt is now implemented. sysfs node - /sys/class/scsi_disk/h:c:i:l/manage_start_stop is present if - spin down support is available. +Why: halt(8) synchronizes caches for and spins down libata disks + because libata didn't use to spin down disk on system halt + (only synchronized caches). + Spin down on system halt is now implemented and can be tested + using sysfs node /sys/class/scsi_disk/h:c:i:l/manage_start_stop. Because issuing spin down command to an already spun down disk - makes some disks spin up just to spin down again, libata tracks - device spindown status to skip the extra spindown command and - warn about it. - This is to give userspace tools the time to get updated and will - be removed after userspace is reasonably updated. + makes some disks spin up just to spin down again, the old + behavior needs to be maintained till userspace tool is updated + to check the sysfs node and not to spin down disks with the + node set to one. + This module parameter is to give userspace tool the time to + get updated and should be removed after userspace is + reasonably updated. Who: Tejun Heo --------------------------- diff --git a/trunk/Documentation/gpio.txt b/trunk/Documentation/gpio.txt index 36af58eba136..e8be0abb346c 100644 --- a/trunk/Documentation/gpio.txt +++ b/trunk/Documentation/gpio.txt @@ -111,9 +111,7 @@ setting up a platform_device using the GPIO, is mark its direction: The return value is zero for success, else a negative errno. It should be checked, since the get/set calls don't have error returns and since -misconfiguration is possible. You should normally issue these calls from -a task context. However, for spinlock-safe GPIOs it's OK to use them -before tasking is enabled, as part of early board setup. +misconfiguration is possible. (These calls could sleep.) For output GPIOs, the value provided becomes the initial output value. This helps avoid signal glitching during system startup. @@ -199,9 +197,7 @@ However, many platforms don't currently support this mechanism. Passing invalid GPIO numbers to gpio_request() will fail, as will requesting GPIOs that have already been claimed with that call. The return value of -gpio_request() must be checked. You should normally issue these calls from -a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs -before tasking is enabled, as part of early board setup. +gpio_request() must be checked. (These calls could sleep.) These calls serve two basic purposes. One is marking the signals which are actually in use as GPIOs, for better diagnostics; systems may have diff --git a/trunk/Documentation/i386/boot.txt b/trunk/Documentation/i386/boot.txt index 66fa67fec2a7..d01b7a2a0f2e 100644 --- a/trunk/Documentation/i386/boot.txt +++ b/trunk/Documentation/i386/boot.txt @@ -2,7 +2,7 @@ ---------------------------- H. Peter Anvin - Last update 2007-05-16 + Last update 2007-05-07 On the i386 platform, the Linux kernel uses a rather complicated boot convention. This has evolved partially due to historical aspects, as @@ -52,8 +52,7 @@ zImage kernels, typically looks like: 0A0000 +------------------------+ | Reserved for BIOS | Do not use. Reserved for BIOS EBDA. 09A000 +------------------------+ - | Command line | - | Stack/heap | For use by the kernel real-mode code. + | Stack/heap/cmdline | For use by the kernel real-mode code. 098000 +------------------------+ | Kernel setup | The kernel real-mode code. 090200 +------------------------+ @@ -74,9 +73,10 @@ zImage kernels, typically looks like: When using bzImage, the protected-mode kernel was relocated to 0x100000 ("high memory"), and the kernel real-mode block (boot sector, setup, and stack/heap) was made relocatable to any address between -0x10000 and end of low memory. Unfortunately, in protocols 2.00 and -2.01 the 0x90000+ memory range is still used internally by the kernel; -the 2.02 protocol resolves that problem. +0x10000 and end of low memory. Unfortunately, in protocols 2.00 and +2.01 the command line is still required to live in the 0x9XXXX memory +range, and that memory range is still overwritten by the early kernel. +The 2.02 protocol resolves that problem. It is desirable to keep the "memory ceiling" -- the highest point in low memory touched by the boot loader -- as low as possible, since @@ -93,35 +93,6 @@ zImage or old bzImage kernels, which need data written into the 0x90000 segment, the boot loader should make sure not to use memory above the 0x9A000 point; too many BIOSes will break above that point. -For a modern bzImage kernel with boot protocol version >= 2.02, a -memory layout like the following is suggested: - - ~ ~ - | Protected-mode kernel | -100000 +------------------------+ - | I/O memory hole | -0A0000 +------------------------+ - | Reserved for BIOS | Leave as much as possible unused - ~ ~ - | Command line | (Can also be below the X+10000 mark) -X+10000 +------------------------+ - | Stack/heap | For use by the kernel real-mode code. -X+08000 +------------------------+ - | Kernel setup | The kernel real-mode code. - | Kernel boot sector | The kernel legacy boot sector. -X +------------------------+ - | Boot loader | <- Boot sector entry point 0000:7C00 -001000 +------------------------+ - | Reserved for MBR/BIOS | -000800 +------------------------+ - | Typically used by MBR | -000600 +------------------------+ - | BIOS use only | -000000 +------------------------+ - -... where the address X is as low as the design of the boot loader -permits. - **** THE REAL-MODE KERNEL HEADER @@ -189,136 +160,29 @@ e.g. protocol version 2.01 will contain 0x0201 in this field. When setting fields in the header, you must make sure only to set fields supported by the protocol version in use. - -**** DETAILS OF HEADER FIELDS - -For each field, some are information from the kernel to the bootloader -("read"), some are expected to be filled out by the bootloader -("write"), and some are expected to be read and modified by the -bootloader ("modify"). - -All general purpose boot loaders should write the fields marked -(obligatory). Boot loaders who want to load the kernel at a -nonstandard address should fill in the fields marked (reloc); other -boot loaders can ignore those fields. - -Field name: setup_secs -Type: read -Offset/size: 0x1f1/1 -Protocol: ALL - - The size of the setup code in 512-byte sectors. If this field is - 0, the real value is 4. The real-mode code consists of the boot - sector (always one 512-byte sector) plus the setup code. - -Field name: root_flags -Type: modify (optional) -Offset/size: 0x1f2/2 -Protocol: ALL - - If this field is nonzero, the root defaults to readonly. The use of - this field is deprecated; use the "ro" or "rw" options on the - command line instead. - -Field name: syssize -Type: read -Offset/size: 0x1f4/4 (protocol 2.04+) 0x1f4/2 (protocol ALL) -Protocol: 2.04+ - - The size of the protected-mode code in units of 16-byte paragraphs. - For protocol versions older than 2.04 this field is only two bytes - wide, and therefore cannot be trusted for the size of a kernel if - the LOAD_HIGH flag is set. - -Field name: ram_size -Type: kernel internal -Offset/size: 0x1f8/2 -Protocol: ALL - - This field is obsolete. - -Field name: vid_mode -Type: modify (obligatory) -Offset/size: 0x1fa/2 - - Please see the section on SPECIAL COMMAND LINE OPTIONS. - -Field name: root_dev -Type: modify (optional) -Offset/size: 0x1fc/2 -Protocol: ALL - - The default root device device number. The use of this field is - deprecated, use the "root=" option on the command line instead. - -Field name: boot_flag -Type: read -Offset/size: 0x1fe/2 -Protocol: ALL - - Contains 0xAA55. This is the closest thing old Linux kernels have - to a magic number. - -Field name: jump -Type: read -Offset/size: 0x200/2 -Protocol: 2.00+ - - Contains an x86 jump instruction, 0xEB followed by a signed offset - relative to byte 0x202. This can be used to determine the size of - the header. - -Field name: header -Type: read -Offset/size: 0x202/4 -Protocol: 2.00+ - - Contains the magic number "HdrS" (0x53726448). - -Field name: version -Type: read -Offset/size: 0x206/2 -Protocol: 2.00+ - - Contains the boot protocol version, e.g. 0x0204 for version 2.04. - -Field name: readmode_swtch -Type: modify (optional) -Offset/size: 0x208/4 -Protocol: 2.00+ - - Boot loader hook (see separate chapter.) - -Field name: start_sys -Type: read -Offset/size: 0x20c/4 -Protocol: 2.00+ - - The load low segment (0x1000). Obsolete. - -Field name: kernel_version -Type: read -Offset/size: 0x20e/2 -Protocol: 2.00+ - - If set to a nonzero value, contains a pointer to a NUL-terminated - human-readable kernel version number string, less 0x200. This can - be used to display the kernel version to the user. This value - should be less than (0x200*setup_sects). For example, if this value - is set to 0x1c00, the kernel version number string can be found at - offset 0x1e00 in the kernel file. This is a valid value if and only - if the "setup_sects" field contains the value 14 or higher. - -Field name: type_of_loader -Type: write (obligatory) -Offset/size: 0x210/1 -Protocol: 2.00+ - - If your boot loader has an assigned id (see table below), enter - 0xTV here, where T is an identifier for the boot loader and V is - a version number. Otherwise, enter 0xFF here. - - Assigned boot loader ids: +The "kernel_version" field, if set to a nonzero value, contains a +pointer to a null-terminated human-readable kernel version number +string, less 0x200. This can be used to display the kernel version to +the user. This value should be less than (0x200*setup_sects). For +example, if this value is set to 0x1c00, the kernel version number +string can be found at offset 0x1e00 in the kernel file. This is a +valid value if and only if the "setup_sects" field contains the value +14 or higher. + +Most boot loaders will simply load the kernel at its target address +directly. Such boot loaders do not need to worry about filling in +most of the fields in the header. The following fields should be +filled out, however: + + vid_mode: + Please see the section on SPECIAL COMMAND LINE OPTIONS. + + type_of_loader: + If your boot loader has an assigned id (see table below), enter + 0xTV here, where T is an identifier for the boot loader and V is + a version number. Otherwise, enter 0xFF here. + + Assigned boot loader ids: 0 LILO (0x00 reserved for pre-2.00 bootloader) 1 Loadlin 2 bootsect-loader (0x20, all other values reserved) @@ -329,145 +193,60 @@ Protocol: 2.00+ 8 U-BOOT 9 Xen A Gujin - B Qemu - Please contact if you need a bootloader ID - value assigned. - -Field name: loadflags -Type: modify (obligatory) -Offset/size: 0x211/1 -Protocol: 2.00+ - - This field is a bitmask. - - Bit 0 (read): LOADED_HIGH - - If 0, the protected-mode code is loaded at 0x10000. - - If 1, the protected-mode code is loaded at 0x100000. - - Bit 7 (write): CAN_USE_HEAP - Set this bit to 1 to indicate that the value entered in the - heap_end_ptr is valid. If this field is clear, some setup code - functionality will be disabled. - -Field name: setup_move_size -Type: modify (obligatory) -Offset/size: 0x212/2 -Protocol: 2.00-2.01 - - When using protocol 2.00 or 2.01, if the real mode kernel is not - loaded at 0x90000, it gets moved there later in the loading - sequence. Fill in this field if you want additional data (such as - the kernel command line) moved in addition to the real-mode kernel - itself. - - The unit is bytes starting with the beginning of the boot sector. - - This field is can be ignored when the protocol is 2.02 or higher, or - if the real-mode code is loaded at 0x90000. - -Field name: code32_start -Type: modify (optional, reloc) -Offset/size: 0x214/4 -Protocol: 2.00+ - - The address to jump to in protected mode. This defaults to the load - address of the kernel, and can be used by the boot loader to - determine the proper load address. - - This field can be modified for two purposes: - - 1. as a boot loader hook (see separate chapter.) - - 2. if a bootloader which does not install a hook loads a - relocatable kernel at a nonstandard address it will have to modify - this field to point to the load address. - -Field name: ramdisk_image -Type: write (obligatory) -Offset/size: 0x218/4 -Protocol: 2.00+ - - The 32-bit linear address of the initial ramdisk or ramfs. Leave at - zero if there is no initial ramdisk/ramfs. - -Field name: ramdisk_size -Type: write (obligatory) -Offset/size: 0x21c/4 -Protocol: 2.00+ - - Size of the initial ramdisk or ramfs. Leave at zero if there is no - initial ramdisk/ramfs. - -Field name: bootsect_kludge -Type: kernel internal -Offset/size: 0x220/4 -Protocol: 2.00+ - - This field is obsolete. - -Field name: heap_end_ptr -Type: write (obligatory) -Offset/size: 0x224/2 -Protocol: 2.01+ - - Set this field to the offset (from the beginning of the real-mode - code) of the end of the setup stack/heap, minus 0x0200. - -Field name: cmd_line_ptr -Type: write (obligatory) -Offset/size: 0x228/4 -Protocol: 2.02+ - - Set this field to the linear address of the kernel command line. - The kernel command line can be located anywhere between the end of - the setup heap and 0xA0000; it does not have to be located in the - same 64K segment as the real-mode code itself. - - Fill in this field even if your boot loader does not support a - command line, in which case you can point this to an empty string - (or better yet, to the string "auto".) If this field is left at - zero, the kernel will assume that your boot loader does not support - the 2.02+ protocol. - -Field name: initrd_addr_max -Type: read -Offset/size: 0x22c/4 -Protocol: 2.03+ - - The maximum address that may be occupied by the initial - ramdisk/ramfs contents. For boot protocols 2.02 or earlier, this - field is not present, and the maximum address is 0x37FFFFFF. (This - address is defined as the address of the highest safe byte, so if - your ramdisk is exactly 131072 bytes long and this field is - 0x37FFFFFF, you can start your ramdisk at 0x37FE0000.) - -Field name: kernel_alignment -Type: read (reloc) -Offset/size: 0x230/4 -Protocol: 2.05+ - - Alignment unit required by the kernel (if relocatable_kernel is true.) - -Field name: relocatable_kernel -Type: read (reloc) -Offset/size: 0x234/1 -Protocol: 2.05+ - - If this field is nonzero, the protected-mode part of the kernel can - be loaded at any address that satisfies the kernel_alignment field. - After loading, the boot loader must set the code32_start field to - point to the loaded code, or to a boot loader hook. - -Field name: cmdline_size -Type: read -Offset/size: 0x238/4 -Protocol: 2.06+ - - The maximum size of the command line without the terminating - zero. This means that the command line can contain at most - cmdline_size characters. With protocol version 2.05 and earlier, the - maximum size was 255. + Please contact if you need a bootloader ID + value assigned. + + loadflags, heap_end_ptr: + If the protocol version is 2.01 or higher, enter the + offset limit of the setup heap into heap_end_ptr and set the + 0x80 bit (CAN_USE_HEAP) of loadflags. heap_end_ptr appears to + be relative to the start of setup (offset 0x0200). + + setup_move_size: + When using protocol 2.00 or 2.01, if the real mode + kernel is not loaded at 0x90000, it gets moved there later in + the loading sequence. Fill in this field if you want + additional data (such as the kernel command line) moved in + addition to the real-mode kernel itself. + + The unit is bytes starting with the beginning of the boot + sector. + + ramdisk_image, ramdisk_size: + If your boot loader has loaded an initial ramdisk (initrd), + set ramdisk_image to the 32-bit pointer to the ramdisk data + and the ramdisk_size to the size of the ramdisk data. + + The initrd should typically be located as high in memory as + possible, as it may otherwise get overwritten by the early + kernel initialization sequence. However, it must never be + located above the address specified in the initrd_addr_max + field. The initrd should be at least 4K page aligned. + + cmd_line_ptr: + If the protocol version is 2.02 or higher, this is a 32-bit + pointer to the kernel command line. The kernel command line + can be located anywhere between the end of setup and 0xA0000. + Fill in this field even if your boot loader does not support a + command line, in which case you can point this to an empty + string (or better yet, to the string "auto".) If this field + is left at zero, the kernel will assume that your boot loader + does not support the 2.02+ protocol. + + ramdisk_max: + The maximum address that may be occupied by the initrd + contents. For boot protocols 2.02 or earlier, this field is + not present, and the maximum address is 0x37FFFFFF. (This + address is defined as the address of the highest safe byte, so + if your ramdisk is exactly 131072 bytes long and this field is + 0x37FFFFFF, you can start your ramdisk at 0x37FE0000.) + + cmdline_size: + The maximum size of the command line without the terminating + zero. This means that the command line can contain at most + cmdline_size characters. With protocol version 2.05 and + earlier, the maximum size was 255. **** THE KERNEL COMMAND LINE diff --git a/trunk/Documentation/ldm.txt b/trunk/Documentation/ldm.txt index 718085bc9f1a..e266e11c19a3 100644 --- a/trunk/Documentation/ldm.txt +++ b/trunk/Documentation/ldm.txt @@ -2,13 +2,10 @@ LDM - Logical Disk Manager (Dynamic Disks) ------------------------------------------ -Originally Written by FlatCap - Richard Russon . -Last Updated by Anton Altaparmakov on 30 March 2007 for Windows Vista. - Overview -------- -Windows 2000, XP, and Vista use a new partitioning scheme. It is a complete +Windows 2000 and XP use a new partitioning scheme. It is a complete replacement for the MSDOS style partitions. It stores its information in a 1MiB journalled database at the end of the physical disk. The size of partitions is limited only by disk space. The maximum number of partitions is @@ -26,11 +23,7 @@ Once the LDM driver has divided up the disk, you can use the MD driver to assemble any multi-partition volumes, e.g. Stripes, RAID5. To prevent legacy applications from repartitioning the disk, the LDM creates a -dummy MSDOS partition containing one disk-sized partition. This is what is -supported with the Linux LDM driver. - -A newer approach that has been implemented with Vista is to put LDM on top of a -GPT label disk. This is not supported by the Linux LDM driver yet. +dummy MSDOS partition containing one disk-sized partition. Example @@ -95,13 +88,13 @@ and cannot boot from a Dynamic Disk. More Documentation ------------------ -There is an Overview of the LDM together with complete Technical Documentation. -It is available for download. +There is an Overview of the LDM online together with complete Technical +Documentation. It can also be downloaded in html. - http://www.linux-ntfs.org/content/view/19/37/ + http://linux-ntfs.sourceforge.net/ldm/index.html + http://linux-ntfs.sourceforge.net/downloads.html -If you have any LDM questions that aren't answered in the documentation, email -me. +If you have any LDM questions that aren't answered on the website, email me. Cheers, FlatCap - Richard Russon diff --git a/trunk/Documentation/networking/netdevices.txt b/trunk/Documentation/networking/netdevices.txt index ce1361f95243..847cedb238f6 100644 --- a/trunk/Documentation/networking/netdevices.txt +++ b/trunk/Documentation/networking/netdevices.txt @@ -49,7 +49,7 @@ dev->hard_start_xmit: for this and return -1 when the spin lock fails. The locking there should also properly protect against set_multicast_list - Context: Process with BHs disabled or BH (timer). + Context: BHs disabled Notes: netif_queue_stopped() is guaranteed false Interrupts must be enabled when calling hard_start_xmit. (Interrupts must also be enabled when enabling the BH handler.) diff --git a/trunk/Documentation/s390/cds.txt b/trunk/Documentation/s390/cds.txt index 58919d6a593a..05a2b4f7e38f 100644 --- a/trunk/Documentation/s390/cds.txt +++ b/trunk/Documentation/s390/cds.txt @@ -51,8 +51,13 @@ The major changes are: * The interrupt handlers must be adapted to use a ccw_device as argument. Moreover, they don't return a devstat, but an irb. * Before initiating an io, the options must be set via ccw_device_set_options(). -* Instead of calling read_dev_chars()/read_conf_data(), the driver issues - the channel program and handles the interrupt itself. + +read_dev_chars() + read device characteristics + +read_conf_data() +read_conf_data_lpm() + read configuration data. ccw_device_get_ciw() get commands from extended sense data. @@ -125,6 +130,11 @@ present their hardware status by the same (shared) IRQ, the operating system has to call every single device driver registered on this IRQ in order to determine the device driver owning the device that raised the interrupt. +In order not to introduce a new I/O concept to the common Linux code, +Linux/390 preserves the IRQ concept and semantically maps the ESA/390 +subchannels to Linux as IRQs. This allows Linux/390 to support up to 64k +different IRQs, uniquely representing a single device each. + Up to kernel 2.4, Linux/390 used to provide interfaces via the IRQ (subchannel). For internal use of the common I/O layer, these are still there. However, device drivers should use the new calling interface via the ccw_device only. @@ -141,8 +151,9 @@ information during their initialization step to recognize the devices they support using the information saved in the struct ccw_device given to them. This methods implies that Linux/390 doesn't require to probe for free (not armed) interrupt request lines (IRQs) to drive its devices with. Where -applicable, the device drivers can use issue the READ DEVICE CHARACTERISTICS -ccw to retrieve device characteristics in its online routine. +applicable, the device drivers can use the read_dev_chars() to retrieve device +characteristics. This can be done without having to request device ownership +previously. In order to allow for easy I/O initiation the CDS layer provides a ccw_device_start() interface that takes a device specific channel program (one @@ -159,6 +170,69 @@ SUBCHANNEL (HSCH) command without having pending I/O requests. This function is also covered by ccw_device_halt(). +read_dev_chars() - Read Device Characteristics + +This routine returns the characteristics for the device specified. + +The function is meant to be called with the device already enabled; that is, +at earliest during set_online() processing. + +The ccw_device must not be locked prior to calling read_dev_chars(). + +The function may be called enabled or disabled. + +int read_dev_chars(struct ccw_device *cdev, void **buffer, int length ); + +cdev - the ccw_device the information is requested for. +buffer - pointer to a buffer pointer. The buffer pointer itself + must contain a valid buffer area. +length - length of the buffer provided. + +The read_dev_chars() function returns : + + 0 - successful completion +-ENODEV - cdev invalid +-EINVAL - an invalid parameter was detected, or the function was called early. +-EBUSY - an irrecoverable I/O error occurred or the device is not + operational. + + +read_conf_data(), read_conf_data_lpm() - Read Configuration Data + +Retrieve the device dependent configuration data. Please have a look at your +device dependent I/O commands for the device specific layout of the node +descriptor elements. read_conf_data_lpm() will retrieve the configuration data +for a specific path. + +The function is meant to be called with the device already enabled; that is, +at earliest during set_online() processing. + +The function may be called enabled or disabled, but the device must not be +locked + +int read_conf_data(struct ccw_device, void **buffer, int *length); +int read_conf_data_lpm(struct ccw_device, void **buffer, int *length, __u8 lpm); + +cdev - the ccw_device the data is requested for. +buffer - Pointer to a buffer pointer. The read_conf_data() routine + will allocate a buffer and initialize the buffer pointer + accordingly. It's the device driver's responsibility to + release the kernel memory if no longer needed. +length - Length of the buffer allocated and retrieved. +lpm - Logical path mask to be used for retrieving the data. If + zero the data is retrieved on the next path available. + +The read_conf_data() function returns : + 0 - Successful completion +-ENODEV - cdev invalid. +-EINVAL - An invalid parameter was detected, or the function was called early. +-EIO - An irrecoverable I/O error occurred or the device is + not operational. +-ENOMEM - The read_conf_data() routine couldn't obtain storage. +-EOPNOTSUPP - The device doesn't support the read configuration + data command. + + get_ciw() - get command information word This call enables a device driver to get information about supported commands diff --git a/trunk/Documentation/vm/slabinfo.c b/trunk/Documentation/vm/slabinfo.c index d4f21ffd1404..686a8e04a4f3 100644 --- a/trunk/Documentation/vm/slabinfo.c +++ b/trunk/Documentation/vm/slabinfo.c @@ -242,9 +242,6 @@ void decode_numa_list(int *numa, char *t) memset(numa, 0, MAX_NODES * sizeof(int)); - if (!t) - return; - while (*t == 'N') { t++; node = strtoul(t, &t, 10); @@ -262,17 +259,11 @@ void decode_numa_list(int *numa, char *t) void slab_validate(struct slabinfo *s) { - if (strcmp(s->name, "*") == 0) - return; - set_obj(s, "validate", 1); } void slab_shrink(struct slabinfo *s) { - if (strcmp(s->name, "*") == 0) - return; - set_obj(s, "shrink", 1); } @@ -395,9 +386,7 @@ void report(struct slabinfo *s) { if (strcmp(s->name, "*") == 0) return; - - printf("\nSlabcache: %-20s Aliases: %2d Order : %2d Objects: %d\n", - s->name, s->aliases, s->order, s->objects); + printf("\nSlabcache: %-20s Aliases: %2d Order : %2d\n", s->name, s->aliases, s->order); if (s->hwcache_align) printf("** Hardware cacheline aligned\n"); if (s->cache_dma) @@ -556,9 +545,6 @@ int slab_empty(struct slabinfo *s) void slab_debug(struct slabinfo *s) { - if (strcmp(s->name, "*") == 0) - return; - if (sanity && !s->sanity_checks) { set_obj(s, "sanity", 1); } @@ -805,11 +791,11 @@ void totals(void) store_size(b1, total_size);store_size(b2, total_waste); store_size(b3, total_waste * 100 / total_used); - printf("Memory used: %6s # Loss : %6s MRatio:%6s%%\n", b1, b2, b3); + printf("Memory used: %6s # Loss : %6s MRatio: %6s%%\n", b1, b2, b3); store_size(b1, total_objects);store_size(b2, total_partobj); store_size(b3, total_partobj * 100 / total_objects); - printf("# Objects : %6s # PartObj: %6s ORatio:%6s%%\n", b1, b2, b3); + printf("# Objects : %6s # PartObj: %6s ORatio: %6s%%\n", b1, b2, b3); printf("\n"); printf("Per Cache Average Min Max Total\n"); @@ -832,7 +818,7 @@ void totals(void) store_size(b1, avg_ppart);store_size(b2, min_ppart); store_size(b3, max_ppart); store_size(b4, total_partial * 100 / total_slabs); - printf("%%PartSlab%10s%% %10s%% %10s%% %10s%%\n", + printf("%%PartSlab %10s%% %10s%% %10s%% %10s%%\n", b1, b2, b3, b4); store_size(b1, avg_partobj);store_size(b2, min_partobj); @@ -844,7 +830,7 @@ void totals(void) store_size(b1, avg_ppartobj);store_size(b2, min_ppartobj); store_size(b3, max_ppartobj); store_size(b4, total_partobj * 100 / total_objects); - printf("%% PartObj%10s%% %10s%% %10s%% %10s%%\n", + printf("%% PartObj %10s%% %10s%% %10s%% %10s%%\n", b1, b2, b3, b4); store_size(b1, avg_size);store_size(b2, min_size); @@ -1114,8 +1100,6 @@ void output_slabs(void) ops(slab); else if (show_slab) slabcache(slab); - else if (show_report) - report(slab); } } diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 22ab4019972b..68a56add73e3 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -1712,6 +1712,8 @@ L: Linux-Kernel@vger.kernel.org S: Maintained i386 SETUP CODE / CPU ERRATA WORKAROUNDS +P: Dave Jones +M: davej@codemonkey.org.uk P: H. Peter Anvin M: hpa@zytor.com S: Maintained @@ -2231,11 +2233,11 @@ M: khali@linux-fr.org L: lm-sensors@lm-sensors.org S: Maintained -LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP/Vista Dynamic Disks) +LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP Dynamic Disks) P: Richard Russon (FlatCap) M: ldm@flatcap.org -L: linux-ntfs-dev@lists.sourceforge.net -W: http://www.linux-ntfs.org/content/view/19/37/ +L: ldm-devel@lists.sourceforge.net +W: http://ldm.sourceforge.net S: Maintained LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI) @@ -2689,13 +2691,13 @@ L: i2c@lm-sensors.org S: Maintained PARALLEL PORT SUPPORT -L: linux-parport@lists.infradead.org (subscribers-only) +L: linux-parport@lists.infradead.org S: Orphan PARIDE DRIVERS FOR PARALLEL PORT IDE DEVICES P: Tim Waugh M: tim@cyberelk.net -L: linux-parport@lists.infradead.org (subscribers-only) +L: linux-parport@lists.infradead.org W: http://www.torque.net/linux-pp.html S: Maintained @@ -3267,7 +3269,6 @@ W: http://tpmdd.sourceforge.net P: Marcel Selhorst M: tpm@selhorst.net W: http://www.prosec.rub.de/tpm/ -L: tpmdd-devel@lists.sourceforge.net S: Maintained Telecom Clock Driver for MCPL0010 diff --git a/trunk/Makefile b/trunk/Makefile index 34210af91ce2..e6990e2cdafc 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 22 -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc1 NAME = Nocturnal Monster Puppy # *DOCUMENTATION* @@ -491,7 +491,7 @@ endif include $(srctree)/arch/$(ARCH)/Makefile ifdef CONFIG_FRAME_POINTER -CFLAGS += -fno-omit-frame-pointer $(call cc-option,-fno-optimize-sibling-calls,) +CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls else CFLAGS += -fomit-frame-pointer endif diff --git a/trunk/arch/alpha/kernel/vmlinux.lds.S b/trunk/arch/alpha/kernel/vmlinux.lds.S index 449e76f118d3..cf1e6fc6c686 100644 --- a/trunk/arch/alpha/kernel/vmlinux.lds.S +++ b/trunk/arch/alpha/kernel/vmlinux.lds.S @@ -15,7 +15,7 @@ SECTIONS _text = .; /* Text and read-only data */ .text : { - TEXT_TEXT + *(.text) SCHED_TEXT LOCK_TEXT *(.fixup) @@ -89,7 +89,7 @@ SECTIONS _data = .; .data : { /* Data */ - DATA_DATA + *(.data) CONSTRUCTORS } diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 50d9f3e4e0f1..e55bbd32dcac 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -287,7 +287,6 @@ config ARCH_IXP2000 config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU - select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS help diff --git a/trunk/arch/arm/common/dmabounce.c b/trunk/arch/arm/common/dmabounce.c index b36b1e8a105d..6fbe7722aa44 100644 --- a/trunk/arch/arm/common/dmabounce.c +++ b/trunk/arch/arm/common/dmabounce.c @@ -6,7 +6,7 @@ * copy data to/from buffers located outside the DMA region. This * only works for systems in which DMA memory is at the bottom of * RAM, the remainder of memory is at the top and the DMA memory - * can be marked as ZONE_DMA. Anything beyond that such as discontiguous + * can be marked as ZONE_DMA. Anything beyond that such as discontigous * DMA windows will require custom implementations that reserve memory * areas at early bootup. * diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c index 0c89bd35e06f..4deece5fbdf4 100644 --- a/trunk/arch/arm/common/gic.c +++ b/trunk/arch/arm/common/gic.c @@ -72,7 +72,7 @@ static inline unsigned int gic_irq(unsigned int irq) * unmask it, in the same way we need to unmask an interrupt when * we first enable it. * - * The GIC has a separate notion of "end of interrupt" to re-enable + * The GIC has a seperate notion of "end of interrupt" to re-enable * an interrupt after handling, in order to support hardware * prioritisation. * @@ -125,11 +125,12 @@ static void gic_set_cpu(unsigned int irq, cpumask_t mask_val) } #endif -static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) +static void fastcall gic_handle_cascade_irq(unsigned int irq, + struct irq_desc *desc) { struct gic_chip_data *chip_data = get_irq_data(irq); struct irq_chip *chip = get_irq_chip(irq); - unsigned int cascade_irq, gic_irq; + unsigned int cascade_irq; unsigned long status; /* primary controller ack'ing */ @@ -139,15 +140,16 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) status = readl(chip_data->cpu_base + GIC_CPU_INTACK); spin_unlock(&irq_controller_lock); - gic_irq = (status & 0x3ff); - if (gic_irq == 1023) + cascade_irq = (status & 0x3ff); + if (cascade_irq > 1020) goto out; - - cascade_irq = gic_irq + chip_data->irq_offset; - if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) + if (cascade_irq < 32 || cascade_irq >= NR_IRQS) { do_bad_IRQ(cascade_irq, desc); - else - generic_handle_irq(cascade_irq); + goto out; + } + + cascade_irq += chip_data->irq_offset; + generic_handle_irq(cascade_irq); out: /* primary controller unmasking */ diff --git a/trunk/arch/arm/common/sharpsl_param.c b/trunk/arch/arm/common/sharpsl_param.c index aad4d94ba8f5..c94864c5b1af 100644 --- a/trunk/arch/arm/common/sharpsl_param.c +++ b/trunk/arch/arm/common/sharpsl_param.c @@ -20,7 +20,7 @@ * typically including LCD parameters are loaded by the bootloader at the * address PARAM_BASE. As the kernel will overwrite them, we need to store * them early in the boot process, then pass them to the appropriate drivers. - * Not all devices use all parameters but the format is common to all. + * Not all devices use all paramaters but the format is common to all. */ #ifdef CONFIG_ARCH_SA1100 #define PARAM_BASE 0xe8ffc000 diff --git a/trunk/arch/arm/common/sharpsl_pm.c b/trunk/arch/arm/common/sharpsl_pm.c index 3bf3a927ae22..5972df2b9af4 100644 --- a/trunk/arch/arm/common/sharpsl_pm.c +++ b/trunk/arch/arm/common/sharpsl_pm.c @@ -153,7 +153,7 @@ static void sharpsl_battery_thread(struct work_struct *private_) sharpsl_pm.battstat.mainbat_percent = percent; } - dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, + dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %d\n", voltage, sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); /* If battery is low. limit backlight intensity to save power. */ @@ -291,7 +291,7 @@ static void sharpsl_chrg_full_timer(unsigned long data) } /* Charging Finished Interrupt (Not present on Corgi) */ -/* Can trigger at the same time as an AC status change so +/* Can trigger at the same time as an AC staus change so delay until after that has been processed */ irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id) { @@ -625,7 +625,7 @@ static int sharpsl_fatal_check(void) } temp = get_select_val(buff); - dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT)); + dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT)); if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) || (!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt))) @@ -635,7 +635,7 @@ static int sharpsl_fatal_check(void) static int sharpsl_off_charge_error(void) { - dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n"); + dev_err(sharpsl_pm.dev, "Offline Charger: Error occured.\n"); sharpsl_pm.machinfo->charge(0); sharpsl_pm_led(SHARPSL_LED_ERROR); sharpsl_pm.charge_mode = CHRG_ERROR; @@ -691,14 +691,14 @@ static int sharpsl_off_charge_battery(void) time = RCNR; while(1) { - /* Check if any wakeup event had occurred */ + /* Check if any wakeup event had occured */ if (sharpsl_pm.machinfo->charger_wakeup() != 0) return 0; /* Check for timeout */ if ((RCNR - time) > SHARPSL_WAIT_CO_TIME) return 1; if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) { - dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n"); + dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occured. Retrying to check\n"); sharpsl_pm.full_count++; sharpsl_pm.machinfo->charge(0); mdelay(SHARPSL_CHARGE_WAIT_TIME); @@ -714,7 +714,7 @@ static int sharpsl_off_charge_battery(void) time = RCNR; while(1) { - /* Check if any wakeup event had occurred */ + /* Check if any wakeup event had occured */ if (sharpsl_pm.machinfo->charger_wakeup() != 0) return 0; /* Check for timeout */ @@ -774,8 +774,6 @@ static struct pm_ops sharpsl_pm_ops = { static int __init sharpsl_pm_probe(struct platform_device *pdev) { - int ret; - if (!pdev->dev.platform_data) return -EINVAL; @@ -794,10 +792,8 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev) sharpsl_pm.machinfo->init(); - ret = device_create_file(&pdev->dev, &dev_attr_battery_percentage); - ret |= device_create_file(&pdev->dev, &dev_attr_battery_voltage); - if (ret != 0) - dev_warn(&pdev->dev, "Failed to register attributes (%d)\n", ret); + device_create_file(&pdev->dev, &dev_attr_battery_percentage); + device_create_file(&pdev->dev, &dev_attr_battery_voltage); apm_get_power_status = sharpsl_apm_get_power_status; diff --git a/trunk/arch/arm/kernel/asm-offsets.c b/trunk/arch/arm/kernel/asm-offsets.c index 3278e713c32a..3c078e346753 100644 --- a/trunk/arch/arm/kernel/asm-offsets.c +++ b/trunk/arch/arm/kernel/asm-offsets.c @@ -85,7 +85,7 @@ int main(void) DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); BLANK(); -#ifdef CONFIG_CPU_HAS_ASID +#if __LINUX_ARM_ARCH__ >= 6 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); BLANK(); #endif diff --git a/trunk/arch/arm/kernel/calls.S b/trunk/arch/arm/kernel/calls.S index 19326d7cdeb3..ae89cdd82b16 100644 --- a/trunk/arch/arm/kernel/calls.S +++ b/trunk/arch/arm/kernel/calls.S @@ -357,10 +357,6 @@ /* 345 */ CALL(sys_getcpu) CALL(sys_ni_syscall) /* eventually epoll_pwait */ CALL(sys_kexec_load) - CALL(sys_utimensat) - CALL(sys_signalfd) -/* 350 */ CALL(sys_timerfd) - CALL(sys_eventfd) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index 650eac1bc0a6..0453dcc757b4 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -918,7 +918,7 @@ static int c_show(struct seq_file *m, void *v) if ((processor_id & 0x0008f000) == 0x00000000) { /* pre-ARM7 */ - seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4); + seq_printf(m, "CPU part\t\t: %07x\n", processor_id >> 4); } else { if ((processor_id & 0x0008f000) == 0x00007000) { /* ARM7 */ diff --git a/trunk/arch/arm/kernel/stacktrace.c b/trunk/arch/arm/kernel/stacktrace.c index 8b63ad89d0a8..398d0c0511eb 100644 --- a/trunk/arch/arm/kernel/stacktrace.c +++ b/trunk/arch/arm/kernel/stacktrace.c @@ -1,4 +1,3 @@ -#include #include #include @@ -31,7 +30,6 @@ int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, return 0; } -EXPORT_SYMBOL(walk_stackframe); #ifdef CONFIG_STACKTRACE struct stack_trace_data { diff --git a/trunk/arch/arm/kernel/sys_arm.c b/trunk/arch/arm/kernel/sys_arm.c index 1ca2d5174fcb..3d4fcbc16276 100644 --- a/trunk/arch/arm/kernel/sys_arm.c +++ b/trunk/arch/arm/kernel/sys_arm.c @@ -320,7 +320,7 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[]) EXPORT_SYMBOL(kernel_execve); /* - * Since loff_t is a 64 bit type we avoid a lot of ABI hassle + * Since loff_t is a 64 bit type we avoid a lot of ABI hastle * with a different argument ordering. */ asmlinkage long sys_arm_fadvise64_64(int fd, int advice, diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 2b7a8f5d8cf2..e4156e7868ce 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -90,7 +90,7 @@ SECTIONS __exception_text_start = .; *(.exception.text) __exception_text_end = .; - TEXT_TEXT + *(.text) SCHED_TEXT LOCK_TEXT #ifdef CONFIG_MMU @@ -158,7 +158,7 @@ SECTIONS /* * and the usual data section */ - DATA_DATA + *(.data) CONSTRUCTORS _edata = .; diff --git a/trunk/arch/arm/lib/bitops.h b/trunk/arch/arm/lib/bitops.h index 2e787d40d599..542251021744 100644 --- a/trunk/arch/arm/lib/bitops.h +++ b/trunk/arch/arm/lib/bitops.h @@ -47,7 +47,7 @@ * @store: store instruction * * Note: we can trivially conditionalise the store instruction - * to avoid dirtying the data cache. + * to avoid dirting the data cache. */ .macro testop, instr, store add r1, r1, r0, lsr #3 diff --git a/trunk/arch/arm/mach-at91/board-carmeva.c b/trunk/arch/arm/mach-at91/board-carmeva.c index 76ec856cd4f9..b4518619063a 100644 --- a/trunk/arch/arm/mach-at91/board-carmeva.c +++ b/trunk/arch/arm/mach-at91/board-carmeva.c @@ -79,7 +79,7 @@ static struct at91_udc_data __initdata carmeva_udc_data = { .pullup_pin = AT91_PIN_PD9, }; -/* FIXME: user dependant */ +/* FIXME: user dependend */ // static struct at91_cf_data __initdata carmeva_cf_data = { // .det_pin = AT91_PIN_PB0, // .rst_pin = AT91_PIN_PC5, @@ -100,17 +100,17 @@ static struct spi_board_info carmeva_spi_devices[] = { .chip_select = 0, .max_speed_hz = 10 * 1000 * 1000, }, - { /* User accessible spi - cs1 (250KHz) */ + { /* User accessable spi - cs1 (250KHz) */ .modalias = "spi-cs1", .chip_select = 1, .max_speed_hz = 250 * 1000, }, - { /* User accessible spi - cs2 (1MHz) */ + { /* User accessable spi - cs2 (1MHz) */ .modalias = "spi-cs2", .chip_select = 2, .max_speed_hz = 1 * 1000 * 1000, }, - { /* User accessible spi - cs3 (10MHz) */ + { /* User accessable spi - cs3 (10MHz) */ .modalias = "spi-cs3", .chip_select = 3, .max_speed_hz = 10 * 1000 * 1000, diff --git a/trunk/arch/arm/mach-h720x/cpu-h7202.c b/trunk/arch/arm/mach-h720x/cpu-h7202.c index 0a1a25fb8ba8..82e420d6fd19 100644 --- a/trunk/arch/arm/mach-h720x/cpu-h7202.c +++ b/trunk/arch/arm/mach-h720x/cpu-h7202.c @@ -143,7 +143,7 @@ h7202_timer_interrupt(int irq, void *dev_id) } /* - * mask multiplexed timer IRQs + * mask multiplexed timer irq's */ static void inline mask_timerx_irq (u32 irq) { @@ -153,7 +153,7 @@ static void inline mask_timerx_irq (u32 irq) } /* - * unmask multiplexed timer IRQs + * unmask multiplexed timer irq's */ static void inline unmask_timerx_irq (u32 irq) { diff --git a/trunk/arch/arm/mach-imx/cpufreq.c b/trunk/arch/arm/mach-imx/cpufreq.c index 467d899fbe75..7e70e0b0b989 100644 --- a/trunk/arch/arm/mach-imx/cpufreq.c +++ b/trunk/arch/arm/mach-imx/cpufreq.c @@ -245,7 +245,7 @@ static int imx_set_target(struct cpufreq_policy *policy, if(mpctl0) { CSCR |= CSCR_MPLL_RESTART; - /* Wait until MPLL is stabilized */ + /* Wait until MPLL is stablized */ while( CSCR & CSCR_MPLL_RESTART ); imx_set_async_mode(); diff --git a/trunk/arch/arm/mach-imx/dma.c b/trunk/arch/arm/mach-imx/dma.c index bc6fb02d213b..6d50d85a618c 100644 --- a/trunk/arch/arm/mach-imx/dma.c +++ b/trunk/arch/arm/mach-imx/dma.c @@ -131,7 +131,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch, * The function setups DMA channel source and destination addresses for transfer * specified by provided parameters. The scatter-gather emulation is disabled, * because linear data block - * form the physical address range is transferred. + * form the physical address range is transfered. * Return value: if incorrect parameters are provided -%EINVAL. * Zero indicates success. */ @@ -192,7 +192,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory * or %DMA_MODE_WRITE from memory to the device * - * The function sets up DMA channel state and registers to be ready for transfer + * The function setups DMA channel state and registers to be ready for transfer * specified by provided parameters. The scatter-gather emulation is set up * according to the parameters. * @@ -212,7 +212,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, * * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x * - * Be careful here and do not mistakenly mix source and target device + * Be carefull there and do not mistakenly mix source and target device * port sizes constants, they are really different: * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32, * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32 @@ -495,7 +495,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id) /* * The cleaning of @sg field would be questionable * there, because its value can help to compute - * remaining/transferred bytes count in the handler + * remaining/transfered bytes count in the handler */ /*imx_dma_channels[i].sg = NULL;*/ diff --git a/trunk/arch/arm/mach-integrator/Makefile b/trunk/arch/arm/mach-integrator/Makefile index 158daaf9e3b0..ebb255bdce8a 100644 --- a/trunk/arch/arm/mach-integrator/Makefile +++ b/trunk/arch/arm/mach-integrator/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_LEDS) += leds.o obj-$(CONFIG_PCI) += pci_v3.o pci.o obj-$(CONFIG_CPU_FREQ_INTEGRATOR) += cpu.o obj-$(CONFIG_INTEGRATOR_IMPD1) += impd1.o +obj-$(CONFIG_SMP) += platsmp.o headsmp.o diff --git a/trunk/arch/arm/mach-integrator/core.c b/trunk/arch/arm/mach-integrator/core.c index e9c82deb791d..897c21c2fb5b 100644 --- a/trunk/arch/arm/mach-integrator/core.c +++ b/trunk/arch/arm/mach-integrator/core.c @@ -257,7 +257,23 @@ integrator_timer_interrupt(int irq, void *dev_id) */ writel(1, TIMER1_VA_BASE + TIMER_INTCLR); - timer_tick(); + /* + * the clock tick routines are only processed on the + * primary CPU + */ + if (hard_smp_processor_id() == 0) { + timer_tick(); +#ifdef CONFIG_SMP + smp_send_timer(); +#endif + } + +#ifdef CONFIG_SMP + /* + * this is the ARM equivalent of the APIC timer interrupt + */ + update_process_times(user_mode(get_irq_regs())); +#endif /* CONFIG_SMP */ write_sequnlock(&xtime_lock); diff --git a/trunk/arch/arm/mach-integrator/headsmp.S b/trunk/arch/arm/mach-integrator/headsmp.S new file mode 100644 index 000000000000..ceaa88e30d70 --- /dev/null +++ b/trunk/arch/arm/mach-integrator/headsmp.S @@ -0,0 +1,37 @@ +/* + * linux/arch/arm/mach-integrator/headsmp.S + * + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + + __INIT + +/* + * Integrator specific entry point for secondary CPUs. This provides + * a "holding pen" into which all secondary cores are held until we're + * ready for them to initialise. + */ +ENTRY(integrator_secondary_startup) + adr r4, 1f + ldmia r4, {r5, r6} + sub r4, r4, r5 + ldr r6, [r6, r4] +pen: ldr r7, [r6] + cmp r7, r0 + bne pen + + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup + +1: .long . + .long phys_pen_release diff --git a/trunk/arch/arm/mach-integrator/pci_v3.c b/trunk/arch/arm/mach-integrator/pci_v3.c index d4d8134ce567..af9ebccac7c1 100644 --- a/trunk/arch/arm/mach-integrator/pci_v3.c +++ b/trunk/arch/arm/mach-integrator/pci_v3.c @@ -33,7 +33,6 @@ #include #include #include -#include #include diff --git a/trunk/arch/arm/mach-integrator/platsmp.c b/trunk/arch/arm/mach-integrator/platsmp.c new file mode 100644 index 000000000000..613b841a10f3 --- /dev/null +++ b/trunk/arch/arm/mach-integrator/platsmp.c @@ -0,0 +1,204 @@ +/* + * linux/arch/arm/mach-cintegrator/platsmp.c + * + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +extern void integrator_secondary_startup(void); + +/* + * control for which core is the next to come out of the secondary + * boot "holding pen" + */ +volatile int __cpuinitdata pen_release = -1; +unsigned long __cpuinitdata phys_pen_release = 0; + +static DEFINE_SPINLOCK(boot_lock); + +void __cpuinit platform_secondary_init(unsigned int cpu) +{ + /* + * the primary core may have used a "cross call" soft interrupt + * to get this processor out of WFI in the BootMonitor - make + * sure that we are no longer being sent this soft interrupt + */ + smp_cross_call_done(cpumask_of_cpu(cpu)); + + /* + * if any interrupts are already enabled for the primary + * core (e.g. timer irq), then they will not have been enabled + * for us: do so + */ + secondary_scan_irqs(); + + /* + * let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + pen_release = -1; + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + + /* + * set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from + * the holding pen - release it, then wait for it to flag + * that it has been released by resetting pen_release. + * + * Note that "pen_release" is the hardware CPU ID, whereas + * "cpu" is Linux's internal ID. + */ + pen_release = cpu; + flush_cache_all(); + + /* + * XXX + * + * This is a later addition to the booting protocol: the + * bootMonitor now puts secondary cores into WFI, so + * poke_milo() no longer gets the cores moving; we need + * to send a soft interrupt to wake the secondary core. + * Use smp_cross_call() for this, since there's little + * point duplicating the code here + */ + smp_cross_call(cpumask_of_cpu(cpu)); + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + if (pen_release == -1) + break; + + udelay(10); + } + + /* + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; +} + +static void __init poke_milo(void) +{ + extern void secondary_startup(void); + + /* nobody is to be released from the pen yet */ + pen_release = -1; + + phys_pen_release = virt_to_phys(&pen_release); + + /* + * write the address of secondary startup into the system-wide + * flags register, then clear the bottom two bits, which is what + * BootMonitor is waiting for + */ +#if 1 +#define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30 + __raw_writel(virt_to_phys(integrator_secondary_startup), + (IO_ADDRESS(INTEGRATOR_HDR_BASE) + + CINTEGRATOR_HDR_FLAGSS_OFFSET)); +#define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34 + __raw_writel(3, + (IO_ADDRESS(INTEGRATOR_HDR_BASE) + + CINTEGRATOR_HDR_FLAGSC_OFFSET)); +#endif + + mb(); +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +void __init smp_init_cpus(void) +{ + unsigned int i, ncores = get_core_count(); + + for (i = 0; i < ncores; i++) + cpu_set(i, cpu_possible_map); +} + +void __init smp_prepare_cpus(unsigned int max_cpus) +{ + unsigned int ncores = get_core_count(); + unsigned int cpu = smp_processor_id(); + int i; + + /* sanity check */ + if (ncores == 0) { + printk(KERN_ERR + "Integrator/CP: strange CM count of 0? Default to 1\n"); + + ncores = 1; + } + + if (ncores > NR_CPUS) { + printk(KERN_WARNING + "Integrator/CP: no. of cores (%d) greater than configured " + "maximum of %d - clipping\n", + ncores, NR_CPUS); + ncores = NR_CPUS; + } + + /* + * start with some more config for the Boot CPU, now that + * the world is a bit more alive (which was not the case + * when smp_prepare_boot_cpu() was called) + */ + smp_store_cpu_info(cpu); + + /* + * are we trying to boot more cores than exist? + */ + if (max_cpus > ncores) + max_cpus = ncores; + + /* + * Initialise the present map, which describes the set of CPUs + * actually populated at the present time. + */ + for (i = 0; i < max_cpus; i++) + cpu_set(i, cpu_present_map); + + /* + * Do we need any more CPUs? If so, then let them know where + * to start. Note that, on modern versions of MILO, the "poke" + * doesn't actually do anything until each individual core is + * sent a soft interrupt to get it out of WFI + */ + if (max_cpus > 1) + poke_milo(); +} diff --git a/trunk/arch/arm/mach-iop13xx/irq.c b/trunk/arch/arm/mach-iop13xx/irq.c index 69f07b25b3c9..5791addd436b 100644 --- a/trunk/arch/arm/mach-iop13xx/irq.c +++ b/trunk/arch/arm/mach-iop13xx/irq.c @@ -30,65 +30,77 @@ /* INTCTL0 CP6 R0 Page 4 */ -static u32 read_intctl_0(void) +static inline u32 read_intctl_0(void) { u32 val; asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val)); return val; } -static void write_intctl_0(u32 val) +static inline void write_intctl_0(u32 val) { asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val)); } /* INTCTL1 CP6 R1 Page 4 */ -static u32 read_intctl_1(void) +static inline u32 read_intctl_1(void) { u32 val; asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val)); return val; } -static void write_intctl_1(u32 val) +static inline void write_intctl_1(u32 val) { asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val)); } /* INTCTL2 CP6 R2 Page 4 */ -static u32 read_intctl_2(void) +static inline u32 read_intctl_2(void) { u32 val; asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val)); return val; } -static void write_intctl_2(u32 val) +static inline void write_intctl_2(u32 val) { asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val)); } /* INTCTL3 CP6 R3 Page 4 */ -static u32 read_intctl_3(void) +static inline u32 read_intctl_3(void) { u32 val; asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val)); return val; } -static void write_intctl_3(u32 val) +static inline void write_intctl_3(u32 val) { asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val)); } /* INTSTR0 CP6 R0 Page 5 */ -static void write_intstr_0(u32 val) +static inline u32 read_intstr_0(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val)); + return val; +} +static inline void write_intstr_0(u32 val) { asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val)); } /* INTSTR1 CP6 R1 Page 5 */ +static inline u32 read_intstr_1(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val)); + return val; +} static void write_intstr_1(u32 val) { asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val)); @@ -96,6 +108,12 @@ static void write_intstr_1(u32 val) /* INTSTR2 CP6 R2 Page 5 */ +static inline u32 read_intstr_2(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val)); + return val; +} static void write_intstr_2(u32 val) { asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val)); @@ -103,6 +121,12 @@ static void write_intstr_2(u32 val) /* INTSTR3 CP6 R3 Page 5 */ +static inline u32 read_intstr_3(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val)); + return val; +} static void write_intstr_3(u32 val) { asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val)); @@ -110,6 +134,12 @@ static void write_intstr_3(u32 val) /* INTBASE CP6 R0 Page 2 */ +static inline u32 read_intbase(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val)); + return val; +} static void write_intbase(u32 val) { asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val)); @@ -117,6 +147,12 @@ static void write_intbase(u32 val) /* INTSIZE CP6 R2 Page 2 */ +static inline u32 read_intsize(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val)); + return val; +} static void write_intsize(u32 val) { asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val)); diff --git a/trunk/arch/arm/mach-iop13xx/msi.c b/trunk/arch/arm/mach-iop13xx/msi.c index 63ef1124ca5c..2d2369302220 100644 --- a/trunk/arch/arm/mach-iop13xx/msi.c +++ b/trunk/arch/arm/mach-iop13xx/msi.c @@ -30,52 +30,52 @@ static DECLARE_BITMAP(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS); /* IMIPR0 CP6 R8 Page 1 */ -static u32 read_imipr_0(void) +static inline u32 read_imipr_0(void) { u32 val; asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val)); return val; } -static void write_imipr_0(u32 val) +static inline void write_imipr_0(u32 val) { asm volatile("mcr p6, 0, %0, c8, c1, 0"::"r" (val)); } /* IMIPR1 CP6 R9 Page 1 */ -static u32 read_imipr_1(void) +static inline u32 read_imipr_1(void) { u32 val; asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val)); return val; } -static void write_imipr_1(u32 val) +static inline void write_imipr_1(u32 val) { asm volatile("mcr p6, 0, %0, c9, c1, 0"::"r" (val)); } /* IMIPR2 CP6 R10 Page 1 */ -static u32 read_imipr_2(void) +static inline u32 read_imipr_2(void) { u32 val; asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val)); return val; } -static void write_imipr_2(u32 val) +static inline void write_imipr_2(u32 val) { asm volatile("mcr p6, 0, %0, c10, c1, 0"::"r" (val)); } /* IMIPR3 CP6 R11 Page 1 */ -static u32 read_imipr_3(void) +static inline u32 read_imipr_3(void) { u32 val; asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val)); return val; } -static void write_imipr_3(u32 val) +static inline void write_imipr_3(u32 val) { asm volatile("mcr p6, 0, %0, c11, c1, 0"::"r" (val)); } @@ -190,5 +190,5 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) write_msi_msg(irq, &msg); set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); - return 0; + return irq; } diff --git a/trunk/arch/arm/mach-iop13xx/pci.c b/trunk/arch/arm/mach-iop13xx/pci.c index 9d63d7f260ca..1c9e94c38b7e 100644 --- a/trunk/arch/arm/mach-iop13xx/pci.c +++ b/trunk/arch/arm/mach-iop13xx/pci.c @@ -19,11 +19,10 @@ #include #include -#include + #include #include #include -#include #include #include @@ -145,7 +144,7 @@ void iop13xx_map_pci_memory(void) } } -static int iop13xx_atu_function(int atu) +static inline int iop13xx_atu_function(int atu) { int func = 0; /* the function number depends on the value of the @@ -260,7 +259,7 @@ static int iop13xx_atux_pci_status(int clear) * data. Note that the data dependency on %0 encourages an abort * to be detected before we return. */ -static u32 iop13xx_atux_read(unsigned long addr) +static inline u32 iop13xx_atux_read(unsigned long addr) { u32 val; @@ -388,7 +387,7 @@ static int iop13xx_atue_pci_status(int clear) return err; } -static int +static inline int __init iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) { WARN_ON(idsel != 0); @@ -402,7 +401,7 @@ iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) } } -static u32 iop13xx_atue_read(unsigned long addr) +static inline u32 iop13xx_atue_read(unsigned long addr) { u32 val; @@ -990,7 +989,7 @@ void __init iop13xx_pci_init(void) "imprecise external abort"); } -/* initialize the pci memory space. handle any combination of +/* intialize the pci memory space. handle any combination of * atue and atux enabled/disabled */ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) diff --git a/trunk/arch/arm/mach-iop32x/glantank.c b/trunk/arch/arm/mach-iop32x/glantank.c index 5776fd884115..45f4f13ae11b 100644 --- a/trunk/arch/arm/mach-iop32x/glantank.c +++ b/trunk/arch/arm/mach-iop32x/glantank.c @@ -75,7 +75,7 @@ void __init glantank_map_io(void) #define INTC IRQ_IOP32X_XINT2 #define INTD IRQ_IOP32X_XINT3 -static int __init +static inline int __init glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { static int pci_irq_table[][4] = { diff --git a/trunk/arch/arm/mach-iop32x/iq31244.c b/trunk/arch/arm/mach-iop32x/iq31244.c index d4eefbea1fe6..7b21c6e13e59 100644 --- a/trunk/arch/arm/mach-iop32x/iq31244.c +++ b/trunk/arch/arm/mach-iop32x/iq31244.c @@ -104,7 +104,7 @@ void __init iq31244_map_io(void) /* * EP80219/IQ31244 PCI. */ -static int __init +static inline int __init ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; @@ -140,7 +140,7 @@ static struct hw_pci ep80219_pci __initdata = { .map_irq = ep80219_pci_map_irq, }; -static int __init +static inline int __init iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/trunk/arch/arm/mach-iop32x/iq80321.c b/trunk/arch/arm/mach-iop32x/iq80321.c index 8d9f49164a84..bc25fb91e7b9 100644 --- a/trunk/arch/arm/mach-iop32x/iq80321.c +++ b/trunk/arch/arm/mach-iop32x/iq80321.c @@ -72,7 +72,7 @@ void __init iq80321_map_io(void) /* * IQ80321 PCI. */ -static int __init +static inline int __init iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/trunk/arch/arm/mach-iop32x/irq.c b/trunk/arch/arm/mach-iop32x/irq.c index c971171c2905..82598dc18d80 100644 --- a/trunk/arch/arm/mach-iop32x/irq.c +++ b/trunk/arch/arm/mach-iop32x/irq.c @@ -21,12 +21,12 @@ static u32 iop32x_mask; -static void intctl_write(u32 val) +static inline void intctl_write(u32 val) { asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); } -static void intstr_write(u32 val) +static inline void intstr_write(u32 val) { asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); } diff --git a/trunk/arch/arm/mach-iop32x/n2100.c b/trunk/arch/arm/mach-iop32x/n2100.c index d55005d64781..5f07344d96f3 100644 --- a/trunk/arch/arm/mach-iop32x/n2100.c +++ b/trunk/arch/arm/mach-iop32x/n2100.c @@ -76,7 +76,7 @@ void __init n2100_map_io(void) /* * N2100 PCI. */ -static int __init +static inline int __init n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/trunk/arch/arm/mach-iop33x/iq80331.c b/trunk/arch/arm/mach-iop33x/iq80331.c index 2b063180687a..376c932830be 100644 --- a/trunk/arch/arm/mach-iop33x/iq80331.c +++ b/trunk/arch/arm/mach-iop33x/iq80331.c @@ -55,7 +55,7 @@ static struct sys_timer iq80331_timer = { /* * IQ80331 PCI. */ -static int __init +static inline int __init iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/trunk/arch/arm/mach-iop33x/iq80332.c b/trunk/arch/arm/mach-iop33x/iq80332.c index 7889ce3cb08e..58c81496c6f6 100644 --- a/trunk/arch/arm/mach-iop33x/iq80332.c +++ b/trunk/arch/arm/mach-iop33x/iq80332.c @@ -55,7 +55,7 @@ static struct sys_timer iq80332_timer = { /* * IQ80332 PCI. */ -static int __init +static inline int __init iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { int irq; diff --git a/trunk/arch/arm/mach-iop33x/irq.c b/trunk/arch/arm/mach-iop33x/irq.c index f09dd054b9c0..c65ea78a2427 100644 --- a/trunk/arch/arm/mach-iop33x/irq.c +++ b/trunk/arch/arm/mach-iop33x/irq.c @@ -22,32 +22,32 @@ static u32 iop33x_mask0; static u32 iop33x_mask1; -static void intctl0_write(u32 val) +static inline void intctl0_write(u32 val) { asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); } -static void intctl1_write(u32 val) +static inline void intctl1_write(u32 val) { asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); } -static void intstr0_write(u32 val) +static inline void intstr0_write(u32 val) { asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); } -static void intstr1_write(u32 val) +static inline void intstr1_write(u32 val) { asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); } -static void intbase_write(u32 val) +static inline void intbase_write(u32 val) { asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); } -static void intsize_write(u32 val) +static inline void intsize_write(u32 val) { asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); } diff --git a/trunk/arch/arm/mach-ixp2000/enp2611.c b/trunk/arch/arm/mach-ixp2000/enp2611.c index 9c49435d42c3..500e997ba7a4 100644 --- a/trunk/arch/arm/mach-ixp2000/enp2611.c +++ b/trunk/arch/arm/mach-ixp2000/enp2611.c @@ -198,7 +198,7 @@ subsys_initcall(enp2611_pci_init); /************************************************************************* - * ENP-2611 Machine Initialization + * ENP-2611 Machine Intialization *************************************************************************/ static struct flash_platform_data enp2611_flash_platform_data = { .map_name = "cfi_probe", diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c index 011065b967b4..52b368b34346 100644 --- a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c @@ -195,7 +195,7 @@ void __init ixdp2x00_map_io(void) * instances of the kernel. So far so good. Peers on the PCI bus running * Linux is a common design in telecom systems. The problem is that instead * of all the devices being controlled by a single host, different - * devices are controlled by different NPUs on the same bus, leading to + * devices are controlles by different NPUs on the same bus, leading to * multiple hosts on the bus. The exact bus layout looks like: * * Bus 0 @@ -211,7 +211,7 @@ void __init ixdp2x00_map_io(void) * | | | | | * ... Dev PMC Media Eth0 Eth1 ... * - * The master controls all but Eth1, which is controlled by the + * The master controlls all but Eth1, which is controlled by the * slave. What this means is that the both the master and the slave * have to scan the bus, but only one of them can enumerate the bus. * In addition, after the bus is scanned, each kernel must remove diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c index d3d730d2fc2b..3084a5fa751c 100644 --- a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c @@ -276,7 +276,7 @@ static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) /* Device is located after first MB bridge */ case 0x0008: if (tmp_bus == dev->bus) { - /* Device is located directly after first MB bridge */ + /* Device is located directy after first MB bridge */ switch (devpin) { case DEVPIN(1, 1): /* Onboard 82546 ch 0 */ if (machine_is_ixdp2401()) @@ -299,7 +299,7 @@ static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) break; case 0x0010: if (tmp_bus == dev->bus) { - /* Device is located directly after second MB bridge */ + /* Device is located directy after second MB bridge */ /* Secondary bus of second bridge */ switch (devpin) { case DEVPIN(0, 1): /* DB#0 */ @@ -348,7 +348,7 @@ int __init ixdp2x01_pci_init(void) subsys_initcall(ixdp2x01_pci_init); /************************************************************************* - * IXDP2x01 Machine Initialization + * IXDP2x01 Machine Intialization *************************************************************************/ static struct flash_platform_data ixdp2x01_flash_platform_data = { .map_name = "cfi_probe", diff --git a/trunk/arch/arm/mach-ixp2000/pci.c b/trunk/arch/arm/mach-ixp2000/pci.c index 03f4cf7f9dec..5a09a90c08fb 100644 --- a/trunk/arch/arm/mach-ixp2000/pci.c +++ b/trunk/arch/arm/mach-ixp2000/pci.c @@ -102,7 +102,7 @@ int ixp2000_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, } /* - * We don't do error checks by calling clear_master_aborts() b/c the + * We don't do error checks by callling clear_master_aborts() b/c the * assumption is that the caller did a read first to make sure a device * exists. */ diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c index 16356ffc86ae..b644bbab7d0a 100644 --- a/trunk/arch/arm/mach-ixp23xx/core.c +++ b/trunk/arch/arm/mach-ixp23xx/core.c @@ -389,7 +389,7 @@ struct sys_timer ixp23xx_timer = { /************************************************************************* - * IXP23xx Platform Initialization + * IXP23xx Platform Initializaion *************************************************************************/ static struct resource ixp23xx_uart_resources[] = { { diff --git a/trunk/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/trunk/arch/arm/mach-ixp4xx/gtwx5715-setup.c index dc6725bda3c4..30f1300e0e21 100644 --- a/trunk/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/trunk/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-ixp4xx/gtwx5715-setup.c * - * Gemtek GTWX5715 (Linksys WRV54G) board setup + * Gemtek GTWX5715 (Linksys WRV54G) board settup * * Copyright (C) 2004 George T. Joseph * Derived from Coyote diff --git a/trunk/arch/arm/mach-lh7a40x/lcd-panel.h b/trunk/arch/arm/mach-lh7a40x/lcd-panel.h index df6e38ed425b..4fb2efc4950f 100644 --- a/trunk/arch/arm/mach-lh7a40x/lcd-panel.h +++ b/trunk/arch/arm/mach-lh7a40x/lcd-panel.h @@ -126,7 +126,7 @@ static struct clcd_panel_extra lcd_panel_extra = { */ -/* The full horizontal cycle (Th) is clock/360/400/450. */ +/* The full horozontal cycle (Th) is clock/360/400/450. */ /* The full vertical cycle (Tv) is line/251/262/280. */ #define PIX_CLOCK_TARGET (6300000) /* -/6.3/7 MHz */ @@ -162,7 +162,7 @@ static struct clcd_panel lcd_panel = { /* Logic Product Development LCD 6.4" VGA -10 */ /* Sharp PN LQ64D343 */ -/* The full horizontal cycle (Th) is clock/750/800/900. */ +/* The full horozontal cycle (Th) is clock/750/800/900. */ /* The full vertical cycle (Tv) is line/515/525/560. */ #define PIX_CLOCK_TARGET (28330000) @@ -243,7 +243,7 @@ static struct clcd_panel lcd_panel = { * (fdisk, e2fsck). And, at that speed the display may have a visible * flicker. */ -/* The full horizontal cycle (Th) is clock/832/1056/1395. */ +/* The full horozontal cycle (Th) is clock/832/1056/1395. */ #define PIX_CLOCK_TARGET (20000000) #define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK) diff --git a/trunk/arch/arm/mach-ns9xxx/time.c b/trunk/arch/arm/mach-ns9xxx/time.c index b97d0c54a388..dd257084441c 100644 --- a/trunk/arch/arm/mach-ns9xxx/time.c +++ b/trunk/arch/arm/mach-ns9xxx/time.c @@ -35,7 +35,7 @@ static unsigned long ns9xxx_timer_gettimeoffset(void) { /* return the microseconds which have passed since the last interrupt * was _serviced_. That is, if an interrupt is pending or the counter - * reloads, return one period more. */ + * reloads, return one periode more. */ u32 counter1 = SYS_TR(0); int pending = SYS_ISR & (1 << IRQ_TIMER0); diff --git a/trunk/arch/arm/mach-omap1/Kconfig b/trunk/arch/arm/mach-omap1/Kconfig index f6ecdd3a2478..856c681ebbbc 100644 --- a/trunk/arch/arm/mach-omap1/Kconfig +++ b/trunk/arch/arm/mach-omap1/Kconfig @@ -38,7 +38,7 @@ config MACH_OMAP_H2 config MACH_OMAP_H3 bool "TI H3 Support" depends on ARCH_OMAP1 && ARCH_OMAP16XX -# select GPIOEXPANDER_OMAP + select GPIOEXPANDER_OMAP help TI OMAP 1710 H3 board support. Say Y here if you have such a board. diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index e7130293a03f..7d0cf7af88ce 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -385,7 +385,7 @@ static void __init osk_init(void) /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure * wrong CS3 memory timings. This mainly leads to CRC - * or similar errors if you use NOR flash (e.g. with JFFS2) + * or similiar errors if you use NOR flash (e.g. with JFFS2) */ if (EMIFS_CCS(3) != EMIFS_CS3_VAL) EMIFS_CCS(3) = EMIFS_CS3_VAL; diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 015824185629..4bc8a62909b9 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -7,7 +7,7 @@ * * Original version : Laurent Gonzalez * - * Maintainers : http://palmtelinux.sf.net + * Maintainters : http://palmtelinux.sf.net * palmtelinux-developpers@lists.sf.net * * This program is free software; you can redistribute it and/or modify diff --git a/trunk/arch/arm/mach-omap1/pm.c b/trunk/arch/arm/mach-omap1/pm.c index 5bb348e2e315..8caee68aa090 100644 --- a/trunk/arch/arm/mach-omap1/pm.c +++ b/trunk/arch/arm/mach-omap1/pm.c @@ -438,7 +438,7 @@ void omap_pm_suspend(void) omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG); /* - * Re-enable interrupts + * Reenable interrupts */ local_irq_enable(); diff --git a/trunk/arch/arm/mach-omap2/clock.c b/trunk/arch/arm/mach-omap2/clock.c index 588adb5ab47f..5170481afeab 100644 --- a/trunk/arch/arm/mach-omap2/clock.c +++ b/trunk/arch/arm/mach-omap2/clock.c @@ -443,7 +443,7 @@ static long omap2_clk_round_rate(struct clk *clk, unsigned long rate) /* * Check the DLL lock state, and return tue if running in unlock mode. - * This is needed to compensate for the shifted DLL value in unlock mode. + * This is needed to compenste for the shifted DLL value in unlock mode. */ static u32 omap2_dll_force_needed(void) { diff --git a/trunk/arch/arm/mach-omap2/clock.h b/trunk/arch/arm/mach-omap2/clock.h index 4f791866b910..162978fd5359 100644 --- a/trunk/arch/arm/mach-omap2/clock.h +++ b/trunk/arch/arm/mach-omap2/clock.h @@ -338,7 +338,7 @@ struct prcm_config { /* * These represent optimal values for common parts, it won't work for all. * As long as you scale down, most parameters are still work, they just - * become sub-optimal. The RFR value goes in the opposite direction. If you + * become sub-optimal. The RFR value goes in the oppisite direction. If you * don't adjust it down as your clock period increases the refresh interval * will not be met. Setting all parameters for complete worst case may work, * but may cut memory performance by 2x. Due to errata the DLLs need to be @@ -384,7 +384,7 @@ struct prcm_config { * Filling in table based on H4 boards and 2430-SDPs variants available. * There are quite a few more rates combinations which could be defined. * - * When multiple values are defined the start up will try and choose the + * When multiple values are defiend the start up will try and choose the * fastest one. If a 'fast' value is defined, then automatically, the /2 * one should be included as it can be used. Generally having more that * one fast set does not make sense, as static timings need to be changed diff --git a/trunk/arch/arm/mach-pxa/corgi_lcd.c b/trunk/arch/arm/mach-pxa/corgi_lcd.c index 365b9435f748..a72476c24621 100644 --- a/trunk/arch/arm/mach-pxa/corgi_lcd.c +++ b/trunk/arch/arm/mach-pxa/corgi_lcd.c @@ -40,7 +40,7 @@ #define PICTRL_ADRS 0x06 #define POLCTRL_ADRS 0x07 -/* Register Bit Definitions */ +/* Resgister Bit Definitions */ #define RESCTL_QVGA 0x01 #define RESCTL_VGA 0x00 @@ -55,11 +55,11 @@ #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */ #define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */ #define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */ -#define POWER0_COM_ON 0x08 /* COM Power Supply ON */ +#define POWER0_COM_ON 0x08 /* COM Powewr Supply ON */ #define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */ #define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */ -#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */ +#define POWER0_COM_OFF 0x00 /* COM Powewr Supply OFF */ #define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */ #define PICTRL_INIT_STATE 0x01 @@ -145,7 +145,7 @@ static void lcdtg_set_common_voltage(u8 base_data, u8 data) lcdtg_i2c_send_stop(base_data); } -/* Set Phase Adjust */ +/* Set Phase Adjuct */ static void lcdtg_set_phadadj(int mode) { int adj; @@ -226,7 +226,7 @@ static void lcdtg_hw_init(int mode) /* Signals output enable */ corgi_ssp_lcdtg_send(PICTRL_ADRS, 0); - /* Set Phase Adjust */ + /* Set Phase Adjuct */ lcdtg_set_phadadj(mode); /* Initialize for Input Signals from ATI */ diff --git a/trunk/arch/arm/mach-pxa/corgi_ssp.c b/trunk/arch/arm/mach-pxa/corgi_ssp.c index 40dea3d5142b..ff6b4ee037f5 100644 --- a/trunk/arch/arm/mach-pxa/corgi_ssp.c +++ b/trunk/arch/arm/mach-pxa/corgi_ssp.c @@ -32,7 +32,7 @@ static struct corgissp_machinfo *ssp_machinfo; * There are three devices connected to the SSP interface: * 1. A touchscreen controller (TI ADS7846 compatible) * 2. An LCD contoller (with some Backlight functionality) - * 3. A battery monitoring IC (Maxim MAX1111) + * 3. A battery moinitoring IC (Maxim MAX1111) * * Each device uses a different speed/mode of communication. * diff --git a/trunk/arch/arm/mach-realview/localtimer.c b/trunk/arch/arm/mach-realview/localtimer.c index c7bdf04ab094..caf6b8bb6c95 100644 --- a/trunk/arch/arm/mach-realview/localtimer.c +++ b/trunk/arch/arm/mach-realview/localtimer.c @@ -30,7 +30,7 @@ static unsigned long mpcore_timer_rate; /* * local_timer_ack: checks for a local timer interrupt. * - * If a local timer interrupt has occurred, acknowledge and return 1. + * If a local timer interrupt has occured, acknowledge and return 1. * Otherwise, return 0. */ int local_timer_ack(void) diff --git a/trunk/arch/arm/mach-s3c2410/mach-h1940.c b/trunk/arch/arm/mach-s3c2410/mach-h1940.c index 5c9bcea74767..5ccd0be23a33 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-h1940.c +++ b/trunk/arch/arm/mach-s3c2410/mach-h1940.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c index d86e6f18bac9..9cc4253d7bbc 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/trunk/arch/arm/mach-s3c2410/mach-qt2410.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-s3c2412/dma.c b/trunk/arch/arm/mach-s3c2412/dma.c index 668cccefe7b0..d0f4695c09d9 100644 --- a/trunk/arch/arm/mach-s3c2412/dma.c +++ b/trunk/arch/arm/mach-s3c2412/dma.c @@ -59,8 +59,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { [DMACH_SPI1] = { .name = "spi1", .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), - .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, - .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, + .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT, + .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT, }, [DMACH_UART0] = { .name = "uart0", diff --git a/trunk/arch/arm/mach-s3c2412/s3c2412.c b/trunk/arch/arm/mach-s3c2412/s3c2412.c index c602aa39f9c4..aafe0bc593f1 100644 --- a/trunk/arch/arm/mach-s3c2412/s3c2412.c +++ b/trunk/arch/arm/mach-s3c2412/s3c2412.c @@ -37,7 +37,6 @@ #include #include #include -#include #include #include @@ -75,14 +74,6 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) s3c_device_sdi.name = "s3c2412-sdi"; s3c_device_lcd.name = "s3c2412-lcd"; s3c_device_nand.name = "s3c2412-nand"; - - /* spi channel related changes, s3c2412/13 specific */ - s3c_device_spi0.name = "s3c2412-spi"; - s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24; - s3c_device_spi1.name = "s3c2412-spi"; - s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1; - s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24; - } /* s3c2412_idle diff --git a/trunk/arch/arm/mach-s3c2440/mach-osiris.c b/trunk/arch/arm/mach-s3c2440/mach-osiris.c index 4d6c7a574c1a..324f5a237921 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-osiris.c +++ b/trunk/arch/arm/mach-s3c2440/mach-osiris.c @@ -45,7 +45,7 @@ #include #include -/* onboard perihperal map */ +/* onboard perihpheral map */ static struct map_desc osiris_iodesc[] __initdata = { /* ISA IO areas (may be over-written later) */ diff --git a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c index 866ff71c01dd..c3cc4bf158f6 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/trunk/arch/arm/mach-s3c2440/mach-rx3715.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-s3c2443/clock.c b/trunk/arch/arm/mach-s3c2443/clock.c index 5955efb5de8d..0b6e360aeae7 100644 --- a/trunk/arch/arm/mach-s3c2443/clock.c +++ b/trunk/arch/arm/mach-s3c2443/clock.c @@ -746,25 +746,6 @@ static struct clk init_clocks[] = { .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_USBD, - }, { - .name = "hsmmc", - .id = -1, - .parent = &clk_h, - .enable = s3c2443_clkcon_enable_h, - .ctrlbit = S3C2443_HCLKCON_HSMMC, - }, { - .name = "cfc", - .id = -1, - .parent = &clk_h, - .enable = s3c2443_clkcon_enable_h, - .ctrlbit = S3C2443_HCLKCON_CFC, - .ctrlbit = S3C2443_HCLKCON_HSMMC, - }, { - .name = "ssmc", - .id = -1, - .parent = &clk_h, - .enable = s3c2443_clkcon_enable_h, - .ctrlbit = S3C2443_HCLKCON_SSMC, }, { .name = "timers", .id = -1, @@ -810,8 +791,7 @@ static struct clk init_clocks[] = { .name = "usb-bus-host", .id = -1, .parent = &clk_usb_bus_host, - }, { - .name = "ac97", + }, { .name = "ac97", .id = -1, .parent = &clk_p, .ctrlbit = S3C2443_PCLKCON_AC97, diff --git a/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c b/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c index b1eb709ee65a..b71ee53c2865 100644 --- a/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/trunk/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -104,7 +104,6 @@ static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = { static struct platform_device *smdk2443_devices[] __initdata = { &s3c_device_wdt, &s3c_device_i2c, - &s3c_device_hsmmc, }; static void __init smdk2443_map_io(void) diff --git a/trunk/arch/arm/mach-s3c2443/s3c2443.c b/trunk/arch/arm/mach-s3c2443/s3c2443.c index 8d8117158d23..11b1d0b310c3 100644 --- a/trunk/arch/arm/mach-s3c2443/s3c2443.c +++ b/trunk/arch/arm/mach-s3c2443/s3c2443.c @@ -63,10 +63,6 @@ int __init s3c2443_init(void) s3c_device_nand.name = "s3c2412-nand"; - /* change WDT IRQ number */ - s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; - s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; - return sysdev_register(&s3c2443_sysdev); } diff --git a/trunk/arch/arm/mach-sa1100/time.c b/trunk/arch/arm/mach-sa1100/time.c index 29cb0c1604ab..416e277054c2 100644 --- a/trunk/arch/arm/mach-sa1100/time.c +++ b/trunk/arch/arm/mach-sa1100/time.c @@ -25,7 +25,7 @@ static unsigned long __init sa1100_get_rtc_time(void) { /* * According to the manual we should be able to let RTTR be zero - * and then a default divisor for a 32.768KHz clock is used. + * and then a default diviser for a 32.768KHz clock is used. * Apparently this doesn't work, at least for my SA1110 rev 5. * If the clock divider is uninitialized then reset it to the * default value to get the 1Hz clock. diff --git a/trunk/arch/arm/mm/Kconfig b/trunk/arch/arm/mm/Kconfig index 5f472a8b406a..15f0284010ca 100644 --- a/trunk/arch/arm/mm/Kconfig +++ b/trunk/arch/arm/mm/Kconfig @@ -351,7 +351,6 @@ config CPU_V6 select CPU_CACHE_V6 select CPU_CACHE_VIPT select CPU_CP15_MMU - select CPU_HAS_ASID select CPU_COPY_V6 if MMU select CPU_TLB_V6 if MMU @@ -377,7 +376,6 @@ config CPU_V7 select CPU_CACHE_V7 select CPU_CACHE_VIPT select CPU_CP15_MMU - select CPU_HAS_ASID select CPU_COPY_V6 if MMU select CPU_TLB_V6 if MMU @@ -500,12 +498,6 @@ config CPU_TLB_V6 endif -config CPU_HAS_ASID - bool - help - This indicates whether the CPU has the ASID register; used to - tag TLB and possibly cache entries. - config CPU_CP15 bool help diff --git a/trunk/arch/arm/mm/alignment.c b/trunk/arch/arm/mm/alignment.c index 36440c899583..19ca333240ec 100644 --- a/trunk/arch/arm/mm/alignment.c +++ b/trunk/arch/arm/mm/alignment.c @@ -3,7 +3,7 @@ * * Copyright (C) 1995 Linus Torvalds * Modifications for ARM processor (c) 1995-2001 Russell King - * Thumb alignment fault fixups (c) 2004 MontaVista Software, Inc. + * Thumb aligment fault fixups (c) 2004 MontaVista Software, Inc. * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation. * Copyright (C) 1996, Cygnus Software Technologies Ltd. * diff --git a/trunk/arch/arm/mm/ioremap.c b/trunk/arch/arm/mm/ioremap.c index f3ade18862aa..d6167ad4e011 100644 --- a/trunk/arch/arm/mm/ioremap.c +++ b/trunk/arch/arm/mm/ioremap.c @@ -346,7 +346,7 @@ void __iounmap(volatile void __iomem *addr) #ifndef CONFIG_SMP /* * If this is a section based mapping we need to handle it - * specially as the VM subsystem does not know how to handle + * specially as the VM subysystem does not know how to handle * such a beast. We need the lock here b/c we need to clear * all the mappings before the area can be reclaimed * by someone else. diff --git a/trunk/arch/arm/mm/mmap.c b/trunk/arch/arm/mm/mmap.c index 2728b0e7d2bb..2c4c2422cd1e 100644 --- a/trunk/arch/arm/mm/mmap.c +++ b/trunk/arch/arm/mm/mmap.c @@ -5,7 +5,7 @@ #include #include #include -#include + #include #define COLOUR_ALIGN(addr,pgoff) \ diff --git a/trunk/arch/arm/mm/mmu.c b/trunk/arch/arm/mm/mmu.c index 02e050ae59f6..2ba1530d1ce1 100644 --- a/trunk/arch/arm/mm/mmu.c +++ b/trunk/arch/arm/mm/mmu.c @@ -92,7 +92,7 @@ static struct cachepolicy cache_policies[] __initdata = { }; /* - * These are useful for identifying cache coherency + * These are useful for identifing cache coherency * problems by allowing the cache or the cache and * writebuffer to be turned off. (Note: the write * buffer should not be on and the cache off). diff --git a/trunk/arch/arm/plat-iop/pci.c b/trunk/arch/arm/plat-iop/pci.c index 2b5aa1135b11..e2744b7227c5 100644 --- a/trunk/arch/arm/plat-iop/pci.c +++ b/trunk/arch/arm/plat-iop/pci.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -86,10 +85,10 @@ static int iop3xx_pci_status(void) /* * Simply write the address register and read the configuration - * data. Note that the 4 nops ensure that we are able to handle + * data. Note that the 4 nop's ensure that we are able to handle * a delayed abort (in theory.) */ -static u32 iop3xx_read(unsigned long addr) +static inline u32 iop3xx_read(unsigned long addr) { u32 val; @@ -322,7 +321,7 @@ void __init iop3xx_atu_disable(void) /* Flag to determine whether the ATU is initialized and the PCI bus scanned */ int init_atu; -void __init iop3xx_pci_preinit(void) +void iop3xx_pci_preinit(void) { if (iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) { iop3xx_atu_disable(); diff --git a/trunk/arch/arm/plat-omap/common.c b/trunk/arch/arm/plat-omap/common.c index 7987aa6e95f8..dd8708ad0a71 100644 --- a/trunk/arch/arm/plat-omap/common.c +++ b/trunk/arch/arm/plat-omap/common.c @@ -73,7 +73,7 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out) } if (info != NULL) { /* Check the length as a lame attempt to check for - * binary inconsistency. */ + * binary inconsistancy. */ if (len != NO_LENGTH_CHECK) { /* Word-align len */ if (len & 0x03) diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index 88d5b6d9f950..55a4d3be16b6 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -1172,7 +1172,7 @@ static void set_b1_regs(void) break; default: BUG(); - return; /* Suppress warning about uninitialized vars */ + return; /* Supress warning about uninitialized vars */ } if (omap_dma_in_1510_mode()) { diff --git a/trunk/arch/arm/plat-omap/sram.c b/trunk/arch/arm/plat-omap/sram.c index 1f23f0459e5f..bc46f33aede3 100644 --- a/trunk/arch/arm/plat-omap/sram.c +++ b/trunk/arch/arm/plat-omap/sram.c @@ -59,8 +59,8 @@ extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart, /* * Depending on the target RAMFS firewall setup, the public usable amount of - * SRAM varies. The default accessible size for all device types is 2k. A GP - * device allows ARM11 but not other initiators for full size. This + * SRAM varies. The default accessable size for all device types is 2k. A GP + * device allows ARM11 but not other initators for full size. This * functionality seems ok until some nice security API happens. */ static int is_sram_locked(void) @@ -71,7 +71,7 @@ static int is_sram_locked(void) type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK; if (type == GP_DEVICE) { - /* RAMFW: R/W access to all initiators for all qualifier sets */ + /* RAMFW: R/W access to all initators for all qualifier sets */ if (cpu_is_omap242x()) { __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */ __raw_writel(0xCFDE, VA_READPERM0); /* all i-read */ diff --git a/trunk/arch/arm/plat-omap/usb.c b/trunk/arch/arm/plat-omap/usb.c index a5aedf964b88..25489aafb113 100644 --- a/trunk/arch/arm/plat-omap/usb.c +++ b/trunk/arch/arm/plat-omap/usb.c @@ -177,7 +177,7 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) /* NOTE: SPEED and SUSP aren't configured here. OTG hosts * may be able to use I2C requests to set those bits along - * with VBUS switching and overcurrent detection. + * with VBUS switching and overcurrent detction. */ if (cpu_class_is_omap1() && nwires != 6) diff --git a/trunk/arch/arm/plat-s3c24xx/common-smdk.c b/trunk/arch/arm/plat-s3c24xx/common-smdk.c index 7ed19b23ce56..908efa7d745f 100644 --- a/trunk/arch/arm/plat-s3c24xx/common-smdk.c +++ b/trunk/arch/arm/plat-s3c24xx/common-smdk.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include @@ -30,7 +29,6 @@ #include #include -#include #include #include #include @@ -194,9 +192,6 @@ void __init smdk_machine_init(void) s3c2410_gpio_setpin(S3C2410_GPF6, 1); s3c2410_gpio_setpin(S3C2410_GPF7, 1); - if (machine_is_smdk2443()) - smdk_nand_info.twrph0 = 50; - s3c_device_nand.dev.platform_data = &smdk_nand_info; platform_add_devices(smdk_devs, ARRAY_SIZE(smdk_devs)); diff --git a/trunk/arch/arm/plat-s3c24xx/devs.c b/trunk/arch/arm/plat-s3c24xx/devs.c index 5875da0ae0eb..0fe53b39cb2f 100644 --- a/trunk/arch/arm/plat-s3c24xx/devs.c +++ b/trunk/arch/arm/plat-s3c24xx/devs.c @@ -33,7 +33,6 @@ #include #include -#include /* Serial port registrations */ @@ -403,36 +402,6 @@ struct platform_device s3c_device_sdi = { EXPORT_SYMBOL(s3c_device_sdi); -/* High-speed MMC/SD */ - -static struct resource s3c_hsmmc_resource[] = { - [0] = { - .start = S3C2443_PA_HSMMC, - .end = S3C2443_PA_HSMMC + S3C2443_SZ_HSMMC - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_S3C2443_HSMMC, - .end = IRQ_S3C2443_HSMMC, - .flags = IORESOURCE_IRQ, - } -}; - -static u64 s3c_device_hsmmc_dmamask = 0xffffffffUL; - -struct platform_device s3c_device_hsmmc = { - .name = "s3c-sdhci", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), - .resource = s3c_hsmmc_resource, - .dev = { - .dma_mask = &s3c_device_hsmmc_dmamask, - .coherent_dma_mask = 0xffffffffUL - } -}; - - - /* SPI (0) */ static struct resource s3c_spi0_resource[] = { @@ -468,8 +437,8 @@ EXPORT_SYMBOL(s3c_device_spi0); static struct resource s3c_spi1_resource[] = { [0] = { - .start = S3C24XX_PA_SPI + S3C2410_SPI1, - .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f, + .start = S3C24XX_PA_SPI + 0x20, + .end = S3C24XX_PA_SPI + 0x20 + 0x1f, .flags = IORESOURCE_MEM, }, [1] = { diff --git a/trunk/arch/arm/plat-s3c24xx/dma.c b/trunk/arch/arm/plat-s3c24xx/dma.c index 08d80f2f51f2..6f03c9370979 100644 --- a/trunk/arch/arm/plat-s3c24xx/dma.c +++ b/trunk/arch/arm/plat-s3c24xx/dma.c @@ -1153,7 +1153,7 @@ EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); * * hwcfg: the value for xxxSTCn register, * bit 0: 0=increment pointer, 1=leave pointer - * bit 1: 0=source is AHB, 1=source is APB + * bit 1: 0=soucre is AHB, 1=soucre is APB * * devaddr: physical address of the source */ diff --git a/trunk/arch/arm/plat-s3c24xx/pm-simtec.c b/trunk/arch/arm/plat-s3c24xx/pm-simtec.c index cb0b3a4ccf1b..bd965f2feeca 100644 --- a/trunk/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/trunk/arch/arm/plat-s3c24xx/pm-simtec.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/plat-s3c24xx/pm.c b/trunk/arch/arm/plat-s3c24xx/pm.c index 5692eccdf4d1..c6b03f8ab260 100644 --- a/trunk/arch/arm/plat-s3c24xx/pm.c +++ b/trunk/arch/arm/plat-s3c24xx/pm.c @@ -555,7 +555,7 @@ static int s3c2410_pm_enter(suspend_state_t state) __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); - /* call cpu specific preparation */ + /* call cpu specific preperation */ pm_cpu_prep(); diff --git a/trunk/arch/arm26/kernel/vmlinux-arm26-xip.lds.in b/trunk/arch/arm26/kernel/vmlinux-arm26-xip.lds.in index 4ec715c25dea..046a85054018 100644 --- a/trunk/arch/arm26/kernel/vmlinux-arm26-xip.lds.in +++ b/trunk/arch/arm26/kernel/vmlinux-arm26-xip.lds.in @@ -64,7 +64,7 @@ SECTIONS .text : { /* Real text segment */ _text = .; /* Text and read-only data */ - TEXT_TEXT + *(.text) SCHED_TEXT LOCK_TEXT /* FIXME - borrowed from arm32 - check*/ *(.fixup) @@ -111,7 +111,7 @@ SECTIONS /* * and the usual data section */ - DATA_DATA + *(.data) CONSTRUCTORS *(.init.data) diff --git a/trunk/arch/arm26/kernel/vmlinux-arm26.lds.in b/trunk/arch/arm26/kernel/vmlinux-arm26.lds.in index 6c44f6a17bf7..1d2949e83be8 100644 --- a/trunk/arch/arm26/kernel/vmlinux-arm26.lds.in +++ b/trunk/arch/arm26/kernel/vmlinux-arm26.lds.in @@ -65,7 +65,7 @@ SECTIONS .text : { /* Real text segment */ _text = .; /* Text and read-only data */ - TEXT_TEXT + *(.text) SCHED_TEXT LOCK_TEXT *(.fixup) @@ -106,7 +106,7 @@ SECTIONS /* * and the usual data section */ - DATA_DATA + *(.data) CONSTRUCTORS _edata = .; diff --git a/trunk/arch/avr32/boards/atstk1000/atstk1000.h b/trunk/arch/avr32/boards/atstk1000/atstk1000.h deleted file mode 100644 index 9a49ed036b72..000000000000 --- a/trunk/arch/avr32/boards/atstk1000/atstk1000.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * ATSTK1000 setup code: Daughterboard interface - * - * Copyright (C) 2007 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H -#define __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H - -extern struct atmel_lcdfb_info atstk1000_lcdc_data; - -#endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ diff --git a/trunk/arch/avr32/boards/atstk1000/atstk1002.c b/trunk/arch/avr32/boards/atstk1000/atstk1002.c index fe1dbe2e28f4..abe6ca203fa7 100644 --- a/trunk/arch/avr32/boards/atstk1000/atstk1002.c +++ b/trunk/arch/avr32/boards/atstk1000/atstk1002.c @@ -16,8 +16,6 @@ #include #include -#include