From 366c747cb1390dc4b3acfed92912a2dde1667c89 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Tue, 21 Dec 2010 21:08:14 -0700 Subject: [PATCH] --- yaml --- r: 226624 b: refs/heads/master c: cb13459b38c8f2e99df4923d2a71ce6db99f2436 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap2/clock44xx_data.c | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 50f64f9f1ac7..b0218b0f1e2c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e0cb70c565acffb210ffa2a4590637d1844d13c5 +refs/heads/master: cb13459b38c8f2e99df4923d2a71ce6db99f2436 diff --git a/trunk/arch/arm/mach-omap2/clock44xx_data.c b/trunk/arch/arm/mach-omap2/clock44xx_data.c index 74c4b43fb33f..d34ca7526b58 100644 --- a/trunk/arch/arm/mach-omap2/clock44xx_data.c +++ b/trunk/arch/arm/mach-omap2/clock44xx_data.c @@ -616,7 +616,9 @@ static struct clk dpll_core_m3x2_ck = { .clksel = dpll_core_m6x2_div, .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, - .ops = &clkops_null, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate, @@ -868,7 +870,9 @@ static struct clk dpll_per_m3x2_ck = { .clksel = dpll_per_m2x2_div, .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, - .ops = &clkops_null, + .ops = &clkops_omap2_dflt, + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, .recalc = &omap2_clksel_recalc, .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate,