From 36c3685c5b9e8fe56fa272f6246a06433888642d Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2011 13:55:53 -0700
Subject: [PATCH] --- yaml --- r: 250630 b: refs/heads/master c:
 25aebfc30bc40f01813aad7a0f62f2fda44efb8a h: refs/heads/master v: v3

---
 [refs]                                | 2 +-
 trunk/drivers/gpu/drm/i915/i915_gem.c | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index cc3be763cb12..958bbdec7b4b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 10ed13e4a5143000bca816982ea6e68e2a4ac050
+refs/heads/master: 25aebfc30bc40f01813aad7a0f62f2fda44efb8a
diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c
index 4304f74dfb5f..c6289034e29a 100644
--- a/trunk/drivers/gpu/drm/i915/i915_gem.c
+++ b/trunk/drivers/gpu/drm/i915/i915_gem.c
@@ -2673,6 +2673,7 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
 update:
 	obj->tiling_changed = false;
 	switch (INTEL_INFO(dev)->gen) {
+	case 7:
 	case 6:
 		ret = sandybridge_write_fence_reg(obj, pipelined);
 		break;
@@ -2706,6 +2707,7 @@ i915_gem_clear_fence_reg(struct drm_device *dev,
 	uint32_t fence_reg = reg - dev_priv->fence_regs;
 
 	switch (INTEL_INFO(dev)->gen) {
+	case 7:
 	case 6:
 		I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + fence_reg*8, 0);
 		break;