From 378da9c7a9d587acb0444ece1265ba4ab581fb65 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Thu, 5 Jul 2012 15:02:17 +0100 Subject: [PATCH] --- yaml --- r: 318753 b: refs/heads/master c: ff9282613f6796db3fe85dc6cbb995223078f581 h: refs/heads/master i: 318751: ee0e8790ca63580e67c89cd65b4baa0b907a13b7 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_pm.c | 9 +-------- 2 files changed, 2 insertions(+), 9 deletions(-) diff --git a/[refs] b/[refs] index 31046e097f56..a733538bd0ae 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6a4ea1248cc10354f36b7917eb412d01e979d5ad +refs/heads/master: ff9282613f6796db3fe85dc6cbb995223078f581 diff --git a/trunk/drivers/gpu/drm/i915/intel_pm.c b/trunk/drivers/gpu/drm/i915/intel_pm.c index 0bb69fd255a9..a1495cd2a8e7 100644 --- a/trunk/drivers/gpu/drm/i915/intel_pm.c +++ b/trunk/drivers/gpu/drm/i915/intel_pm.c @@ -2491,14 +2491,7 @@ static void gen6_enable_rps(struct drm_device *dev) gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8); /* requires MSI enabled */ - I915_WRITE(GEN6_PMIER, - GEN6_PM_MBOX_EVENT | - GEN6_PM_THERMAL_EVENT | - GEN6_PM_RP_DOWN_TIMEOUT | - GEN6_PM_RP_UP_THRESHOLD | - GEN6_PM_RP_DOWN_THRESHOLD | - GEN6_PM_RP_UP_EI_EXPIRED | - GEN6_PM_RP_DOWN_EI_EXPIRED); + I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS); spin_lock_irq(&dev_priv->rps_lock); WARN_ON(dev_priv->pm_iir != 0); I915_WRITE(GEN6_PMIMR, 0);