From 3830a38112f08215e5b348ab69576976b1f11bcd Mon Sep 17 00:00:00 2001
From: Chris Dearman <chris@mips.com>
Date: Mon, 8 May 2006 18:02:16 +0100
Subject: [PATCH] --- yaml --- r: 87183 b: refs/heads/master c:
 1f5826bd0ed6c0abec3da28dfffb8d12f0c2cb81 h: refs/heads/master i:   87181:
 797903f1228c42fcb36a1a6384fb6129469da0d7   87179:
 da9ae697677f5e81ae5c141066ca645ed06f4a80   87175:
 f36fb1a905857776f7d15af3ed2dc076ff6e955c   87167:
 fdc36f69c240e2db80c0f07da386a53178bd4cd5 v: v3

---
 [refs]                         |  2 +-
 trunk/arch/mips/kernel/traps.c | 31 +++++++++++++++++++++++++------
 2 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/[refs] b/[refs]
index 9d7e2aaa3ad3..269ff2cd5a3e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 0ec734c2b8b005667ffdaef8610d1024630683b0
+refs/heads/master: 1f5826bd0ed6c0abec3da28dfffb8d12f0c2cb81
diff --git a/trunk/arch/mips/kernel/traps.c b/trunk/arch/mips/kernel/traps.c
index fcae66752972..79cf7e913b99 100644
--- a/trunk/arch/mips/kernel/traps.c
+++ b/trunk/arch/mips/kernel/traps.c
@@ -534,8 +534,7 @@ static int simulate_llsc(struct pt_regs *regs, unsigned int opcode)
 
 /*
  * Simulate trapping 'rdhwr' instructions to provide user accessible
- * registers not implemented in hardware.  The only current use of this
- * is the thread area pointer.
+ * registers not implemented in hardware.
  */
 static int simulate_rdhwr(struct pt_regs *regs, unsigned int opcode)
 {
@@ -545,11 +544,31 @@ static int simulate_rdhwr(struct pt_regs *regs, unsigned int opcode)
 		int rd = (opcode & RD) >> 11;
 		int rt = (opcode & RT) >> 16;
 		switch (rd) {
-			case 29:
-				regs->regs[rt] = ti->tp_value;
-				return 0;
+		case 0:		/* CPU number */
+			regs->regs[rt] = smp_processor_id();
+			return 0;
+		case 1:		/* SYNCI length */
+			regs->regs[rt] = min(current_cpu_data.dcache.linesz,
+					     current_cpu_data.icache.linesz);
+			return 0;
+		case 2:		/* Read count register */
+			regs->regs[rt] = read_c0_count();
+			return 0;
+		case 3:		/* Count register resolution */
+			switch (current_cpu_data.cputype) {
+			case CPU_20KC:
+			case CPU_25KF:
+				regs->regs[rt] = 1;
+				break;
 			default:
-				return -1;
+				regs->regs[rt] = 2;
+			}
+			return 0;
+		case 29:
+			regs->regs[rt] = ti->tp_value;
+			return 0;
+		default:
+			return -1;
 		}
 	}