From 38f0a8a1f6f28d6a01f89f663b379957f57b2562 Mon Sep 17 00:00:00 2001 From: Akinobu Mita Date: Fri, 26 Oct 2012 23:35:15 +0900 Subject: [PATCH] --- yaml --- r: 358473 b: refs/heads/master c: e5a087fdc1ebe5bba40bcecb53c28a0af70e3b47 h: refs/heads/master i: 358471: f8736a74a357ae3f8a8af2f6eb6e9dd40ab5e34d v: v3 --- [refs] | 2 +- trunk/include/linux/dmaengine.h | 18 +----------------- 2 files changed, 2 insertions(+), 18 deletions(-) diff --git a/[refs] b/[refs] index 289c6bd6b5a3..f2a6f3529f33 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e63a47a361e03eaf79e0f2f6cdaca8e7679d1867 +refs/heads/master: e5a087fdc1ebe5bba40bcecb53c28a0af70e3b47 diff --git a/trunk/include/linux/dmaengine.h b/trunk/include/linux/dmaengine.h index c88f302d91c9..4c8643794e0d 100644 --- a/trunk/include/linux/dmaengine.h +++ b/trunk/include/linux/dmaengine.h @@ -849,20 +849,6 @@ static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; } -#define first_dma_cap(mask) __first_dma_cap(&(mask)) -static inline int __first_dma_cap(const dma_cap_mask_t *srcp) -{ - return min_t(int, DMA_TX_TYPE_END, - find_first_bit(srcp->bits, DMA_TX_TYPE_END)); -} - -#define next_dma_cap(n, mask) __next_dma_cap((n), &(mask)) -static inline int __next_dma_cap(int n, const dma_cap_mask_t *srcp) -{ - return min_t(int, DMA_TX_TYPE_END, - find_next_bit(srcp->bits, DMA_TX_TYPE_END, n+1)); -} - #define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) static inline void __dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) @@ -891,9 +877,7 @@ __dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp) } #define for_each_dma_cap_mask(cap, mask) \ - for ((cap) = first_dma_cap(mask); \ - (cap) < DMA_TX_TYPE_END; \ - (cap) = next_dma_cap((cap), (mask))) + for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END) /** * dma_async_issue_pending - flush pending transactions to HW