From 3a0c9c6f2dd9fb5db580b0695664987f3e07ce46 Mon Sep 17 00:00:00 2001
From: Marc Dietrich <marvin24@gmx.de>
Date: Sun, 7 Aug 2011 21:00:51 +0200
Subject: [PATCH] --- yaml --- r: 272775 b: refs/heads/master c:
 de7164db70af94e58dca84426374138cd3a18f34 h: refs/heads/master i:   272773:
 34c9357fcaf525b2fa772c4023e5ce0346d54a11   272771:
 3fc5a19efe0e7f7b68f66138b53bd2c8844bf69e   272767:
 e423c38c8359587aee341e68eff88bf7dfdf86c9 v: v3

---
 [refs]                                  |  2 +-
 trunk/arch/arm/mach-tegra/board-paz00.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 06f25692a989..965ee06eef40 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: bc24ed4f21c0ef6d99b653077747c3104f5f9b60
+refs/heads/master: de7164db70af94e58dca84426374138cd3a18f34
diff --git a/trunk/arch/arm/mach-tegra/board-paz00.c b/trunk/arch/arm/mach-tegra/board-paz00.c
index ea2f79c9879b..f3b737637306 100644
--- a/trunk/arch/arm/mach-tegra/board-paz00.c
+++ b/trunk/arch/arm/mach-tegra/board-paz00.c
@@ -45,6 +45,16 @@
 
 static struct plat_serial8250_port debug_uart_platform_data[] = {
 	{
+		/* serial port on JP1 */
+		.membase	= IO_ADDRESS(TEGRA_UARTA_BASE),
+		.mapbase	= TEGRA_UARTA_BASE,
+		.irq		= INT_UARTA,
+		.flags		= UPF_BOOT_AUTOCONF,
+		.iotype		= UPIO_MEM,
+		.regshift	= 2,
+		.uartclk	= 216000000,
+	}, {
+		/* serial port on mini-pcie */
 		.membase	= IO_ADDRESS(TEGRA_UARTD_BASE),
 		.mapbase	= TEGRA_UARTD_BASE,
 		.irq		= INT_UARTD,
@@ -94,6 +104,7 @@ static void __init tegra_paz00_fixup(struct machine_desc *desc,
 
 static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
 	/* name		parent		rate		enabled */
+	{ "uarta",	"pll_p",	216000000,	true },
 	{ "uartd",	"pll_p",	216000000,	true },
 	{ NULL,		NULL,		0,		0},
 };