From 3a969ab1e6b537f82c865736ee5d7c9ccf45db10 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 9 Feb 2006 22:26:34 -0800 Subject: [PATCH] --- yaml --- r: 21404 b: refs/heads/master c: dedacf623283cb24933ec9f7d5bf539f19173cd4 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/include/asm-sparc64/hypervisor.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index f8d730acf31f..2c41de24bee1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7eae642f75e0f7fbce7c37b2dfe0641ff1e9ebfd +refs/heads/master: dedacf623283cb24933ec9f7d5bf539f19173cd4 diff --git a/trunk/include/asm-sparc64/hypervisor.h b/trunk/include/asm-sparc64/hypervisor.h index b4e0d52acd5c..5d795ee5192d 100644 --- a/trunk/include/asm-sparc64/hypervisor.h +++ b/trunk/include/asm-sparc64/hypervisor.h @@ -1300,6 +1300,9 @@ struct hv_trap_trace_entry { * a tsbnum and a tsbindex. Bits 63:32 contain the * tsbnum and bits 31:00 contain the tsbindex. * + * Use the HV_PCI_TSBID() macro to construct such + * values. + * * io_attributes IO attributes for IOMMU mappings. One of more * of the attritbute bits are stores in a 64-bit * value. The values are defined below. @@ -1354,6 +1357,9 @@ struct hv_trap_trace_entry { (((d) & 0x1f) << 11) | \ (((f) & 0x07) << 8)) +#define HV_PCI_TSBID(__tsb_num, __tsb_index) \ + ((((u64)(__tsb_num)) << 32UL) | ((u64)(__tsb_index))) + #define HV_PCI_SYNC_FOR_DEVICE 0x01 #define HV_PCI_SYNC_FOR_CPU 0x02