From 3b4a880e04227a44af7760256a656a6b5fa32419 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Sep 2012 17:43:29 -0700 Subject: [PATCH] --- yaml --- r: 326508 b: refs/heads/master c: 3003ce3ecd31b171a99d3693ee89f4640a000e13 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-omap2/irq.c | 2 ++ trunk/arch/arm/plat-omap/include/plat/irqs.h | 3 --- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 597d8bce350f..05d982707aa7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 936e0f2fd64efbb28444c916814b6232dddac03b +refs/heads/master: 3003ce3ecd31b171a99d3693ee89f4640a000e13 diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index bcd83db41bbc..ac59f96a489f 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -49,6 +49,8 @@ #define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) #define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */ #define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */ +#define INTCPS_NR_MIR_REGS 3 +#define INTCPS_NR_IRQS 96 /* * OMAP2 has a number of different interrupt controllers, each interrupt diff --git a/trunk/arch/arm/plat-omap/include/plat/irqs.h b/trunk/arch/arm/plat-omap/include/plat/irqs.h index 15f497c2602e..fc3959cdac31 100644 --- a/trunk/arch/arm/plat-omap/include/plat/irqs.h +++ b/trunk/arch/arm/plat-omap/include/plat/irqs.h @@ -440,9 +440,6 @@ #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) -#define INTCPS_NR_MIR_REGS 3 -#define INTCPS_NR_IRQS 96 - #include #ifdef CONFIG_FIQ