From 3bd4506c60097bfe00cb9c58063b4e3e3b3caddd Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Sat, 23 Feb 2008 15:23:39 -0800 Subject: [PATCH] --- yaml --- r: 86217 b: refs/heads/master c: f6febccd7f86fbe94858a4a32d9384cc014c9f40 h: refs/heads/master i: 86215: 1ac3a4fc979b1373e78f58e52daa62b6bb1e70ef v: v3 --- [refs] | 2 +- trunk/drivers/spi/atmel_spi.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index d3ffcee1d768..9fe726ca672f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4f9d5f4a353440f2265781bfa641587964901861 +refs/heads/master: f6febccd7f86fbe94858a4a32d9384cc014c9f40 diff --git a/trunk/drivers/spi/atmel_spi.c b/trunk/drivers/spi/atmel_spi.c index 293b7cab3e57..85687aaf9cab 100644 --- a/trunk/drivers/spi/atmel_spi.c +++ b/trunk/drivers/spi/atmel_spi.c @@ -87,6 +87,16 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) unsigned gpio = (unsigned) spi->controller_data; unsigned active = spi->mode & SPI_CS_HIGH; u32 mr; + int i; + u32 csr; + u32 cpol = (spi->mode & SPI_CPOL) ? SPI_BIT(CPOL) : 0; + + /* Make sure clock polarity is correct */ + for (i = 0; i < spi->master->num_chipselect; i++) { + csr = spi_readl(as, CSR0 + 4 * i); + if ((csr ^ cpol) & SPI_BIT(CPOL)) + spi_writel(as, CSR0 + 4 * i, csr ^ SPI_BIT(CPOL)); + } mr = spi_readl(as, MR); mr = SPI_BFINS(PCS, ~(1 << spi->chip_select), mr);